4 files changed, 123 insertions, 25 deletions

diff --git a/drivers/gpu/drm/ast/ast_dp501.c b/drivers/gpu/drm/ast/ast_dp501.c
index 5da4b62285fa..76f07f38b941 100644
--- a/drivers/gpu/drm/ast/ast_dp501.c
+++ b/drivers/gpu/drm/ast/ast_dp501.c
@@ -379,11 +379,39 @@ static bool ast_init_dvo(struct drm_device *dev)
         return true;
 }
 
+
+static void ast_init_analog(struct drm_device *dev)
+{
+        struct ast_private *ast = dev->dev_private;
+        u32 data;
+
+        /*
+         * Set DAC source to VGA mode in SCU2C via the P2A
+         * bridge. First configure the P2U to target the SCU
+         * in case it isn't at this stage.
+         */
+        ast_write32(ast, 0xf004, 0x1e6e0000);
+        ast_write32(ast, 0xf000, 0x1);
+
+        /* Then unlock the SCU with the magic password */
+        ast_write32(ast, 0x12000, 0x1688a8a8);
+        ast_write32(ast, 0x12000, 0x1688a8a8);
+        ast_write32(ast, 0x12000, 0x1688a8a8);
+
+        /* Finally, clear bits [17:16] of SCU2c */
+        data = ast_read32(ast, 0x1202c);
+        data &= 0xfffcffff;
+        ast_write32(ast, 0, data);
+
+        /* Disable DVO */
+        ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xcf, 0x00);
+}
+
 void ast_init_3rdtx(struct drm_device *dev)
 {
         struct ast_private *ast = dev->dev_private;
         u8 jreg;
-        u32 data;
+
         if (ast->chip == AST2300 || ast->chip == AST2400) {
                 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
                 switch (jreg & 0x0e) {
@@ -399,12 +427,8 @@ void ast_init_3rdtx(struct drm_device *dev)
                 default:
                         if (ast->tx_chip_type == AST_TX_SIL164)
                                 ast_init_dvo(dev);
-                        else {
-                                ast_write32(ast, 0x12000, 0x1688a8a8);
-                                data = ast_read32(ast, 0x1202c);
-                                data &= 0xfffcffff;
-                                ast_write32(ast, 0, data);
-                        }
+                        else
+                                ast_init_analog(dev);
                 }
         }
 }
diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h
index cb91c2acc3cb..7485ff945ca9 100644
--- a/drivers/gpu/drm/ast/ast_drv.h
+++ b/drivers/gpu/drm/ast/ast_drv.h
@@ -125,8 +125,9 @@ struct ast_gem_object;
 
 #define AST_IO_AR_PORT_WRITE            (0x40)
 #define AST_IO_MISC_PORT_WRITE          (0x42)
+#define AST_IO_VGA_ENABLE_PORT          (0x43)
 #define AST_IO_SEQ_PORT                 (0x44)
-#define AST_DAC_INDEX_READ              (0x3c7)
+#define AST_IO_DAC_INDEX_READ           (0x47)
 #define AST_IO_DAC_INDEX_WRITE          (0x48)
 #define AST_IO_DAC_DATA                 (0x49)
 #define AST_IO_GR_PORT                  (0x4E)
@@ -134,6 +135,8 @@ struct ast_gem_object;
 #define AST_IO_INPUT_STATUS1_READ       (0x5A)
 #define AST_IO_MISC_PORT_READ           (0x4C)
 
+#define AST_IO_MM_OFFSET                (0x380)
+
 #define __ast_read(x) \
 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
 u##x val = 0;\
@@ -381,6 +384,9 @@ int ast_bo_push_sysram(struct ast_bo *bo);
 int ast_mmap(struct file *filp, struct vm_area_struct *vma);
 
 /* ast post */
+void ast_enable_vga(struct drm_device *dev);
+void ast_enable_mmio(struct drm_device *dev);
+bool ast_is_vga_enabled(struct drm_device *dev);
 void ast_post_gpu(struct drm_device *dev);
 u32 ast_mindwm(struct ast_private *ast, u32 r);
 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v);
diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index b792194e0d9c..035dacc93382 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -63,7 +63,7 @@ uint8_t ast_get_index_reg_mask(struct ast_private *ast,
 }
 
 
-static int ast_detect_chip(struct drm_device *dev)
+static int ast_detect_chip(struct drm_device *dev, bool *need_post)
 {
         struct ast_private *ast = dev->dev_private;
         uint32_t data, jreg;
@@ -110,6 +110,21 @@ static int ast_detect_chip(struct drm_device *dev)
                 }
         }
 
+        /*
+         * If VGA isn't enabled, we need to enable now or subsequent
+         * access to the scratch registers will fail. We also inform
+         * our caller that it needs to POST the chip
+         * (Assumption: VGA not enabled -> need to POST)
+         */
+        if (!ast_is_vga_enabled(dev)) {
+                ast_enable_vga(dev);
+                ast_enable_mmio(dev);
+                DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
+                *need_post = true;
+        } else
+                *need_post = false;
+
+        /* Check if we support wide screen */
         switch (ast->chip) {
         case AST1180:
                 ast->support_wide_screen = true;
@@ -125,6 +140,7 @@ static int ast_detect_chip(struct drm_device *dev)
                         ast->support_wide_screen = true;
                 else {
                         ast->support_wide_screen = false;
+                        /* Read SCU7c (silicon revision register) */
                         ast_write32(ast, 0xf004, 0x1e6e0000);
                         ast_write32(ast, 0xf000, 0x1);
                         data = ast_read32(ast, 0x1207c);
@@ -137,11 +153,29 @@ static int ast_detect_chip(struct drm_device *dev)
                 break;
         }
 
+        /* Check 3rd Tx option (digital output afaik) */
         ast->tx_chip_type = AST_TX_NONE;
-        jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
-        if (jreg & 0x80)
-                ast->tx_chip_type = AST_TX_SIL164;
+
+        /*
+         * VGACRA3 Enhanced Color Mode Register, check if DVO is already
+         * enabled, in that case, assume we have a SIL164 TMDS transmitter
+         *
+         * Don't make that assumption if we the chip wasn't enabled and
+         * is at power-on reset, otherwise we'll incorrectly "detect" a
+         * SIL164 when there is none.
+         */
+        if (!*need_post) {
+                jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
+                if (jreg & 0x80)
+                        ast->tx_chip_type = AST_TX_SIL164;
+        }
+
         if ((ast->chip == AST2300) || (ast->chip == AST2400)) {
+                /*
+                 * On AST2300 and 2400, look the configuration set by the SoC in
+                 * the SOC scratch register #1 bits 11:8 (interestingly marked
+                 * as "reserved" in the spec)
+                 */
                 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
                 switch (jreg) {
                 case 0x04:
@@ -162,6 +196,17 @@ static int ast_detect_chip(struct drm_device *dev)
                 }
         }
 
+        /* Print stuff for diagnostic purposes */
+        switch(ast->tx_chip_type) {
+        case AST_TX_SIL164:
+                DRM_INFO("Using Sil164 TMDS transmitter\n");
+                break;
+        case AST_TX_DP501:
+                DRM_INFO("Using DP501 DisplayPort transmitter\n");
+                break;
+        default:
+                DRM_INFO("Analog VGA only\n");
+        }
         return 0;
 }
 
@@ -346,6 +391,7 @@ static u32 ast_get_vram_info(struct drm_device *dev)
 int ast_driver_load(struct drm_device *dev, unsigned long flags)
 {
         struct ast_private *ast;
+        bool need_post;
         int ret = 0;
 
         ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL);
@@ -360,13 +406,27 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
                 ret = -EIO;
                 goto out_free;
         }
-        ast->ioregs = pci_iomap(dev->pdev, 2, 0);
+
+        /*
+         * If we don't have IO space at all, use MMIO now and
+         * assume the chip has MMIO enabled by default (rev 0x20
+         * and higher).
+         */
+        if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) {
+                DRM_INFO("platform has no IO space, trying MMIO\n");
+                ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
+        }
+
+        /* "map" IO regs if the above hasn't done so already */
         if (!ast->ioregs) {
-                ret = -EIO;
-                goto out_free;
+                ast->ioregs = pci_iomap(dev->pdev, 2, 0);
+                if (!ast->ioregs) {
+                        ret = -EIO;
+                        goto out_free;
+                }
         }
 
-        ast_detect_chip(dev);
+        ast_detect_chip(dev, &need_post);
 
         if (ast->chip != AST1180) {
                 ast_get_dram_info(dev);
@@ -374,6 +434,9 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
                 DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size);
         }
 
+        if (need_post)
+                ast_post_gpu(dev);
+
         ret = ast_mm_init(ast);
         if (ret)
                 goto out_free;
diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c
index 38d437f3a267..810c51d92b99 100644
--- a/drivers/gpu/drm/ast/ast_post.c
+++ b/drivers/gpu/drm/ast/ast_post.c
@@ -33,18 +33,23 @@
 
 static void ast_init_dram_2300(struct drm_device *dev);
 
-static void
-ast_enable_vga(struct drm_device *dev)
+void ast_enable_vga(struct drm_device *dev)
+{
+        struct ast_private *ast = dev->dev_private;
+
+        ast_io_write8(ast, AST_IO_VGA_ENABLE_PORT, 0x01);
+        ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, 0x01);
+}
+
+void ast_enable_mmio(struct drm_device *dev)
 {
         struct ast_private *ast = dev->dev_private;
 
-        ast_io_write8(ast, 0x43, 0x01);
-        ast_io_write8(ast, 0x42, 0x01);
+        ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
 }
 
-#if 0 /* will use later */
-static bool
-ast_is_vga_enabled(struct drm_device *dev)
+
+bool ast_is_vga_enabled(struct drm_device *dev)
 {
         struct ast_private *ast = dev->dev_private;
         u8 ch;
@@ -52,7 +57,7 @@ ast_is_vga_enabled(struct drm_device *dev)
         if (ast->chip == AST1180) {
                 /* TODO 1180 */
         } else {
-                ch = ast_io_read8(ast, 0x43);
+                ch = ast_io_read8(ast, AST_IO_VGA_ENABLE_PORT);
                 if (ch) {
                         ast_open_key(ast);
                         ch = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff);
@@ -61,7 +66,6 @@ ast_is_vga_enabled(struct drm_device *dev)
         }
         return 0;
 }
-#endif
 
 static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
 static const u8 extreginfo_ast2300a0[] = { 0x0f, 0x04, 0x1c, 0xff };
@@ -371,6 +375,7 @@ void ast_post_gpu(struct drm_device *dev)
         pci_write_config_dword(ast->dev->pdev, 0x04, reg);
 
         ast_enable_vga(dev);
+        ast_enable_mmio(dev);
         ast_open_key(ast);
         ast_set_def_ext_reg(dev);