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-rw-r--r--drivers/gpu/drm/i915/intel_display.c37
1 files changed, 7 insertions, 30 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index aa647c654f85..4c844c68ec80 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3416,7 +3416,7 @@ static void intel_update_lvds(struct drm_crtc *crtc, intel_clock_t *clock,
3416 struct drm_i915_private *dev_priv = dev->dev_private; 3416 struct drm_i915_private *dev_priv = dev->dev_private;
3417 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 3417 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
3418 int pipe = intel_crtc->pipe; 3418 int pipe = intel_crtc->pipe;
3419 u32 temp, lvds_sync = 0; 3419 u32 temp;
3420 3420
3421 temp = I915_READ(LVDS); 3421 temp = I915_READ(LVDS);
3422 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; 3422 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
@@ -3446,22 +3446,11 @@ static void intel_update_lvds(struct drm_crtc *crtc, intel_clock_t *clock,
3446 else 3446 else
3447 temp &= ~LVDS_ENABLE_DITHER; 3447 temp &= ~LVDS_ENABLE_DITHER;
3448 } 3448 }
3449 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
3449 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) 3450 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
3450 lvds_sync |= LVDS_HSYNC_POLARITY; 3451 temp |= LVDS_HSYNC_POLARITY;
3451 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) 3452 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
3452 lvds_sync |= LVDS_VSYNC_POLARITY; 3453 temp |= LVDS_VSYNC_POLARITY;
3453 if ((temp & (LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY))
3454 != lvds_sync) {
3455 char flags[2] = "-+";
3456 DRM_INFO("Changing LVDS panel from "
3457 "(%chsync, %cvsync) to (%chsync, %cvsync)\n",
3458 flags[!(temp & LVDS_HSYNC_POLARITY)],
3459 flags[!(temp & LVDS_VSYNC_POLARITY)],
3460 flags[!(lvds_sync & LVDS_HSYNC_POLARITY)],
3461 flags[!(lvds_sync & LVDS_VSYNC_POLARITY)]);
3462 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
3463 temp |= lvds_sync;
3464 }
3465 I915_WRITE(LVDS, temp); 3454 I915_WRITE(LVDS, temp);
3466} 3455}
3467 3456
@@ -4012,7 +4001,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
4012 int ret; 4001 int ret;
4013 struct fdi_m_n m_n = {0}; 4002 struct fdi_m_n m_n = {0};
4014 u32 temp; 4003 u32 temp;
4015 u32 lvds_sync = 0;
4016 int target_clock, pixel_multiplier, lane, link_bw, factor; 4004 int target_clock, pixel_multiplier, lane, link_bw, factor;
4017 unsigned int pipe_bpp; 4005 unsigned int pipe_bpp;
4018 bool dither; 4006 bool dither;
@@ -4305,22 +4293,11 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
4305 * appropriately here, but we need to look more thoroughly into how 4293 * appropriately here, but we need to look more thoroughly into how
4306 * panels behave in the two modes. 4294 * panels behave in the two modes.
4307 */ 4295 */
4296 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
4308 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) 4297 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
4309 lvds_sync |= LVDS_HSYNC_POLARITY; 4298 temp |= LVDS_HSYNC_POLARITY;
4310 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) 4299 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
4311 lvds_sync |= LVDS_VSYNC_POLARITY; 4300 temp |= LVDS_VSYNC_POLARITY;
4312 if ((temp & (LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY))
4313 != lvds_sync) {
4314 char flags[2] = "-+";
4315 DRM_INFO("Changing LVDS panel from "
4316 "(%chsync, %cvsync) to (%chsync, %cvsync)\n",
4317 flags[!(temp & LVDS_HSYNC_POLARITY)],
4318 flags[!(temp & LVDS_VSYNC_POLARITY)],
4319 flags[!(lvds_sync & LVDS_HSYNC_POLARITY)],
4320 flags[!(lvds_sync & LVDS_VSYNC_POLARITY)]);
4321 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
4322 temp |= lvds_sync;
4323 }
4324 I915_WRITE(PCH_LVDS, temp); 4301 I915_WRITE(PCH_LVDS, temp);
4325 } 4302 }
4326 4303