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-rw-r--r--arch/arm/mach-omap2/clkt34xx_dpll3m2.c13
-rw-r--r--arch/arm/mach-omap2/clock.h16
-rw-r--r--arch/arm/mach-omap2/clock34xx.c68
-rw-r--r--arch/arm/mach-omap2/clock3517.c35
-rw-r--r--arch/arm/mach-omap2/clock36xx.c19
-rw-r--r--arch/arm/mach-omap2/clock36xx.h4
-rw-r--r--arch/arm/mach-omap2/clock3xxx.c8
-rw-r--r--arch/arm/mach-omap2/clock3xxx.h5
-rw-r--r--arch/arm/mach-omap2/io.c10
9 files changed, 3 insertions, 175 deletions
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index aeaaa87cca06..8e48c6d602e7 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -45,15 +45,10 @@
45 * Program the DPLL M2 divider with the rounded target rate. Returns 45 * Program the DPLL M2 divider with the rounded target rate. Returns
46 * -EINVAL upon error, or 0 upon success. 46 * -EINVAL upon error, or 0 upon success.
47 */ 47 */
48#ifdef CONFIG_COMMON_CLK
49int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned long rate, 48int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned long rate,
50 unsigned long parent_rate) 49 unsigned long parent_rate)
51{ 50{
52 struct clk_hw_omap *clk = to_clk_hw_omap(hw); 51 struct clk_hw_omap *clk = to_clk_hw_omap(hw);
53#else
54int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
55{
56#endif
57 u32 new_div = 0; 52 u32 new_div = 0;
58 u32 unlock_dll = 0; 53 u32 unlock_dll = 0;
59 u32 c; 54 u32 c;
@@ -71,11 +66,7 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
71 return -EINVAL; 66 return -EINVAL;
72 67
73 sdrcrate = __clk_get_rate(sdrc_ick_p); 68 sdrcrate = __clk_get_rate(sdrc_ick_p);
74#ifdef CONFIG_COMMON_CLK
75 clkrate = __clk_get_rate(hw->clk); 69 clkrate = __clk_get_rate(hw->clk);
76#else
77 clkrate = __clk_get_rate(clk);
78#endif
79 if (rate > clkrate) 70 if (rate > clkrate)
80 sdrcrate <<= ((rate / clkrate) >> 1); 71 sdrcrate <<= ((rate / clkrate) >> 1);
81 else 72 else
@@ -124,10 +115,6 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
124 sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, 115 sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla,
125 sdrc_cs0->actim_ctrlb, sdrc_cs0->mr, 116 sdrc_cs0->actim_ctrlb, sdrc_cs0->mr,
126 0, 0, 0, 0); 117 0, 0, 0, 0);
127#ifndef CONFIG_COMMON_CLK
128 clk->rate = rate;
129#endif
130
131 return 0; 118 return 0;
132} 119}
133 120
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index e1aa9c50d02f..baeaff229506 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -586,13 +586,8 @@ int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent);
586#endif 586#endif
587 587
588/* clkt_iclk.c public functions */ 588/* clkt_iclk.c public functions */
589#ifdef CONFIG_COMMON_CLK
590extern void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk); 589extern void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk);
591extern void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk); 590extern void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk);
592#else
593extern void omap2_clkt_iclk_allow_idle(struct clk *clk);
594extern void omap2_clkt_iclk_deny_idle(struct clk *clk);
595#endif
596 591
597#ifdef CONFIG_COMMON_CLK 592#ifdef CONFIG_COMMON_CLK
598u8 omap2_init_dpll_parent(struct clk_hw *hw); 593u8 omap2_init_dpll_parent(struct clk_hw *hw);
@@ -643,7 +638,6 @@ extern const struct clksel_rate gfx_l3_rates[];
643extern const struct clksel_rate dsp_ick_rates[]; 638extern const struct clksel_rate dsp_ick_rates[];
644extern struct clk dummy_ck; 639extern struct clk dummy_ck;
645 640
646#ifdef CONFIG_COMMON_CLK
647extern const struct clk_hw_omap_ops clkhwops_omap3_dpll; 641extern const struct clk_hw_omap_ops clkhwops_omap3_dpll;
648extern const struct clk_hw_omap_ops clkhwops_iclk_wait; 642extern const struct clk_hw_omap_ops clkhwops_iclk_wait;
649extern const struct clk_hw_omap_ops clkhwops_wait; 643extern const struct clk_hw_omap_ops clkhwops_wait;
@@ -661,16 +655,6 @@ extern const struct clk_hw_omap_ops clkhwops_apll54;
661extern const struct clk_hw_omap_ops clkhwops_apll96; 655extern const struct clk_hw_omap_ops clkhwops_apll96;
662extern const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll; 656extern const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll;
663extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait; 657extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait;
664#else
665extern const struct clkops clkops_omap2_iclk_dflt_wait;
666extern const struct clkops clkops_omap2_iclk_dflt;
667extern const struct clkops clkops_omap2_iclk_idle_only;
668extern const struct clkops clkops_omap2_mdmclk_dflt_wait;
669extern const struct clkops clkops_omap2xxx_dpll_ops;
670extern const struct clkops clkops_omap3_noncore_dpll_ops;
671extern const struct clkops clkops_omap3_core_dpll_ops;
672extern const struct clkops clkops_omap4_dpllmx_ops;
673#endif /* CONFIG_COMMON_CLK */
674 658
675/* clksel_rate blocks shared between OMAP44xx and AM33xx */ 659/* clksel_rate blocks shared between OMAP44xx and AM33xx */
676extern const struct clksel_rate div_1_0_rates[]; 660extern const struct clksel_rate div_1_0_rates[];
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index b398a4655fed..4596468e50ab 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -37,11 +37,7 @@
37 * from the CM_{I,F}CLKEN bit. Pass back the correct info via 37 * from the CM_{I,F}CLKEN bit. Pass back the correct info via
38 * @idlest_reg and @idlest_bit. No return value. 38 * @idlest_reg and @idlest_bit. No return value.
39 */ 39 */
40#ifdef CONFIG_COMMON_CLK
41static void omap3430es2_clk_ssi_find_idlest(struct clk_hw_omap *clk, 40static void omap3430es2_clk_ssi_find_idlest(struct clk_hw_omap *clk,
42#else
43static void omap3430es2_clk_ssi_find_idlest(struct clk *clk,
44#endif
45 void __iomem **idlest_reg, 41 void __iomem **idlest_reg,
46 u8 *idlest_bit, 42 u8 *idlest_bit,
47 u8 *idlest_val) 43 u8 *idlest_val)
@@ -53,7 +49,6 @@ static void omap3430es2_clk_ssi_find_idlest(struct clk *clk,
53 *idlest_bit = OMAP3430ES2_ST_SSI_IDLE_SHIFT; 49 *idlest_bit = OMAP3430ES2_ST_SSI_IDLE_SHIFT;
54 *idlest_val = OMAP34XX_CM_IDLEST_VAL; 50 *idlest_val = OMAP34XX_CM_IDLEST_VAL;
55} 51}
56#ifdef CONFIG_COMMON_CLK
57const struct clk_hw_omap_ops clkhwops_omap3430es2_ssi_wait = { 52const struct clk_hw_omap_ops clkhwops_omap3430es2_ssi_wait = {
58 .find_idlest = omap3430es2_clk_ssi_find_idlest, 53 .find_idlest = omap3430es2_clk_ssi_find_idlest,
59 .find_companion = omap2_clk_dflt_find_companion, 54 .find_companion = omap2_clk_dflt_find_companion,
@@ -65,23 +60,6 @@ const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_ssi_wait = {
65 .find_idlest = omap3430es2_clk_ssi_find_idlest, 60 .find_idlest = omap3430es2_clk_ssi_find_idlest,
66 .find_companion = omap2_clk_dflt_find_companion, 61 .find_companion = omap2_clk_dflt_find_companion,
67}; 62};
68#else
69const struct clkops clkops_omap3430es2_ssi_wait = {
70 .enable = omap2_dflt_clk_enable,
71 .disable = omap2_dflt_clk_disable,
72 .find_idlest = omap3430es2_clk_ssi_find_idlest,
73 .find_companion = omap2_clk_dflt_find_companion,
74};
75
76const struct clkops clkops_omap3430es2_iclk_ssi_wait = {
77 .enable = omap2_dflt_clk_enable,
78 .disable = omap2_dflt_clk_disable,
79 .find_idlest = omap3430es2_clk_ssi_find_idlest,
80 .find_companion = omap2_clk_dflt_find_companion,
81 .allow_idle = omap2_clkt_iclk_allow_idle,
82 .deny_idle = omap2_clkt_iclk_deny_idle,
83};
84#endif
85 63
86/** 64/**
87 * omap3430es2_clk_dss_usbhost_find_idlest - CM_IDLEST info for DSS, USBHOST 65 * omap3430es2_clk_dss_usbhost_find_idlest - CM_IDLEST info for DSS, USBHOST
@@ -97,11 +75,7 @@ const struct clkops clkops_omap3430es2_iclk_ssi_wait = {
97 * default find_idlest code assumes that they are at the same 75 * default find_idlest code assumes that they are at the same
98 * position.) No return value. 76 * position.) No return value.
99 */ 77 */
100#ifdef CONFIG_COMMON_CLK
101static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk_hw_omap *clk, 78static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk_hw_omap *clk,
102#else
103static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk *clk,
104#endif
105 void __iomem **idlest_reg, 79 void __iomem **idlest_reg,
106 u8 *idlest_bit, 80 u8 *idlest_bit,
107 u8 *idlest_val) 81 u8 *idlest_val)
@@ -114,7 +88,7 @@ static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk *clk,
114 *idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT; 88 *idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT;
115 *idlest_val = OMAP34XX_CM_IDLEST_VAL; 89 *idlest_val = OMAP34XX_CM_IDLEST_VAL;
116} 90}
117#ifdef CONFIG_COMMON_CLK 91
118const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait = { 92const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait = {
119 .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest, 93 .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest,
120 .find_companion = omap2_clk_dflt_find_companion, 94 .find_companion = omap2_clk_dflt_find_companion,
@@ -126,23 +100,6 @@ const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_dss_usbhost_wait = {
126 .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest, 100 .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest,
127 .find_companion = omap2_clk_dflt_find_companion, 101 .find_companion = omap2_clk_dflt_find_companion,
128}; 102};
129#else
130const struct clkops clkops_omap3430es2_dss_usbhost_wait = {
131 .enable = omap2_dflt_clk_enable,
132 .disable = omap2_dflt_clk_disable,
133 .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest,
134 .find_companion = omap2_clk_dflt_find_companion,
135};
136
137const struct clkops clkops_omap3430es2_iclk_dss_usbhost_wait = {
138 .enable = omap2_dflt_clk_enable,
139 .disable = omap2_dflt_clk_disable,
140 .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest,
141 .find_companion = omap2_clk_dflt_find_companion,
142 .allow_idle = omap2_clkt_iclk_allow_idle,
143 .deny_idle = omap2_clkt_iclk_deny_idle,
144};
145#endif
146 103
147/** 104/**
148 * omap3430es2_clk_hsotgusb_find_idlest - return CM_IDLEST info for HSOTGUSB 105 * omap3430es2_clk_hsotgusb_find_idlest - return CM_IDLEST info for HSOTGUSB
@@ -155,11 +112,7 @@ const struct clkops clkops_omap3430es2_iclk_dss_usbhost_wait = {
155 * shift from the CM_{I,F}CLKEN bit. Pass back the correct info via 112 * shift from the CM_{I,F}CLKEN bit. Pass back the correct info via
156 * @idlest_reg and @idlest_bit. No return value. 113 * @idlest_reg and @idlest_bit. No return value.
157 */ 114 */
158#ifdef CONFIG_COMMON_CLK
159static void omap3430es2_clk_hsotgusb_find_idlest(struct clk_hw_omap *clk, 115static void omap3430es2_clk_hsotgusb_find_idlest(struct clk_hw_omap *clk,
160#else
161static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk,
162#endif
163 void __iomem **idlest_reg, 116 void __iomem **idlest_reg,
164 u8 *idlest_bit, 117 u8 *idlest_bit,
165 u8 *idlest_val) 118 u8 *idlest_val)
@@ -171,7 +124,7 @@ static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk,
171 *idlest_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT; 124 *idlest_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT;
172 *idlest_val = OMAP34XX_CM_IDLEST_VAL; 125 *idlest_val = OMAP34XX_CM_IDLEST_VAL;
173} 126}
174#ifdef CONFIG_COMMON_CLK 127
175const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait = { 128const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait = {
176 .allow_idle = omap2_clkt_iclk_allow_idle, 129 .allow_idle = omap2_clkt_iclk_allow_idle,
177 .deny_idle = omap2_clkt_iclk_deny_idle, 130 .deny_idle = omap2_clkt_iclk_deny_idle,
@@ -183,20 +136,3 @@ const struct clk_hw_omap_ops clkhwops_omap3430es2_hsotgusb_wait = {
183 .find_idlest = omap3430es2_clk_hsotgusb_find_idlest, 136 .find_idlest = omap3430es2_clk_hsotgusb_find_idlest,
184 .find_companion = omap2_clk_dflt_find_companion, 137 .find_companion = omap2_clk_dflt_find_companion,
185}; 138};
186#else
187const struct clkops clkops_omap3430es2_hsotgusb_wait = {
188 .enable = omap2_dflt_clk_enable,
189 .disable = omap2_dflt_clk_disable,
190 .find_idlest = omap3430es2_clk_hsotgusb_find_idlest,
191 .find_companion = omap2_clk_dflt_find_companion,
192};
193
194const struct clkops clkops_omap3430es2_iclk_hsotgusb_wait = {
195 .enable = omap2_dflt_clk_enable,
196 .disable = omap2_dflt_clk_disable,
197 .find_idlest = omap3430es2_clk_hsotgusb_find_idlest,
198 .find_companion = omap2_clk_dflt_find_companion,
199 .allow_idle = omap2_clkt_iclk_allow_idle,
200 .deny_idle = omap2_clkt_iclk_deny_idle,
201};
202#endif
diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c
index 467d8bc6b4aa..4d79ae2c0241 100644
--- a/arch/arm/mach-omap2/clock3517.c
+++ b/arch/arm/mach-omap2/clock3517.c
@@ -47,11 +47,7 @@
47 * in the enable register itsel at a bit offset of 4 from the enable 47 * in the enable register itsel at a bit offset of 4 from the enable
48 * bit. A value of 1 indicates that clock is enabled. 48 * bit. A value of 1 indicates that clock is enabled.
49 */ 49 */
50#ifdef CONFIG_COMMON_CLK
51static void am35xx_clk_find_idlest(struct clk_hw_omap *clk, 50static void am35xx_clk_find_idlest(struct clk_hw_omap *clk,
52#else
53static void am35xx_clk_find_idlest(struct clk *clk,
54#endif
55 void __iomem **idlest_reg, 51 void __iomem **idlest_reg,
56 u8 *idlest_bit, 52 u8 *idlest_bit,
57 u8 *idlest_val) 53 u8 *idlest_val)
@@ -75,13 +71,8 @@ static void am35xx_clk_find_idlest(struct clk *clk,
75 * associate this type of code with per-module data structures to 71 * associate this type of code with per-module data structures to
76 * avoid this issue, and remove the casts. No return value. 72 * avoid this issue, and remove the casts. No return value.
77 */ 73 */
78#ifdef CONFIG_COMMON_CLK
79static void am35xx_clk_find_companion(struct clk_hw_omap *clk, 74static void am35xx_clk_find_companion(struct clk_hw_omap *clk,
80 void __iomem **other_reg, 75 void __iomem **other_reg,
81#else
82static void am35xx_clk_find_companion(struct clk *clk,
83 void __iomem **other_reg,
84#endif
85 u8 *other_bit) 76 u8 *other_bit)
86{ 77{
87 *other_reg = (__force void __iomem *)(clk->enable_reg); 78 *other_reg = (__force void __iomem *)(clk->enable_reg);
@@ -90,19 +81,10 @@ static void am35xx_clk_find_companion(struct clk *clk,
90 else 81 else
91 *other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET; 82 *other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET;
92} 83}
93#ifdef CONFIG_COMMON_CLK
94const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait = { 84const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait = {
95 .find_idlest = am35xx_clk_find_idlest, 85 .find_idlest = am35xx_clk_find_idlest,
96 .find_companion = am35xx_clk_find_companion, 86 .find_companion = am35xx_clk_find_companion,
97}; 87};
98#else
99const struct clkops clkops_am35xx_ipss_module_wait = {
100 .enable = omap2_dflt_clk_enable,
101 .disable = omap2_dflt_clk_disable,
102 .find_idlest = am35xx_clk_find_idlest,
103 .find_companion = am35xx_clk_find_companion,
104};
105#endif
106 88
107/** 89/**
108 * am35xx_clk_ipss_find_idlest - return CM_IDLEST info for IPSS 90 * am35xx_clk_ipss_find_idlest - return CM_IDLEST info for IPSS
@@ -115,11 +97,7 @@ const struct clkops clkops_am35xx_ipss_module_wait = {
115 * CM_{I,F}CLKEN bit. Pass back the correct info via @idlest_reg 97 * CM_{I,F}CLKEN bit. Pass back the correct info via @idlest_reg
116 * and @idlest_bit. No return value. 98 * and @idlest_bit. No return value.
117 */ 99 */
118#ifdef CONFIG_COMMON_CLK
119static void am35xx_clk_ipss_find_idlest(struct clk_hw_omap *clk, 100static void am35xx_clk_ipss_find_idlest(struct clk_hw_omap *clk,
120#else
121static void am35xx_clk_ipss_find_idlest(struct clk *clk,
122#endif
123 void __iomem **idlest_reg, 101 void __iomem **idlest_reg,
124 u8 *idlest_bit, 102 u8 *idlest_bit,
125 u8 *idlest_val) 103 u8 *idlest_val)
@@ -131,21 +109,10 @@ static void am35xx_clk_ipss_find_idlest(struct clk *clk,
131 *idlest_bit = AM35XX_ST_IPSS_SHIFT; 109 *idlest_bit = AM35XX_ST_IPSS_SHIFT;
132 *idlest_val = OMAP34XX_CM_IDLEST_VAL; 110 *idlest_val = OMAP34XX_CM_IDLEST_VAL;
133} 111}
134#ifdef CONFIG_COMMON_CLK 112
135const struct clk_hw_omap_ops clkhwops_am35xx_ipss_wait = { 113const struct clk_hw_omap_ops clkhwops_am35xx_ipss_wait = {
136 .allow_idle = omap2_clkt_iclk_allow_idle, 114 .allow_idle = omap2_clkt_iclk_allow_idle,
137 .deny_idle = omap2_clkt_iclk_deny_idle, 115 .deny_idle = omap2_clkt_iclk_deny_idle,
138 .find_idlest = am35xx_clk_ipss_find_idlest, 116 .find_idlest = am35xx_clk_ipss_find_idlest,
139 .find_companion = omap2_clk_dflt_find_companion, 117 .find_companion = omap2_clk_dflt_find_companion,
140}; 118};
141#else
142const struct clkops clkops_am35xx_ipss_wait = {
143 .enable = omap2_dflt_clk_enable,
144 .disable = omap2_dflt_clk_disable,
145 .find_idlest = am35xx_clk_ipss_find_idlest,
146 .find_companion = omap2_clk_dflt_find_companion,
147 .allow_idle = omap2_clkt_iclk_allow_idle,
148 .deny_idle = omap2_clkt_iclk_deny_idle,
149};
150#endif
151
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 9f50e9704891..8f3bf4e50908 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -37,28 +37,18 @@
37 * (Any other value different from the Read value) to the 37 * (Any other value different from the Read value) to the
38 * corresponding CM_CLKSEL register will refresh the dividers. 38 * corresponding CM_CLKSEL register will refresh the dividers.
39 */ 39 */
40#ifdef CONFIG_COMMON_CLK
41int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk) 40int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
42{ 41{
43 struct clk_hw_omap *parent; 42 struct clk_hw_omap *parent;
44 struct clk_hw *parent_hw; 43 struct clk_hw *parent_hw;
45#else
46static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk)
47{
48 struct clk *parent;
49#endif
50 u32 dummy_v, orig_v, clksel_shift; 44 u32 dummy_v, orig_v, clksel_shift;
51 int ret; 45 int ret;
52 46
53 /* Clear PWRDN bit of HSDIVIDER */ 47 /* Clear PWRDN bit of HSDIVIDER */
54 ret = omap2_dflt_clk_enable(clk); 48 ret = omap2_dflt_clk_enable(clk);
55 49
56#ifdef CONFIG_COMMON_CLK
57 parent_hw = __clk_get_hw(__clk_get_parent(clk->clk)); 50 parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
58 parent = to_clk_hw_omap(parent_hw); 51 parent = to_clk_hw_omap(parent_hw);
59#else
60 parent = clk->parent;
61#endif
62 52
63 /* Restore the dividers */ 53 /* Restore the dividers */
64 if (!ret) { 54 if (!ret) {
@@ -76,12 +66,3 @@ static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk)
76 66
77 return ret; 67 return ret;
78} 68}
79
80#ifndef CONFIG_COMMON_CLK
81const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore = {
82 .enable = omap36xx_pwrdn_clk_enable_with_hsdiv_restore,
83 .disable = omap2_dflt_clk_disable,
84 .find_companion = omap2_clk_dflt_find_companion,
85 .find_idlest = omap2_clk_dflt_find_idlest,
86};
87#endif
diff --git a/arch/arm/mach-omap2/clock36xx.h b/arch/arm/mach-omap2/clock36xx.h
index e6a748e54215..945bb7f083e9 100644
--- a/arch/arm/mach-omap2/clock36xx.h
+++ b/arch/arm/mach-omap2/clock36xx.h
@@ -8,10 +8,6 @@
8#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H 8#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H
9#define __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H 9#define __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H
10 10
11#ifdef CONFIG_COMMON_CLK
12extern int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *hw); 11extern int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *hw);
13#else
14extern const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore;
15#endif
16 12
17#endif 13#endif
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index a6f75cd85327..4eacab8f1176 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -38,12 +38,8 @@
38 38
39/* needed by omap3_core_dpll_m2_set_rate() */ 39/* needed by omap3_core_dpll_m2_set_rate() */
40struct clk *sdrc_ick_p, *arm_fck_p; 40struct clk *sdrc_ick_p, *arm_fck_p;
41#ifdef CONFIG_COMMON_CLK
42int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate, 41int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
43 unsigned long parent_rate) 42 unsigned long parent_rate)
44#else
45int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate)
46#endif
47{ 43{
48 /* 44 /*
49 * According to the 12-5 CDP code from TI, "Limitation 2.5" 45 * According to the 12-5 CDP code from TI, "Limitation 2.5"
@@ -55,11 +51,7 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate)
55 return -EINVAL; 51 return -EINVAL;
56 } 52 }
57 53
58#ifdef CONFIG_COMMON_CLK
59 return omap3_noncore_dpll_set_rate(hw, rate, parent_rate); 54 return omap3_noncore_dpll_set_rate(hw, rate, parent_rate);
60#else
61 return omap3_noncore_dpll_set_rate(clk, rate);
62#endif
63} 55}
64 56
65void __init omap3_clk_lock_dpll5(void) 57void __init omap3_clk_lock_dpll5(void)
diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h
index 87f098dde71d..8cd4b0a882ae 100644
--- a/arch/arm/mach-omap2/clock3xxx.h
+++ b/arch/arm/mach-omap2/clock3xxx.h
@@ -9,15 +9,10 @@
9#define __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H 9#define __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H
10 10
11int omap3xxx_clk_init(void); 11int omap3xxx_clk_init(void);
12#ifdef CONFIG_COMMON_CLK
13int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate, 12int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate,
14 unsigned long parent_rate); 13 unsigned long parent_rate);
15int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate, 14int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate,
16 unsigned long parent_rate); 15 unsigned long parent_rate);
17#else
18int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate);
19int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate);
20#endif
21void omap3_clk_lock_dpll5(void); 16void omap3_clk_lock_dpll5(void);
22 17
23extern struct clk *sdrc_ick_p; 18extern struct clk *sdrc_ick_p;
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4332080731cd..05a5e6489df4 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -513,9 +513,7 @@ void __init omap3_init_late(void)
513 omap_mux_late_init(); 513 omap_mux_late_init();
514 omap2_common_pm_late_init(); 514 omap2_common_pm_late_init();
515 omap3_pm_init(); 515 omap3_pm_init();
516#ifdef CONFIG_COMMON_CLK
517 omap2_clk_enable_autoidle_all(); 516 omap2_clk_enable_autoidle_all();
518#endif
519} 517}
520 518
521void __init omap3430_init_late(void) 519void __init omap3430_init_late(void)
@@ -523,9 +521,7 @@ void __init omap3430_init_late(void)
523 omap_mux_late_init(); 521 omap_mux_late_init();
524 omap2_common_pm_late_init(); 522 omap2_common_pm_late_init();
525 omap3_pm_init(); 523 omap3_pm_init();
526#ifdef CONFIG_COMMON_CLK
527 omap2_clk_enable_autoidle_all(); 524 omap2_clk_enable_autoidle_all();
528#endif
529} 525}
530 526
531void __init omap35xx_init_late(void) 527void __init omap35xx_init_late(void)
@@ -533,9 +529,7 @@ void __init omap35xx_init_late(void)
533 omap_mux_late_init(); 529 omap_mux_late_init();
534 omap2_common_pm_late_init(); 530 omap2_common_pm_late_init();
535 omap3_pm_init(); 531 omap3_pm_init();
536#ifdef CONFIG_COMMON_CLK
537 omap2_clk_enable_autoidle_all(); 532 omap2_clk_enable_autoidle_all();
538#endif
539} 533}
540 534
541void __init omap3630_init_late(void) 535void __init omap3630_init_late(void)
@@ -543,9 +537,7 @@ void __init omap3630_init_late(void)
543 omap_mux_late_init(); 537 omap_mux_late_init();
544 omap2_common_pm_late_init(); 538 omap2_common_pm_late_init();
545 omap3_pm_init(); 539 omap3_pm_init();
546#ifdef CONFIG_COMMON_CLK
547 omap2_clk_enable_autoidle_all(); 540 omap2_clk_enable_autoidle_all();
548#endif
549} 541}
550 542
551void __init am35xx_init_late(void) 543void __init am35xx_init_late(void)
@@ -553,9 +545,7 @@ void __init am35xx_init_late(void)
553 omap_mux_late_init(); 545 omap_mux_late_init();
554 omap2_common_pm_late_init(); 546 omap2_common_pm_late_init();
555 omap3_pm_init(); 547 omap3_pm_init();
556#ifdef CONFIG_COMMON_CLK
557 omap2_clk_enable_autoidle_all(); 548 omap2_clk_enable_autoidle_all();
558#endif
559} 549}
560 550
561void __init ti81xx_init_late(void) 551void __init ti81xx_init_late(void)
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-26 10:59:30 -0400