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-rw-r--r--arch/c6x/platforms/timer64.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/c6x/platforms/timer64.c b/arch/c6x/platforms/timer64.c
index 783415861dae..03c03c249191 100644
--- a/arch/c6x/platforms/timer64.c
+++ b/arch/c6x/platforms/timer64.c
@@ -215,9 +215,17 @@ void __init timer64_init(void)
215 215
216 /* If there is a device state control, save the ID. */ 216 /* If there is a device state control, save the ID. */
217 err = of_property_read_u32(np, "ti,dscr-dev-enable", &val); 217 err = of_property_read_u32(np, "ti,dscr-dev-enable", &val);
218 if (!err) 218 if (!err) {
219 timer64_devstate_id = val; 219 timer64_devstate_id = val;
220 220
221 /*
222 * It is necessary to enable the timer block here because
223 * the TIMER_DIVISOR macro needs to read a timer register
224 * to get the divisor.
225 */
226 dscr_set_devstate(timer64_devstate_id, DSCR_DEVSTATE_ENABLED);
227 }
228
221 pr_debug("%s: Timer irq=%d.\n", np->full_name, cd->irq); 229 pr_debug("%s: Timer irq=%d.\n", np->full_name, cd->irq);
222 230
223 clockevents_calc_mult_shift(cd, c6x_core_freq / TIMER_DIVISOR, 5); 231 clockevents_calc_mult_shift(cd, c6x_core_freq / TIMER_DIVISOR, 5);