4 files changed, 362 insertions, 213 deletions

diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index e69182fd01cf..4b28159e0421 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -87,7 +87,9 @@ static long acpi_processor_ffh_cstate_probe_cpu(void *_cx)
         num_cstate_subtype = edx_part & MWAIT_SUBSTATE_MASK;
 
         retval = 0;
-        if (num_cstate_subtype < (cx->address & MWAIT_SUBSTATE_MASK)) {
+        /* If the HW does not support any sub-states in this C-state */
+        if (num_cstate_subtype == 0) {
+                pr_warn(FW_BUG "ACPI MWAIT C-state 0x%x not supported by HW (0x%x)\n", cx->address, edx_part);
                 retval = -1;
                 goto out;
         }
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 8e1939f564f4..9ddbf550bafa 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -196,6 +196,53 @@ static struct cpuidle_state snb_cstates[] = {
                 .enter = NULL }
 };
 
+static struct cpuidle_state byt_cstates[] = {
+        {
+                .name = "C1-BYT",
+                .desc = "MWAIT 0x00",
+                .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 1,
+                .target_residency = 1,
+                .enter = &intel_idle },
+        {
+                .name = "C1E-BYT",
+                .desc = "MWAIT 0x01",
+                .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 15,
+                .target_residency = 30,
+                .enter = &intel_idle },
+        {
+                .name = "C6N-BYT",
+                .desc = "MWAIT 0x58",
+                .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 40,
+                .target_residency = 275,
+                .enter = &intel_idle },
+        {
+                .name = "C6S-BYT",
+                .desc = "MWAIT 0x52",
+                .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 140,
+                .target_residency = 560,
+                .enter = &intel_idle },
+        {
+                .name = "C7-BYT",
+                .desc = "MWAIT 0x60",
+                .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 1200,
+                .target_residency = 1500,
+                .enter = &intel_idle },
+        {
+                .name = "C7S-BYT",
+                .desc = "MWAIT 0x64",
+                .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 10000,
+                .target_residency = 20000,
+                .enter = &intel_idle },
+        {
+                .enter = NULL }
+};
+
 static struct cpuidle_state ivb_cstates[] = {
         {
                 .name = "C1-IVB",
@@ -236,6 +283,105 @@ static struct cpuidle_state ivb_cstates[] = {
                 .enter = NULL }
 };
 
+static struct cpuidle_state ivt_cstates[] = {
+        {
+                .name = "C1-IVT",
+                .desc = "MWAIT 0x00",
+                .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 1,
+                .target_residency = 1,
+                .enter = &intel_idle },
+        {
+                .name = "C1E-IVT",
+                .desc = "MWAIT 0x01",
+                .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 10,
+                .target_residency = 80,
+                .enter = &intel_idle },
+        {
+                .name = "C3-IVT",
+                .desc = "MWAIT 0x10",
+                .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 59,
+                .target_residency = 156,
+                .enter = &intel_idle },
+        {
+                .name = "C6-IVT",
+                .desc = "MWAIT 0x20",
+                .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 82,
+                .target_residency = 300,
+                .enter = &intel_idle },
+        {
+                .enter = NULL }
+};
+
+static struct cpuidle_state ivt_cstates_4s[] = {
+        {
+                .name = "C1-IVT-4S",
+                .desc = "MWAIT 0x00",
+                .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 1,
+                .target_residency = 1,
+                .enter = &intel_idle },
+        {
+                .name = "C1E-IVT-4S",
+                .desc = "MWAIT 0x01",
+                .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 10,
+                .target_residency = 250,
+                .enter = &intel_idle },
+        {
+                .name = "C3-IVT-4S",
+                .desc = "MWAIT 0x10",
+                .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 59,
+                .target_residency = 300,
+                .enter = &intel_idle },
+        {
+                .name = "C6-IVT-4S",
+                .desc = "MWAIT 0x20",
+                .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 84,
+                .target_residency = 400,
+                .enter = &intel_idle },
+        {
+                .enter = NULL }
+};
+
+static struct cpuidle_state ivt_cstates_8s[] = {
+        {
+                .name = "C1-IVT-8S",
+                .desc = "MWAIT 0x00",
+                .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 1,
+                .target_residency = 1,
+                .enter = &intel_idle },
+        {
+                .name = "C1E-IVT-8S",
+                .desc = "MWAIT 0x01",
+                .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 10,
+                .target_residency = 500,
+                .enter = &intel_idle },
+        {
+                .name = "C3-IVT-8S",
+                .desc = "MWAIT 0x10",
+                .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 59,
+                .target_residency = 600,
+                .enter = &intel_idle },
+        {
+                .name = "C6-IVT-8S",
+                .desc = "MWAIT 0x20",
+                .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+                .exit_latency = 88,
+                .target_residency = 700,
+                .enter = &intel_idle },
+        {
+                .enter = NULL }
+};
+
 static struct cpuidle_state hsw_cstates[] = {
         {
                 .name = "C1-HSW",
@@ -464,11 +610,21 @@ static const struct idle_cpu idle_cpu_snb = {
         .disable_promotion_to_c1e = true,
 };
 
+static const struct idle_cpu idle_cpu_byt = {
+        .state_table = byt_cstates,
+        .disable_promotion_to_c1e = true,
+};
+
 static const struct idle_cpu idle_cpu_ivb = {
         .state_table = ivb_cstates,
         .disable_promotion_to_c1e = true,