diff options
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9002_phy.c | 35 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9002_phy.h | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 10 |
3 files changed, 47 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c index adbf031fbc5a..cd56c8692705 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c | |||
@@ -530,3 +530,38 @@ void ar9002_hw_attach_phy_ops(struct ath_hw *ah) | |||
530 | 530 | ||
531 | ar9002_hw_set_nf_limits(ah); | 531 | ar9002_hw_set_nf_limits(ah); |
532 | } | 532 | } |
533 | |||
534 | void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, | ||
535 | struct ath_hw_antcomb_conf *antconf) | ||
536 | { | ||
537 | u32 regval; | ||
538 | |||
539 | regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); | ||
540 | antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >> | ||
541 | AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S; | ||
542 | antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >> | ||
543 | AR_PHY_9285_ANT_DIV_ALT_LNACONF_S; | ||
544 | antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >> | ||
545 | AR_PHY_9285_FAST_DIV_BIAS_S; | ||
546 | } | ||
547 | EXPORT_SYMBOL(ath9k_hw_antdiv_comb_conf_get); | ||
548 | |||
549 | void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah, | ||
550 | struct ath_hw_antcomb_conf *antconf) | ||
551 | { | ||
552 | u32 regval; | ||
553 | |||
554 | regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); | ||
555 | regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF | | ||
556 | AR_PHY_9285_ANT_DIV_ALT_LNACONF | | ||
557 | AR_PHY_9285_FAST_DIV_BIAS); | ||
558 | regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S) | ||
559 | & AR_PHY_9285_ANT_DIV_MAIN_LNACONF); | ||
560 | regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S) | ||
561 | & AR_PHY_9285_ANT_DIV_ALT_LNACONF); | ||
562 | regval |= ((antconf->fast_div_bias << AR_PHY_9285_FAST_DIV_BIAS_S) | ||
563 | & AR_PHY_9285_FAST_DIV_BIAS); | ||
564 | |||
565 | REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval); | ||
566 | } | ||
567 | EXPORT_SYMBOL(ath9k_hw_antdiv_comb_conf_set); | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.h b/drivers/net/wireless/ath/ath9k/ar9002_phy.h index c5151a4dd10b..37663dbbcf57 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.h | |||
@@ -302,6 +302,8 @@ | |||
302 | #define AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE 0x80000000 | 302 | #define AR_PHY_NEW_ADC_DC_OFFSET_CORR_ENABLE 0x80000000 |
303 | 303 | ||
304 | #define AR_PHY_MULTICHAIN_GAIN_CTL 0x99ac | 304 | #define AR_PHY_MULTICHAIN_GAIN_CTL 0x99ac |
305 | #define AR_PHY_9285_FAST_DIV_BIAS 0x00007E00 | ||
306 | #define AR_PHY_9285_FAST_DIV_BIAS_S 9 | ||
305 | #define AR_PHY_9285_ANT_DIV_CTL_ALL 0x7f000000 | 307 | #define AR_PHY_9285_ANT_DIV_CTL_ALL 0x7f000000 |
306 | #define AR_PHY_9285_ANT_DIV_CTL 0x01000000 | 308 | #define AR_PHY_9285_ANT_DIV_CTL 0x01000000 |
307 | #define AR_PHY_9285_ANT_DIV_CTL_S 24 | 309 | #define AR_PHY_9285_ANT_DIV_CTL_S 24 |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 1a0efbd03e4f..197c717286e7 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -496,6 +496,12 @@ struct ath_gen_timer_table { | |||
496 | } timer_mask; | 496 | } timer_mask; |
497 | }; | 497 | }; |
498 | 498 | ||
499 | struct ath_hw_antcomb_conf { | ||
500 | u8 main_lna_conf; | ||
501 | u8 alt_lna_conf; | ||
502 | u8 fast_div_bias; | ||
503 | }; | ||
504 | |||
499 | /** | 505 | /** |
500 | * struct ath_hw_private_ops - callbacks used internally by hardware code | 506 | * struct ath_hw_private_ops - callbacks used internally by hardware code |
501 | * | 507 | * |
@@ -889,6 +895,10 @@ void ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio, | |||
889 | void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val); | 895 | void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val); |
890 | u32 ath9k_hw_getdefantenna(struct ath_hw *ah); | 896 | u32 ath9k_hw_getdefantenna(struct ath_hw *ah); |
891 | void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna); | 897 | void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna); |
898 | void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, | ||
899 | struct ath_hw_antcomb_conf *antconf); | ||
900 | void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah, | ||
901 | struct ath_hw_antcomb_conf *antconf); | ||
892 | 902 | ||
893 | /* General Operation */ | 903 | /* General Operation */ |
894 | bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout); | 904 | bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout); |