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-rw-r--r--arch/arm/Kconfig11
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mach-aaec2000/Kconfig11
-rw-r--r--arch/arm/mach-aaec2000/Makefile9
-rw-r--r--arch/arm/mach-aaec2000/Makefile.boot1
-rw-r--r--arch/arm/mach-aaec2000/aaed2000.c102
-rw-r--r--arch/arm/mach-aaec2000/core.c298
-rw-r--r--arch/arm/mach-aaec2000/core.h28
-rw-r--r--arch/arm/mach-aaec2000/include/mach/aaec2000.h207
-rw-r--r--arch/arm/mach-aaec2000/include/mach/aaed2000.h40
-rw-r--r--arch/arm/mach-aaec2000/include/mach/debug-macro.S35
-rw-r--r--arch/arm/mach-aaec2000/include/mach/entry-macro.S40
-rw-r--r--arch/arm/mach-aaec2000/include/mach/hardware.h50
-rw-r--r--arch/arm/mach-aaec2000/include/mach/io.h18
-rw-r--r--arch/arm/mach-aaec2000/include/mach/irqs.h46
-rw-r--r--arch/arm/mach-aaec2000/include/mach/memory.h17
-rw-r--r--arch/arm/mach-aaec2000/include/mach/system.h24
-rw-r--r--arch/arm/mach-aaec2000/include/mach/timex.h18
-rw-r--r--arch/arm/mach-aaec2000/include/mach/uncompress.h46
-rw-r--r--arch/arm/mach-aaec2000/include/mach/vmalloc.h16
20 files changed, 0 insertions, 1018 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 18a1eb93fd72..83e85134df64 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -212,15 +212,6 @@ choice
212 prompt "ARM system type" 212 prompt "ARM system type"
213 default ARCH_VERSATILE 213 default ARCH_VERSATILE
214 214
215config ARCH_AAEC2000
216 bool "Agilent AAEC-2000 based"
217 select CPU_ARM920T
218 select ARM_AMBA
219 select HAVE_CLK
220 select ARCH_USES_GETTIMEOFFSET
221 help
222 This enables support for systems based on the Agilent AAEC-2000
223
224config ARCH_INTEGRATOR 215config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family" 216 bool "ARM Ltd. Integrator family"
226 select ARM_AMBA 217 select ARM_AMBA
@@ -871,8 +862,6 @@ endchoice
871# Kconfigs may be included either alphabetically (according to the 862# Kconfigs may be included either alphabetically (according to the
872# plat- suffix) or along side the corresponding mach-* source. 863# plat- suffix) or along side the corresponding mach-* source.
873# 864#
874source "arch/arm/mach-aaec2000/Kconfig"
875
876source "arch/arm/mach-at91/Kconfig" 865source "arch/arm/mach-at91/Kconfig"
877 866
878source "arch/arm/mach-bcmring/Kconfig" 867source "arch/arm/mach-bcmring/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index aa18cb9da57b..16d16cd6c286 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -126,7 +126,6 @@ endif
126 126
127# Machine directory name. This list is sorted alphanumerically 127# Machine directory name. This list is sorted alphanumerically
128# by CONFIG_* macro name. 128# by CONFIG_* macro name.
129machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
130machine-$(CONFIG_ARCH_AT91) := at91 129machine-$(CONFIG_ARCH_AT91) := at91
131machine-$(CONFIG_ARCH_BCMRING) := bcmring 130machine-$(CONFIG_ARCH_BCMRING) := bcmring
132machine-$(CONFIG_ARCH_CLPS711X) := clps711x 131machine-$(CONFIG_ARCH_CLPS711X) := clps711x
diff --git a/arch/arm/mach-aaec2000/Kconfig b/arch/arm/mach-aaec2000/Kconfig
deleted file mode 100644
index 5e4bef93754c..000000000000
--- a/arch/arm/mach-aaec2000/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
1if ARCH_AAEC2000
2
3menu "Agilent AAEC-2000 Implementations"
4
5config MACH_AAED2000
6 bool "Agilent AAED-2000 Development Platform"
7 select CPU_ARM920T
8
9endmenu
10
11endif
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
deleted file mode 100644
index 20ec83896c37..000000000000
--- a/arch/arm/mach-aaec2000/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Common support (must be linked before board specific support)
6obj-y += core.o
7
8# Specific board support
9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/Makefile.boot b/arch/arm/mach-aaec2000/Makefile.boot
deleted file mode 100644
index 8f5a8b7c53c7..000000000000
--- a/arch/arm/mach-aaec2000/Makefile.boot
+++ /dev/null
@@ -1 +0,0 @@
1 zreladdr-y := 0xf0008000
diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c
deleted file mode 100644
index 0eb3e3e5b2d1..000000000000
--- a/arch/arm/mach-aaec2000/aaed2000.c
+++ /dev/null
@@ -1,102 +0,0 @@
1/*
2 * linux/arch/arm/mach-aaec2000/aaed2000.c
3 *
4 * Support for the Agilent AAED-2000 Development Platform.
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/major.h>
18#include <linux/interrupt.h>
19
20#include <asm/setup.h>
21#include <asm/memory.h>
22#include <asm/mach-types.h>
23#include <mach/hardware.h>
24#include <asm/irq.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
30#include <mach/aaed2000.h>
31
32#include "core.h"
33
34static void aaed2000_clcd_disable(struct clcd_fb *fb)
35{
36 AAED_EXT_GPIO &= ~AAED_EGPIO_LCD_PWR_EN;
37}
38
39static void aaed2000_clcd_enable(struct clcd_fb *fb)
40{
41 AAED_EXT_GPIO |= AAED_EGPIO_LCD_PWR_EN;
42}
43
44struct aaec2000_clcd_info clcd_info = {
45 .enable = aaed2000_clcd_enable,
46 .disable = aaed2000_clcd_disable,
47 .panel = {
48 .mode = {
49 .name = "Sharp",
50 .refresh = 60,
51 .xres = 640,
52 .yres = 480,
53 .pixclock = 39721,
54 .left_margin = 20,
55 .right_margin = 44,
56 .upper_margin = 21,
57 .lower_margin = 34,
58 .hsync_len = 96,
59 .vsync_len = 2,
60 .sync = 0,
61 .vmode = FB_VMODE_NONINTERLACED,
62 },
63 .width = -1,
64 .height = -1,
65 .tim2 = TIM2_IVS | TIM2_IHS,
66 .cntl = CNTL_LCDTFT,
67 .bpp = 16,
68 },
69};
70
71static void __init aaed2000_init_irq(void)
72{
73 aaec2000_init_irq();
74}
75
76static void __init aaed2000_init(void)
77{
78 aaec2000_set_clcd_plat_data(&clcd_info);
79}
80
81static struct map_desc aaed2000_io_desc[] __initdata = {
82 {
83 .virtual = EXT_GPIO_VBASE,
84 .pfn = __phys_to_pfn(EXT_GPIO_PBASE),
85 .length = EXT_GPIO_LENGTH,
86 .type = MT_DEVICE
87 },
88};
89
90static void __init aaed2000_map_io(void)
91{
92 aaec2000_map_io();
93 iotable_init(aaed2000_io_desc, ARRAY_SIZE(aaed2000_io_desc));
94}
95
96MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
97 /* Maintainer: Nicolas Bellido Y Ortega */
98 .map_io = aaed2000_map_io,
99 .init_irq = aaed2000_init_irq,
100 .timer = &aaec2000_timer,
101 .init_machine = aaed2000_init,
102MACHINE_END
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
deleted file mode 100644
index f8465bd17e67..000000000000
--- a/arch/arm/mach-aaec2000/core.c
+++ /dev/null
@@ -1,298 +0,0 @@
1/*
2 * linux/arch/arm/mach-aaec2000/core.c
3 *
4 * Code common to all AAEC-2000 machines
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/dma-mapping.h>
19#include <linux/interrupt.h>
20#include <linux/timex.h>
21#include <linux/signal.h>
22#include <linux/clk.h>
23#include <linux/gfp.h>
24
25#include <mach/hardware.h>
26#include <asm/irq.h>
27#include <asm/sizes.h>
28
29#include <asm/mach/flash.h>
30#include <asm/mach/irq.h>
31#include <asm/mach/time.h>
32#include <asm/mach/map.h>
33
34#include "core.h"
35
36/*
37 * Common I/O mapping:
38 *
39 * Static virtual address mappings are as follow:
40 *
41 * 0xf8000000-0xf8001ffff: Devices connected to APB bus
42 * 0xf8002000-0xf8003ffff: Devices connected to AHB bus
43 *
44 * Below 0xe8000000 is reserved for vm allocation.
45 *
46 * The machine specific code must provide the extra mapping beside the
47 * default mapping provided here.
48 */
49static struct map_desc standard_io_desc[] __initdata = {
50 {
51 .virtual = VIO_APB_BASE,
52 .pfn = __phys_to_pfn(PIO_APB_BASE),
53 .length = IO_APB_LENGTH,
54 .type = MT_DEVICE
55 }, {
56 .virtual = VIO_AHB_BASE,
57 .pfn = __phys_to_pfn(PIO_AHB_BASE),
58 .length = IO_AHB_LENGTH,
59 .type = MT_DEVICE
60 }
61};
62
63void __init aaec2000_map_io(void)
64{
65 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
66}
67
68/*
69 * Interrupt handling routines
70 */
71static void aaec2000_int_ack(struct irq_data *d)
72{
73 IRQ_INTSR = 1 << d->irq;
74}
75
76static void aaec2000_int_mask(struct irq_data *d)
77{
78 IRQ_INTENC |= (1 << d->irq);
79}
80
81static void aaec2000_int_unmask(struct irq_data *d)
82{
83 IRQ_INTENS |= (1 << d->irq);
84}
85
86static struct irq_chip aaec2000_irq_chip = {
87 .irq_ack = aaec2000_int_ack,
88 .irq_mask = aaec2000_int_mask,
89 .irq_unmask = aaec2000_int_unmask,
90};
91
92void __init aaec2000_init_irq(void)
93{
94 unsigned int i;
95
96 for (i = 0; i < NR_IRQS; i++) {
97 set_irq_handler(i, handle_level_irq);
98 set_irq_chip(i, &aaec2000_irq_chip);
99 set_irq_flags(i, IRQF_VALID);
100 }
101
102 /* Disable all interrupts */
103 IRQ_INTENC = 0xffffffff;
104
105 /* Clear any pending interrupts */
106 IRQ_INTSR = IRQ_INTSR;
107}
108
109/*
110 * Time keeping
111 */
112/* IRQs are disabled before entering here from do_gettimeofday() */
113static unsigned long aaec2000_gettimeoffset(void)
114{
115 unsigned long ticks_to_match, elapsed, usec;
116
117 /* Get ticks before next timer match */
118 ticks_to_match = TIMER1_LOAD - TIMER1_VAL;
119
120 /* We need elapsed ticks since last match */
121 elapsed = LATCH - ticks_to_match;
122
123 /* Now, convert them to usec */
124 usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
125
126 return usec;
127}
128
129/* We enter here with IRQs enabled */
130static irqreturn_t
131aaec2000_timer_interrupt(int irq, void *dev_id)
132{
133 /* TODO: Check timer accuracy */
134 timer_tick();
135 TIMER1_CLEAR = 1;
136
137 return IRQ_HANDLED;
138}
139
140static struct irqaction aaec2000_timer_irq = {
141 .name = "AAEC-2000 Timer Tick",
142 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
143 .handler = aaec2000_timer_interrupt,
144};
145
146static void __init aaec2000_timer_init(void)
147{
148 /* Disable timer 1 */
149 TIMER1_CTRL = 0;
150
151 /* We have somehow to generate a 100Hz clock.
152 * We then use the 508KHz timer in periodic mode.
153 */
154 TIMER1_LOAD = LATCH;
155 TIMER1_CLEAR = 1; /* Clear interrupt */
156
157 setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq);
158
159 TIMER1_CTRL = TIMER_CTRL_ENABLE |
160 TIMER_CTRL_PERIODIC |
161 TIMER_CTRL_CLKSEL_508K;
162}
163
164struct sys_timer aaec2000_timer = {
165 .init = aaec2000_timer_init,
166 .offset = aaec2000_gettimeoffset,
167};
168
169static struct clcd_panel mach_clcd_panel;
170
171static int aaec2000_clcd_setup(struct clcd_fb *fb)
172{
173 dma_addr_t dma;
174
175 fb->panel = &mach_clcd_panel;
176
177 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M,
178 &dma, GFP_KERNEL);
179
180 if (!fb->fb.screen_base) {
181 printk(KERN_ERR "CLCD: unable to map framebuffer\n");
182 return -ENOMEM;
183 }
184
185 fb->fb.fix.smem_start = dma;
186 fb->fb.fix.smem_len = SZ_1M;
187
188 return 0;
189}
190
191static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
192{
193 return dma_mmap_writecombine(&fb->dev->dev, vma,
194 fb->fb.screen_base,
195 fb->fb.fix.smem_start,
196 fb->fb.fix.smem_len);
197}
198
199static void aaec2000_clcd_remove(struct clcd_fb *fb)
200{
201 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
202 fb->fb.screen_base, fb->fb.fix.smem_start);
203}
204
205static struct clcd_board clcd_plat_data = {
206 .name = "AAEC-2000",
207 .check = clcdfb_check,
208 .decode = clcdfb_decode,
209 .setup = aaec2000_clcd_setup,
210 .mmap = aaec2000_clcd_mmap,
211 .remove = aaec2000_clcd_remove,
212};
213
214static struct amba_device clcd_device = {
215 .dev = {
216 .init_name = "mb:16",
217 .coherent_dma_mask = ~0,
218 .platform_data = &clcd_plat_data,
219 },
220 .res = {
221 .start = AAEC_CLCD_PHYS,
222 .end = AAEC_CLCD_PHYS + SZ_4K - 1,
223 .flags = IORESOURCE_MEM,
224 },
225 .irq = { INT_LCD, NO_IRQ },
226 .periphid = 0x41110,
227};
228
229static struct amba_device *amba_devs[] __initdata = {
230 &clcd_device,
231};
232
233void clk_disable(struct clk *clk)
234{
235}
236
237int clk_set_rate(struct clk *clk, unsigned long rate)
238{
239 return 0;
240}
241
242int clk_enable(struct clk *clk)
243{
244 return 0;
245}
246
247struct clk *clk_get(struct device *dev, const char *id)
248{
249 return dev && strcmp(dev_name(dev), "mb:16") == 0 ? NULL : ERR_PTR(-ENOENT);
250}
251
252void clk_put(struct clk *clk)
253{
254}
255
256void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
257{
258 clcd_plat_data.enable = clcd->enable;
259 clcd_plat_data.disable = clcd->disable;
260 memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel));
261}
262
263static struct flash_platform_data aaec2000_flash_data = {
264 .map_name = "cfi_probe",
265 .width = 4,
266};
267
268static struct resource aaec2000_flash_resource = {
269 .start = AAEC_FLASH_BASE,
270 .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE,
271 .flags = IORESOURCE_MEM,
272};
273
274static struct platform_device aaec2000_flash_device = {
275 .name = "armflash",
276 .id = 0,
277 .dev = {
278 .platform_data = &aaec2000_flash_data,
279 },
280 .num_resources = 1,
281 .resource = &aaec2000_flash_resource,
282};
283
284static int __init aaec2000_init(void)
285{
286 int i;
287
288 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
289 struct amba_device *d = amba_devs[i];
290 amba_device_register(d, &iomem_resource);
291 }
292
293 platform_device_register(&aaec2000_flash_device);
294
295 return 0;
296};
297arch_initcall(aaec2000_init);
298
diff --git a/arch/arm/mach-aaec2000/core.h b/arch/arm/mach-aaec2000/core.h
deleted file mode 100644
index 59501b573167..000000000000
--- a/arch/arm/mach-aaec2000/core.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * linux/arch/arm/mach-aaec2000/core.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/amba/bus.h>
13#include <linux/amba/clcd.h>
14
15struct sys_timer;
16
17extern struct sys_timer aaec2000_timer;
18extern void __init aaec2000_map_io(void);
19extern void __init aaec2000_init_irq(void);
20
21struct aaec2000_clcd_info {
22 struct clcd_panel panel;
23 void (*disable)(struct clcd_fb *);
24 void (*enable)(struct clcd_fb *);
25};
26
27extern void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *);
28
diff --git a/arch/arm/mach-aaec2000/include/mach/aaec2000.h b/arch/arm/mach-aaec2000/include/mach/aaec2000.h
deleted file mode 100644
index bc729c42f843..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/aaec2000.h
+++ /dev/null
@@ -1,207 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/aaec2000.h
3 *
4 * AAEC-2000 registers definition
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_AAEC2000_H
14#define __ASM_ARCH_AAEC2000_H
15
16#ifndef __ASM_ARCH_HARDWARE_H
17#error You must include hardware.h not this file
18#endif /* __ASM_ARCH_HARDWARE_H */
19
20/* Chip selects */
21#define AAEC_CS0 0x00000000
22#define AAEC_CS1 0x10000000
23#define AAEC_CS2 0x20000000
24#define AAEC_CS3 0x30000000
25
26/* Flash */
27#define AAEC_FLASH_BASE AAEC_CS0
28#define AAEC_FLASH_SIZE SZ_64M
29
30/* Interrupt controller */
31#define IRQ_BASE __REG(0x80000500)
32#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
33#define IRQ_INTRSR __REG(0x80000504) /* Int Raw (unmasked) Status */
34#define IRQ_INTENS __REG(0x80000508) /* Int Enable Set */
35#define IRQ_INTENC __REG(0x8000050c) /* Int Enable Clear */
36
37/* UART 1 */
38#define UART1_BASE __REG(0x80000600)
39#define UART1_DR __REG(0x80000600) /* Data/FIFO Register */
40#define UART1_LCR __REG(0x80000604) /* Link Control Register */
41#define UART1_BRCR __REG(0x80000608) /* Baud Rate Control Register */
42#define UART1_CR __REG(0x8000060c) /* Control Register */
43#define UART1_SR __REG(0x80000610) /* Status Register */
44#define UART1_INT __REG(0x80000614) /* Interrupt Status Register */
45#define UART1_INTM __REG(0x80000618) /* Interrupt Mask Register */
46#define UART1_INTRES __REG(0x8000061c) /* Int Result (masked status) Register */
47
48/* UART 2 */
49#define UART2_BASE __REG(0x80000700)
50#define UART2_DR __REG(0x80000700) /* Data/FIFO Register */
51#define UART2_LCR __REG(0x80000704) /* Link Control Register */
52#define UART2_BRCR __REG(0x80000708) /* Baud Rate Control Register */
53#define UART2_CR __REG(0x8000070c) /* Control Register */
54#define UART2_SR __REG(0x80000710) /* Status Register */
55#define UART2_INT __REG(0x80000714) /* Interrupt Status Register */
56#define UART2_INTM __REG(0x80000718) /* Interrupt Mask Register */
57#define UART2_INTRES __REG(0x8000071c) /* Int Result (masked status) Register */
58
59/* UART 3 */
60#define UART3_BASE __REG(0x80000800)
61#define UART3_DR __REG(0x80000800) /* Data/FIFO Register */
62#define UART3_LCR __REG(0x80000804) /* Link Control Register */
63#define UART3_BRCR __REG(0x80000808) /* Baud Rate Control Register */
64#define UART3_CR __REG(0x8000080c) /* Control Register */
65#define UART3_SR __REG(0x80000810) /* Status Register */
66#define UART3_INT __REG(0x80000814) /* Interrupt Status Register */
67#define UART3_INTM __REG(0x80000818) /* Interrupt Mask Register */
68#define UART3_INTRES __REG(0x8000081c) /* Int Result (masked status) Register */
69
70/* These are used in some places */
71#define _UART1_BASE __PREG(UART1_BASE)
72#define _UART2_BASE __PREG(UART2_BASE)
73#define _UART3_BASE __PREG(UART3_BASE)
74
75/* UART Registers Offsets */
76#define UART_DR 0x00
77#define UART_LCR 0x04
78#define UART_BRCR 0x08
79#define UART_CR 0x0c
80#define UART_SR 0x10
81#define UART_INT 0x14
82#define UART_INTM 0x18
83#define UART_INTRES 0x1c
84
85/* UART_LCR Bitmask */
86#define UART_LCR_BRK (1 << 0) /* Send Break */
87#define UART_LCR_PEN (1 << 1) /* Parity Enable */
88#define UART_LCR_EP (1 << 2) /* Even/Odd Parity */
89#define UART_LCR_S2 (1 << 3) /* One/Two Stop bits */
90#define UART_LCR_FIFO (1 << 4) /* FIFO Enable */
91#define UART_LCR_WL5 (0 << 5) /* Word Length - 5 bits */
92#define UART_LCR_WL6 (1 << 5) /* Word Length - 6 bits */
93#define UART_LCR_WL7 (1 << 6) /* Word Length - 7 bits */
94#define UART_LCR_WL8 (1 << 7) /* Word Length - 8 bits */
95
96/* UART_CR Bitmask */
97#define UART_CR_EN (1 << 0) /* UART Enable */
98#define UART_CR_SIR (1 << 1) /* IrDA SIR Enable */
99#define UART_CR_SIRLP (1 << 2) /* Low Power IrDA Enable */
100#define UART_CR_RXP (1 << 3) /* Receive Pin Polarity */
101#define UART_CR_TXP (1 << 4) /* Transmit Pin Polarity */
102#define UART_CR_MXP (1 << 5) /* Modem Pin Polarity */
103#define UART_CR_LOOP (1 << 6) /* Loopback Mode */
104
105/* UART_SR Bitmask */
106#define UART_SR_CTS (1 << 0) /* Clear To Send Status */
107#define UART_SR_DSR (1 << 1) /* Data Set Ready Status */
108#define UART_SR_DCD (1 << 2) /* Data Carrier Detect Status */
109#define UART_SR_TxBSY (1 << 3) /* Transmitter Busy Status */
110#define UART_SR_RxFE (1 << 4) /* Receive FIFO Empty Status */
111#define UART_SR_TxFF (1 << 5) /* Transmit FIFO Full Status */
112#define UART_SR_RxFF (1 << 6) /* Receive FIFO Full Status */
113#define UART_SR_TxFE (1 << 7) /* Transmit FIFO Empty Status */
114
115/* UART_INT Bitmask */
116#define UART_INT_RIS (1 << 0) /* Rx Interrupt */
117#define UART_INT_TIS (1 << 1) /* Tx Interrupt */
118#define UART_INT_MIS (1 << 2) /* Modem Interrupt */
119#define UART_INT_RTIS (1 << 3) /* Receive Timeout Interrupt */
120
121/* Timer 1 */
122#define TIMER1_BASE __REG(0x80000c00)
123#define TIMER1_LOAD __REG(0x80000c00) /* Timer 1 Load Register */
124#define TIMER1_VAL __REG(0x80000c04) /* Timer 1 Value Register */
125#define TIMER1_CTRL __REG(0x80000c08) /* Timer 1 Control Register */
126#define TIMER1_CLEAR __REG(0x80000c0c) /* Timer 1 Clear Register */
127
128/* Timer 2 */
129#define TIMER2_BASE __REG(0x80000d00)
130#define TIMER2_LOAD __REG(0x80000d00) /* Timer 2 Load Register */
131#define TIMER2_VAL __REG(0x80000d04) /* Timer 2 Value Register */
132#define TIMER2_CTRL __REG(0x80000d08) /* Timer 2 Control Register */
133#define TIMER2_CLEAR __REG(0x80000d0c) /* Timer 2 Clear Register */
134
135/* Timer 3 */
136#define TIMER3_BASE __REG(0x80000e00)
137#define TIMER3_LOAD __REG(0x80000e00) /* Timer 3 Load Register */
138#define TIMER3_VAL __REG(0x80000e04) /* Timer 3 Value Register */
139#define TIMER3_CTRL __REG(0x80000e08) /* Timer 3 Control Register */
140#define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */
141
142/* Timer Control register bits */
143#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start Timer) */
144#define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */
145#define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */
146#define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */
147#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2) */
148
149/* Power and State Control */
150#define POWER_BASE __REG(0x80000400)
151#define POWER_PWRSR __REG(0x80000400) /* Power Status Register */
152#define POWER_PWRCNT __REG(0x80000404) /* Power/Clock control */
153#define POWER_HALT __REG(0x80000408) /* Power Idle Mode */
154#define POWER_STDBY __REG(0x8000040c) /* Power Standby Mode */
155#define POWER_BLEOI __REG(0x80000410) /* Battery Low End of Interrupt */
156#define POWER_MCEOI __REG(0x80000414) /* Media Changed EoI */
157#define POWER_TEOI __REG(0x80000418) /* Tick EoI */
158#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
159#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
160
161/* GPIO Registers */
162#define AAEC_GPIO_PHYS 0x80000e00
163
164#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00)
165#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04)
166#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08)
167#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c)
168#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10)
169#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14)
170#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18)
171#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c)
172#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20)
173#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24)
174#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28)
175#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c)
176#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30)
177#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34)
178#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38)
179#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c)
180#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40)
181#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44)
182#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48)
183#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c)
184#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50)
185#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54)
186#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58)
187#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c)
188#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60)
189#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64)
190#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68)
191#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c)
192#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70)
193#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74)
194#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78)
195#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c)
196#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80)
197#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84)
198
199#define AAEC_GPIO_PINMUX_PE0CON (1 << 0)
200#define AAEC_GPIO_PINMUX_PD0CON (1 << 1)
201#define AAEC_GPIO_PINMUX_CODECON (1 << 2)
202#define AAEC_GPIO_PINMUX_UART3CON (1 << 3)
203
204/* LCD Controller */
205#define AAEC_CLCD_PHYS 0x80003000
206
207#endif /* __ARM_ARCH_AAEC2000_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/aaed2000.h b/arch/arm/mach-aaec2000/include/mach/aaed2000.h
deleted file mode 100644
index f821295ca71b..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/aaed2000.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/aaed2000.h
3 *
4 * AAED-2000 specific bits definition
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_AAED2000_H
14#define __ASM_ARCH_AAED2000_H
15
16/* External GPIOs. */
17
18#define EXT_GPIO_PBASE AAEC_CS3
19#define EXT_GPIO_VBASE 0xf8100000
20#define EXT_GPIO_LENGTH 0x00001000
21
22#define __ext_gpio_p2v(x) ((x) - EXT_GPIO_PBASE + EXT_GPIO_VBASE)
23#define __ext_gpio_v2p(x) ((x) + EXT_GPIO_PBASE - EXT_GPIO_VBASE)
24
25#define __EXT_GPIO_REG(x) (*((volatile u32 *)__ext_gpio_p2v(x)))
26#define __EXT_GPIO_PREG(x) (__ext_gpio_v2p((u32)&(x)))
27
28#define AAED_EXT_GPIO __EXT_GPIO_REG(EXT_GPIO_PBASE)
29
30#define AAED_EGPIO_KBD_SCAN 0x00003fff /* Keyboard scan data */
31#define AAED_EGPIO_PWR_INT 0x00008fff /* Smart battery charger interrupt */
32#define AAED_EGPIO_SWITCHED 0x000f0000 /* DIP Switches */
33#define AAED_EGPIO_USB_VBUS 0x00400000 /* USB Vbus sense */
34#define AAED_EGPIO_LCD_PWR_EN 0x02000000 /* LCD and backlight PWR enable */
35#define AAED_EGPIO_nLED0 0x20000000 /* LED 0 */
36#define AAED_EGPIO_nLED1 0x20000000 /* LED 1 */
37#define AAED_EGPIO_nLED2 0x20000000 /* LED 2 */
38
39
40#endif /* __ARM_ARCH_AAED2000_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/debug-macro.S b/arch/arm/mach-aaec2000/include/mach/debug-macro.S
deleted file mode 100644
index bc7ad5561c4c..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/debug-macro.S
+++ /dev/null
@@ -1,35 +0,0 @@
1/* arch/arm/mach-aaec2000/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (c) 2005 Nicolas Bellido Y Ortega
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include "hardware.h"
13 .macro addruart, rp, rv
14 mov \rp, 0x00000800
15 orr \rv, \rp, #io_p2v(0x80000000) @ virtual
16 orr \rp, \rp, #0x80000000 @ physical
17 .endm
18
19 .macro senduart,rd,rx
20 str \rd, [\rx, #0]
21 .endm
22
23 .macro busyuart,rd,rx
241002: ldr \rd, [\rx, #0x10]
25 tst \rd, #(1 << 7)
26 beq 1002b
27 .endm
28
29 .macro waituart,rd,rx
30#if 0
311001: ldr \rd, [\rx, #0x10]
32 tst \rd, #(1 << 5)
33 beq 1001b
34#endif
35 .endm
diff --git a/arch/arm/mach-aaec2000/include/mach/entry-macro.S b/arch/arm/mach-aaec2000/include/mach/entry-macro.S
deleted file mode 100644
index c8fb34469007..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/entry-macro.S
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper for aaec-2000 based platforms
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13#include <mach/irqs.h>
14
15 .macro disable_fiq
16 .endm
17
18 .macro get_irqnr_preamble, base, tmp
19 .endm
20
21 .macro arch_ret_to_user, tmp1, tmp2
22 .endm
23
24 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
25 mov r4, #0xf8000000
26 add r4, r4, #0x00000500
27 mov \base, r4
28 ldr \irqstat, [\base, #0]
29 cmp \irqstat, #0
30 bne 1001f
31 ldr \irqnr, =NR_IRQS+1
32 b 1003f
331001: mov \irqnr, #0
341002: ands \tmp, \irqstat, #1
35 mov \irqstat, \irqstat, LSR #1
36 add \irqnr, \irqnr, #1
37 beq 1002b
38 sub \irqnr, \irqnr, #1
391003:
40 .endm
diff --git a/arch/arm/mach-aaec2000/include/mach/hardware.h b/arch/arm/mach-aaec2000/include/mach/hardware.h
deleted file mode 100644
index 965a6f6672d6..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/hardware.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/hardware.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H
13
14#include <asm/sizes.h>
15#include <mach/aaec2000.h>
16
17/* The kernel is loaded at physical address 0xf8000000.
18 * We map the IO space a bit after
19 */
20#define PIO_APB_BASE 0x80000000
21#define VIO_APB_BASE 0xf8000000
22#define IO_APB_LENGTH 0x2000
23#define PIO_AHB_BASE 0x80002000
24#define VIO_AHB_BASE 0xf8002000
25#define IO_AHB_LENGTH 0x2000
26
27#define VIO_BASE VIO_APB_BASE
28#define PIO_BASE PIO_APB_BASE
29
30#define io_p2v(x) ( (x) - PIO_BASE + VIO_BASE )
31#define io_v2p(x) ( (x) + PIO_BASE - VIO_BASE )
32
33#ifndef __ASSEMBLY__
34
35#include <asm/types.h>
36
37/* FIXME: Is it needed to optimize this a la pxa ?? */
38#define __REG(x) (*((volatile u32 *)io_p2v(x)))
39#define __PREG(x) (io_v2p((u32)&(x)))
40
41#else /* __ASSEMBLY__ */
42
43#define __REG(x) io_p2v(x)
44#define __PREG(x) io_v2p(x)
45
46#endif
47
48#include "aaec2000.h"
49
50#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/io.h b/arch/arm/mach-aaec2000/include/mach/io.h
deleted file mode 100644
index ab4fe5d20eaf..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/io.h
3 *
4 * Copied from asm/arch/sa1100/io.h
5 */
6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H
8
9#define IO_SPACE_LIMIT 0xffffffff
10
11/*
12 * We don't actually have real ISA nor PCI buses, but there is so many
13 * drivers out there that might just work if we fake them...
14 */
15#define __io(a) __typesafe_io(a)
16#define __mem_pci(a) (a)
17
18#endif
diff --git a/arch/arm/mach-aaec2000/include/mach/irqs.h b/arch/arm/mach-aaec2000/include/mach/irqs.h
deleted file mode 100644
index bf45c6d2f294..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/irqs.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/irqs.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H
13
14
15#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */
16#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */
17#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */
18#define INT_MV_FIQ 3 /* Media Changed Interrupt */
19#define INT_SC 4 /* Sound Codec Interrupt */
20#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */
21#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */
22#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */
23#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */
24#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */
25#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */
26#define INT_TICK 11 /* 64Hz Tick Interrupt */
27#define INT_UART1 12 /* UART1 Interrupt */
28#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */
29#define INT_LCD 14 /* LCD Interrupt */
30#define INT_SSI 15 /* SSI End of Transfer Interrupt */
31#define INT_UART3 16 /* UART3 Interrupt */
32#define INT_SCI 17 /* SCI Interrupt */
33#define INT_AAC 18 /* Advanced Audio Codec Interrupt */
34#define INT_MMC 19 /* MMC Interrupt */
35#define INT_USB 20 /* USB Interrupt */
36#define INT_DMA 21 /* DMA Interrupt */
37#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */
38#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */
39#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */
40#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */
41#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */
42#define INT_BMI 27 /* BMI Interrupt */
43
44#define NR_IRQS (INT_BMI + 1)
45
46#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/memory.h b/arch/arm/mach-aaec2000/include/mach/memory.h
deleted file mode 100644
index 4f93c567a35a..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/memory.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/memory.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MEMORY_H
12#define __ASM_ARCH_MEMORY_H
13
14
15#define PHYS_OFFSET UL(0xf0000000)
16
17#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/system.h b/arch/arm/mach-aaec2000/include/mach/system.h
deleted file mode 100644
index fe08ca1add6f..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/system.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * arch/arm/mach-aaed2000/include/mach/system.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14static inline void arch_idle(void)
15{
16 cpu_do_idle();
17}
18
19static inline void arch_reset(char mode, const char *cmd)
20{
21 cpu_reset(0);
22}
23
24#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/timex.h b/arch/arm/mach-aaec2000/include/mach/timex.h
deleted file mode 100644
index 6c8edf4a8828..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/timex.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/timex.h
3 *
4 * AAEC-2000 Architecture timex specification
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16#define CLOCK_TICK_RATE 508000
17
18#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/uncompress.h b/arch/arm/mach-aaec2000/include/mach/uncompress.h
deleted file mode 100644
index 381ecad1a1bb..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/uncompress.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/uncompress.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_UNCOMPRESS_H
12#define __ASM_ARCH_UNCOMPRESS_H
13
14#include "hardware.h"
15
16#define UART(x) (*(volatile unsigned long *)(serial_port + (x)))
17
18static void putc(int c)
19{
20 unsigned long serial_port;
21 do {
22 serial_port = _UART3_BASE;
23 if (UART(UART_CR) & UART_CR_EN) break;
24 serial_port = _UART1_BASE;
25 if (UART(UART_CR) & UART_CR_EN) break;
26 serial_port = _UART2_BASE;
27 if (UART(UART_CR) & UART_CR_EN) break;
28 return;
29 } while (0);
30
31 /* wait for space in the UART's transmitter */
32 while ((UART(UART_SR) & UART_SR_TxFF))
33 barrier();
34
35 /* send the character out. */
36 UART(UART_DR) = c;
37}
38
39static inline void flush(void)
40{
41}
42
43#define arch_decomp_setup()
44#define arch_decomp_wdog()
45
46#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-aaec2000/include/mach/vmalloc.h b/arch/arm/mach-aaec2000/include/mach/vmalloc.h
deleted file mode 100644
index a6299e8321bd..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * arch/arm/mach-aaec2000/include/mach/vmalloc.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_VMALLOC_H
12#define __ASM_ARCH_VMALLOC_H
13
14#define VMALLOC_END 0xd0000000UL
15
16#endif /* __ASM_ARCH_VMALLOC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-29 02:31:40 -0400