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-rw-r--r--arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h27
-rw-r--r--arch/mips/lantiq/prom.h5
-rw-r--r--arch/mips/lantiq/xway/Makefile6
-rw-r--r--arch/mips/lantiq/xway/prom-ase.c39
-rw-r--r--arch/mips/lantiq/xway/prom-xway.c54
-rw-r--r--arch/mips/lantiq/xway/prom.c115
6 files changed, 144 insertions, 102 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
index 8bc9030525c0..af6c0f063130 100644
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
@@ -17,17 +17,32 @@
17#define SOC_ID_DANUBE1 0x129 17#define SOC_ID_DANUBE1 0x129
18#define SOC_ID_DANUBE2 0x12B 18#define SOC_ID_DANUBE2 0x12B
19#define SOC_ID_TWINPASS 0x12D 19#define SOC_ID_TWINPASS 0x12D
20#define SOC_ID_AMAZON_SE 0x152 20#define SOC_ID_AMAZON_SE_1 0x152 /* 50601 */
21#define SOC_ID_AMAZON_SE_2 0x153 /* 50600 */
21#define SOC_ID_ARX188 0x16C 22#define SOC_ID_ARX188 0x16C
22#define SOC_ID_ARX168 0x16D 23#define SOC_ID_ARX168_1 0x16D
24#define SOC_ID_ARX168_2 0x16E
23#define SOC_ID_ARX182 0x16F 25#define SOC_ID_ARX182 0x16F
24 26#define SOC_ID_GRX188 0x170
25/* SoC Types */ 27#define SOC_ID_GRX168 0x171
28
29#define SOC_ID_VRX288 0x1C0 /* v1.1 */
30#define SOC_ID_VRX282 0x1C1 /* v1.1 */
31#define SOC_ID_VRX268 0x1C2 /* v1.1 */
32#define SOC_ID_GRX268 0x1C8 /* v1.1 */
33#define SOC_ID_GRX288 0x1C9 /* v1.1 */
34#define SOC_ID_VRX288_2 0x00B /* v1.2 */
35#define SOC_ID_VRX268_2 0x00C /* v1.2 */
36#define SOC_ID_GRX288_2 0x00D /* v1.2 */
37#define SOC_ID_GRX282_2 0x00E /* v1.2 */
38
39 /* SoC Types */
26#define SOC_TYPE_DANUBE 0x01 40#define SOC_TYPE_DANUBE 0x01
27#define SOC_TYPE_TWINPASS 0x02 41#define SOC_TYPE_TWINPASS 0x02
28#define SOC_TYPE_AR9 0x03 42#define SOC_TYPE_AR9 0x03
29#define SOC_TYPE_VR9 0x04 43#define SOC_TYPE_VR9 0x04 /* v1.1 */
30#define SOC_TYPE_AMAZON_SE 0x05 44#define SOC_TYPE_VR9_2 0x05 /* v1.2 */
45#define SOC_TYPE_AMAZON_SE 0x06
31 46
32/* ASC0/1 - serial port */ 47/* ASC0/1 - serial port */
33#define LTQ_ASC0_BASE_ADDR 0x1E100400 48#define LTQ_ASC0_BASE_ADDR 0x1E100400
diff --git a/arch/mips/lantiq/prom.h b/arch/mips/lantiq/prom.h
index b4229d94280f..90070a54adbe 100644
--- a/arch/mips/lantiq/prom.h
+++ b/arch/mips/lantiq/prom.h
@@ -10,16 +10,21 @@
10#define _LTQ_PROM_H__ 10#define _LTQ_PROM_H__
11 11
12#define LTQ_SYS_TYPE_LEN 0x100 12#define LTQ_SYS_TYPE_LEN 0x100
13#define LTQ_SYS_REV_LEN 0x10
13 14
14struct ltq_soc_info { 15struct ltq_soc_info {
15 unsigned char *name; 16 unsigned char *name;
16 unsigned int rev; 17 unsigned int rev;
18 unsigned char rev_type[LTQ_SYS_REV_LEN];
19 unsigned int srev;
17 unsigned int partnum; 20 unsigned int partnum;
18 unsigned int type; 21 unsigned int type;
19 unsigned char sys_type[LTQ_SYS_TYPE_LEN]; 22 unsigned char sys_type[LTQ_SYS_TYPE_LEN];
23 unsigned char *compatible;
20}; 24};
21 25
22extern void ltq_soc_detect(struct ltq_soc_info *i); 26extern void ltq_soc_detect(struct ltq_soc_info *i);
23extern void ltq_soc_setup(void); 27extern void ltq_soc_setup(void);
28extern void ltq_soc_init(void);
24 29
25#endif 30#endif
diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile
index c517f2e77563..42d5fda4f5c6 100644
--- a/arch/mips/lantiq/xway/Makefile
+++ b/arch/mips/lantiq/xway/Makefile
@@ -1,7 +1,7 @@
1obj-y := pmu.o ebu.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o 1obj-y := prom.o pmu.o ebu.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o
2 2
3obj-$(CONFIG_SOC_XWAY) += clk-xway.o prom-xway.o setup-xway.o 3obj-$(CONFIG_SOC_XWAY) += clk-xway.o setup-xway.o
4obj-$(CONFIG_SOC_AMAZON_SE) += clk-ase.o prom-ase.o setup-ase.o 4obj-$(CONFIG_SOC_AMAZON_SE) += clk-ase.o setup-ase.o
5 5
6obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o 6obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
7obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o 7obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o
diff --git a/arch/mips/lantiq/xway/prom-ase.c b/arch/mips/lantiq/xway/prom-ase.c
deleted file mode 100644
index ae4959ae865c..000000000000
--- a/arch/mips/lantiq/xway/prom-ase.c
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */
8
9#include <linux/export.h>
10#include <linux/clk.h>
11#include <asm/bootinfo.h>
12#include <asm/time.h>
13
14#include <lantiq_soc.h>
15
16#include "../prom.h"
17
18#define SOC_AMAZON_SE "Amazon_SE"
19
20#define PART_SHIFT 12
21#define PART_MASK 0x0FFFFFFF
22#define REV_SHIFT 28
23#define REV_MASK 0xF0000000
24
25void __init ltq_soc_detect(struct ltq_soc_info *i)
26{
27 i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
28 i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
29 switch (i->partnum) {
30 case SOC_ID_AMAZON_SE:
31 i->name = SOC_AMAZON_SE;
32 i->type = SOC_TYPE_AMAZON_SE;
33 break;
34
35 default:
36 unreachable();
37 break;
38 }
39}
diff --git a/arch/mips/lantiq/xway/prom-xway.c b/arch/mips/lantiq/xway/prom-xway.c
deleted file mode 100644
index 2228133ca356..000000000000
--- a/arch/mips/lantiq/xway/prom-xway.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */
8
9#include <linux/export.h>
10#include <linux/clk.h>
11#include <asm/bootinfo.h>
12#include <asm/time.h>
13
14#include <lantiq_soc.h>
15
16#include "../prom.h"
17
18#define SOC_DANUBE "Danube"
19#define SOC_TWINPASS "Twinpass"
20#define SOC_AR9 "AR9"
21
22#define PART_SHIFT 12
23#define PART_MASK 0x0FFFFFFF
24#define REV_SHIFT 28
25#define REV_MASK 0xF0000000
26
27void __init ltq_soc_detect(struct ltq_soc_info *i)
28{
29 i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
30 i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
31 switch (i->partnum) {
32 case SOC_ID_DANUBE1:
33 case SOC_ID_DANUBE2:
34 i->name = SOC_DANUBE;
35 i->type = SOC_TYPE_DANUBE;
36 break;
37
38 case SOC_ID_TWINPASS:
39 i->name = SOC_TWINPASS;
40 i->type = SOC_TYPE_DANUBE;
41 break;
42
43 case SOC_ID_ARX188:
44 case SOC_ID_ARX168:
45 case SOC_ID_ARX182:
46 i->name = SOC_AR9;
47 i->type = SOC_TYPE_AR9;
48 break;
49
50 default:
51 unreachable();
52 break;
53 }
54}
diff --git a/arch/mips/lantiq/xway/prom.c b/arch/mips/lantiq/xway/prom.c
new file mode 100644
index 000000000000..248429ab2622
--- /dev/null
+++ b/arch/mips/lantiq/xway/prom.c
@@ -0,0 +1,115 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
5 *
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 */
8
9#include <linux/export.h>
10#include <linux/clk.h>
11#include <asm/bootinfo.h>
12#include <asm/time.h>
13
14#include <lantiq_soc.h>
15
16#include "../prom.h"
17
18#define SOC_DANUBE "Danube"
19#define SOC_TWINPASS "Twinpass"
20#define SOC_AMAZON_SE "Amazon_SE"
21#define SOC_AR9 "AR9"
22#define SOC_GR9 "GR9"
23#define SOC_VR9 "VR9"
24
25#define COMP_DANUBE "lantiq,danube"
26#define COMP_TWINPASS "lantiq,twinpass"
27#define COMP_AMAZON_SE "lantiq,ase"
28#define COMP_AR9 "lantiq,ar9"
29#define COMP_GR9 "lantiq,gr9"
30#define COMP_VR9 "lantiq,vr9"
31
32#define PART_SHIFT 12
33#define PART_MASK 0x0FFFFFFF
34#define REV_SHIFT 28
35#define REV_MASK 0xF0000000
36
37void __init ltq_soc_detect(struct ltq_soc_info *i)
38{
39 i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
40 i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
41 sprintf(i->rev_type, "1.%d", i->rev);
42 switch (i->partnum) {
43 case SOC_ID_DANUBE1:
44 case SOC_ID_DANUBE2:
45 i->name = SOC_DANUBE;
46 i->type = SOC_TYPE_DANUBE;
47 i->compatible = COMP_DANUBE;
48 break;
49
50 case SOC_ID_TWINPASS:
51 i->name = SOC_TWINPASS;
52 i->type = SOC_TYPE_DANUBE;
53 i->compatible = COMP_TWINPASS;
54 break;
55
56 case SOC_ID_ARX188:
57 case SOC_ID_ARX168_1:
58 case SOC_ID_ARX168_2:
59 case SOC_ID_ARX182:
60 i->name = SOC_AR9;
61 i->type = SOC_TYPE_AR9;
62 i->compatible = COMP_AR9;
63 break;
64
65 case SOC_ID_GRX188:
66 case SOC_ID_GRX168:
67 i->name = SOC_GR9;
68 i->type = SOC_TYPE_AR9;
69 i->compatible = COMP_GR9;
70 break;
71
72 case SOC_ID_AMAZON_SE_1:
73 case SOC_ID_AMAZON_SE_2:
74#ifdef CONFIG_PCI
75 panic("ase is only supported for non pci kernels");
76#endif
77 i->name = SOC_AMAZON_SE;
78 i->type = SOC_TYPE_AMAZON_SE;
79 i->compatible = COMP_AMAZON_SE;
80 break;
81
82 case SOC_ID_VRX282:
83 case SOC_ID_VRX268:
84 case SOC_ID_VRX288:
85 i->name = SOC_VR9;
86 i->type = SOC_TYPE_VR9;
87 i->compatible = COMP_VR9;
88 break;
89
90 case SOC_ID_GRX268:
91 case SOC_ID_GRX288:
92 i->name = SOC_GR9;
93 i->type = SOC_TYPE_VR9;
94 i->compatible = COMP_GR9;
95 break;
96
97 case SOC_ID_VRX268_2:
98 case SOC_ID_VRX288_2:
99 i->name = SOC_VR9;
100 i->type = SOC_TYPE_VR9_2;
101 i->compatible = COMP_VR9;
102 break;
103
104 case SOC_ID_GRX282_2:
105 case SOC_ID_GRX288_2:
106 i->name = SOC_GR9;
107 i->type = SOC_TYPE_VR9_2;
108 i->compatible = COMP_GR9;
109 break;
110
111 default:
112 unreachable();
113 break;
114 }
115}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 20:17:58 -0500