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-rw-r--r--arch/powerpc/platforms/512x/clock-commonclk.c50
1 files changed, 16 insertions, 34 deletions
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c
index 389c0adde328..29b5fa691f37 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -696,46 +696,28 @@ static void mpc5121_clk_register_of_provider(struct device_node *np)
696 */ 696 */
697static void mpc5121_clk_provide_migration_support(void) 697static void mpc5121_clk_provide_migration_support(void)
698{ 698{
699 int idx;
700 char name[32];
701
702 /*
703 * provide "pre-CCF" alias clock names for peripheral drivers
704 * which have not yet been adjusted to do OF based clock lookups
705 */
706 clk_register_clkdev(clks[MPC512x_CLK_REF], "ref_clk", NULL);
707 clk_register_clkdev(clks[MPC512x_CLK_SYS], "sys_clk", NULL);
708 clk_register_clkdev(clks[MPC512x_CLK_VIU], "viu_clk", NULL);
709 clk_register_clkdev(clks[MPC512x_CLK_NFC], "nfc_clk", NULL);
710 clk_register_clkdev(clks[MPC512x_CLK_USB1], "usb1_clk", NULL);
711 clk_register_clkdev(clks[MPC512x_CLK_USB2], "usb2_clk", NULL);
712 for (idx = 0; idx < NR_PSCS; idx++) {
713 snprintf(name, sizeof(name), "psc%d_mclk", idx);
714 clk_register_clkdev(clks[MPC512x_CLK_PSC0_MCLK + idx],
715 name, NULL);
716 }
717 for (idx = 0; idx < NR_MSCANS; idx++) {
718 snprintf(name, sizeof(name), "mscan%d_mclk", idx);
719 clk_register_clkdev(clks[MPC512x_CLK_MSCAN0_MCLK + idx],
720 name, NULL);
721 }
722 clk_register_clkdev(clks[MPC512x_CLK_SPDIF_MCLK], "spdif_mclk", NULL);
723 699
724 /* 700 /*
725 * pre-enable those clock items which are not yet appropriately 701 * pre-enable those clock items which are not yet appropriately
726 * acquired by their peripheral driver 702 * acquired by their peripheral driver
703 *
704 * the PCI clock cannot get acquired by its peripheral driver,
705 * because for this platform the driver won't probe(), instead
706 * initialization is done from within the .setup_arch() routine
707 * at a point in time where the clock provider has not been
708 * setup yet and thus isn't available yet
709 *
710 * so we "pre-enable" the clock here, to not have the clock
711 * subsystem automatically disable this item in a late init call
712 *
713 * this PCI clock pre-enable workaround only applies when there
714 * are device tree nodes for PCI and thus the peripheral driver
715 * has attached to bridges, otherwise the PCI clock remains
716 * unused and so it gets disabled
727 */ 717 */
728 clk_prepare_enable(clks[MPC512x_CLK_PSC_FIFO]);
729 clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */ 718 clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
730 clk_prepare_enable(clks[MPC512x_CLK_FEC]); /* network, NFS */ 719 if (of_find_compatible_node(NULL, "pci", "fsl,mpc5121-pci"))
731 clk_prepare_enable(clks[MPC512x_CLK_DIU]); /* display */ 720 clk_prepare_enable(clks[MPC512x_CLK_PCI]);
732 clk_prepare_enable(clks[MPC512x_CLK_I2C]); /* I2C */
733 for (idx = 0; idx < NR_PSCS; idx++) /* PSC ipg */
734 clk_prepare_enable(clks[MPC512x_CLK_PSC0 + idx]);
735 clk_prepare_enable(clks[MPC512x_CLK_BDLC]); /* MSCAN ipg */
736 for (idx = 0; idx < NR_MSCANS; idx++) /* MSCAN mclk */
737 clk_prepare_enable(clks[MPC512x_CLK_MSCAN0_MCLK + idx]);
738 clk_prepare_enable(clks[MPC512x_CLK_PCI]); /* PCI */
739} 721}
740 722
741/* 723/*