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-rw-r--r--arch/arm/mach-shmobile/clock-r8a7778.c2
-rw-r--r--drivers/spi/spi-atmel.c3
-rw-r--r--drivers/spi/spi-bfin5xx.c1
-rw-r--r--drivers/spi/spi-sh-hspi.c4
-rw-r--r--drivers/spi/spi-sirf.c20
5 files changed, 24 insertions, 6 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index 2009a9bc6356..9989b1b06ffd 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -170,7 +170,7 @@ static struct clk mstp_clks[MSTP_NR] = {
170 [MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */ 170 [MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */
171 [MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */ 171 [MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */
172 [MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */ 172 [MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */
173 [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */ 173 [MSTP007] = SH_CLK_MSTP32(&s_clk, MSTPCR0, 7, 0), /* HSPI */
174}; 174};
175 175
176static struct clk_lookup lookups[] = { 176static struct clk_lookup lookups[] = {
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 8005f9869481..079e6b1b0cdb 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -1115,8 +1115,11 @@ static int atmel_spi_one_transfer(struct spi_master *master,
1115 atmel_spi_next_xfer_pio(master, xfer); 1115 atmel_spi_next_xfer_pio(master, xfer);
1116 } 1116 }
1117 1117
1118 /* interrupts are disabled, so free the lock for schedule */
1119 atmel_spi_unlock(as);
1118 ret = wait_for_completion_timeout(&as->xfer_completion, 1120 ret = wait_for_completion_timeout(&as->xfer_completion,
1119 SPI_DMA_TIMEOUT); 1121 SPI_DMA_TIMEOUT);
1122 atmel_spi_lock(as);
1120 if (WARN_ON(ret == 0)) { 1123 if (WARN_ON(ret == 0)) {
1121 dev_err(&spi->dev, 1124 dev_err(&spi->dev,
1122 "spi trasfer timeout, err %d\n", ret); 1125 "spi trasfer timeout, err %d\n", ret);
diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c
index 55e57c3eb9bd..ebf720b88a2a 100644
--- a/drivers/spi/spi-bfin5xx.c
+++ b/drivers/spi/spi-bfin5xx.c
@@ -12,6 +12,7 @@
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/gpio.h>
15#include <linux/slab.h> 16#include <linux/slab.h>
16#include <linux/io.h> 17#include <linux/io.h>
17#include <linux/ioport.h> 18#include <linux/ioport.h>
diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c
index 9009456bdf4d..c8e795ef2e13 100644
--- a/drivers/spi/spi-sh-hspi.c
+++ b/drivers/spi/spi-sh-hspi.c
@@ -244,9 +244,9 @@ static int hspi_probe(struct platform_device *pdev)
244 return -ENOMEM; 244 return -ENOMEM;
245 } 245 }
246 246
247 clk = clk_get(NULL, "shyway_clk"); 247 clk = clk_get(&pdev->dev, NULL);
248 if (IS_ERR(clk)) { 248 if (IS_ERR(clk)) {
249 dev_err(&pdev->dev, "shyway_clk is required\n"); 249 dev_err(&pdev->dev, "couldn't get clock\n");
250 ret = -EINVAL; 250 ret = -EINVAL;
251 goto error0; 251 goto error0;
252 } 252 }
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 1a77ad52812f..67d8909dcf39 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -287,8 +287,8 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id)
287 sspi->left_rx_word) 287 sspi->left_rx_word)
288 sspi->rx_word(sspi); 288 sspi->rx_word(sspi);
289 289
290 if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY 290 if (spi_stat & (SIRFSOC_SPI_TXFIFO_EMPTY |
291 | SIRFSOC_SPI_TXFIFO_THD_REACH)) 291 SIRFSOC_SPI_TXFIFO_THD_REACH))
292 while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) 292 while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS)
293 & SIRFSOC_SPI_FIFO_FULL)) && 293 & SIRFSOC_SPI_FIFO_FULL)) &&
294 sspi->left_tx_word) 294 sspi->left_tx_word)
@@ -470,7 +470,16 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value)
470 writel(regval, sspi->base + SIRFSOC_SPI_CTRL); 470 writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
471 } else { 471 } else {
472 int gpio = sspi->chipselect[spi->chip_select]; 472 int gpio = sspi->chipselect[spi->chip_select];
473 gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1); 473 switch (value) {
474 case BITBANG_CS_ACTIVE:
475 gpio_direction_output(gpio,
476 spi->mode & SPI_CS_HIGH ? 1 : 0);
477 break;
478 case BITBANG_CS_INACTIVE:
479 gpio_direction_output(gpio,
480 spi->mode & SPI_CS_HIGH ? 0 : 1);
481 break;
482 }
474 } 483 }
475} 484}
476 485
@@ -559,6 +568,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
559 regval &= ~SIRFSOC_SPI_CMD_MODE; 568 regval &= ~SIRFSOC_SPI_CMD_MODE;
560 sspi->tx_by_cmd = false; 569 sspi->tx_by_cmd = false;
561 } 570 }
571 /*
572 * set spi controller in RISC chipselect mode, we are controlling CS by
573 * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.
574 */
575 regval |= SIRFSOC_SPI_CS_IO_MODE;
562 writel(regval, sspi->base + SIRFSOC_SPI_CTRL); 576 writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
563 577
564 if (IS_DMA_VALID(t)) { 578 if (IS_DMA_VALID(t)) {