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-rw-r--r--Documentation/devicetree/bindings/mmc/synopsis-dw-mshc.txt4
-rw-r--r--drivers/mmc/host/dw_mmc.c14
2 files changed, 16 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/mmc/synopsis-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsis-dw-mshc.txt
index ae5f8e89e845..fdbf6863b00b 100644
--- a/Documentation/devicetree/bindings/mmc/synopsis-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsis-dw-mshc.txt
@@ -52,6 +52,9 @@ Optional properties:
52 is specified and the ciu clock is specified then we'll try to set the ciu 52 is specified and the ciu clock is specified then we'll try to set the ciu
53 clock to this at probe time. 53 clock to this at probe time.
54 54
55* clock-freq-min-max: Minimum and Maximum clock frequency for card output
56 clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by default.
57
55* num-slots: specifies the number of slots supported by the controller. 58* num-slots: specifies the number of slots supported by the controller.
56 The number of physical slots actually used could be equal or less than the 59 The number of physical slots actually used could be equal or less than the
57 value specified by num-slots. If this property is not specified, the value 60 value specified by num-slots. If this property is not specified, the value
@@ -97,6 +100,7 @@ board specific portions as listed below.
97 100
98 dwmmc0@12200000 { 101 dwmmc0@12200000 {
99 clock-frequency = <400000000>; 102 clock-frequency = <400000000>;
103 clock-freq-min-max = <400000 200000000>;
100 num-slots = <1>; 104 num-slots = <1>;
101 supports-highspeed; 105 supports-highspeed;
102 caps2-mmc-hs200-1_8v; 106 caps2-mmc-hs200-1_8v;
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index cca9aa6b11c5..50da6e330a15 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -50,6 +50,9 @@
50#define DW_MCI_RECV_STATUS 2 50#define DW_MCI_RECV_STATUS 2
51#define DW_MCI_DMA_THRESHOLD 16 51#define DW_MCI_DMA_THRESHOLD 16
52 52
53#define DW_MCI_FREQ_MAX 200000000 /* unit: HZ */
54#define DW_MCI_FREQ_MIN 400000 /* unit: HZ */
55
53#ifdef CONFIG_MMC_DW_IDMAC 56#ifdef CONFIG_MMC_DW_IDMAC
54#define IDMAC_INT_CLR (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \ 57#define IDMAC_INT_CLR (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
55 SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \ 58 SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \
@@ -1936,6 +1939,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
1936 struct dw_mci_slot *slot; 1939 struct dw_mci_slot *slot;
1937 const struct dw_mci_drv_data *drv_data = host->drv_data; 1940 const struct dw_mci_drv_data *drv_data = host->drv_data;
1938 int ctrl_id, ret; 1941 int ctrl_id, ret;
1942 u32 freq[2];
1939 u8 bus_width; 1943 u8 bus_width;
1940 1944
1941 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); 1945 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev);
@@ -1951,8 +1955,14 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
1951 slot->quirks = dw_mci_of_get_slot_quirks(host->dev, slot->id); 1955 slot->quirks = dw_mci_of_get_slot_quirks(host->dev, slot->id);
1952 1956
1953 mmc->ops = &dw_mci_ops; 1957 mmc->ops = &dw_mci_ops;
1954 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1958 if (of_property_read_u32_array(host->dev->of_node,
1955 mmc->f_max = host->bus_hz; 1959 "clock-freq-min-max", freq, 2)) {
1960 mmc->f_min = DW_MCI_FREQ_MIN;
1961 mmc->f_max = DW_MCI_FREQ_MAX;
1962 } else {
1963 mmc->f_min = freq[0];
1964 mmc->f_max = freq[1];
1965 }
1956 1966
1957 if (host->pdata->get_ocr) 1967 if (host->pdata->get_ocr)
1958 mmc->ocr_avail = host->pdata->get_ocr(id); 1968 mmc->ocr_avail = host->pdata->get_ocr(id);