diff options
-rw-r--r-- | arch/arm/mach-lpc32xx/clock.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index 8a4e7cb74ae1..f48c2e961b84 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c | |||
@@ -607,6 +607,19 @@ static struct clk clk_dma = { | |||
607 | .get_rate = local_return_parent_rate, | 607 | .get_rate = local_return_parent_rate, |
608 | }; | 608 | }; |
609 | 609 | ||
610 | static struct clk clk_pwm = { | ||
611 | .parent = &clk_pclk, | ||
612 | .enable = local_onoff_enable, | ||
613 | .enable_reg = LPC32XX_CLKPWR_PWM_CLK_CTRL, | ||
614 | .enable_mask = LPC32XX_CLKPWR_PWMCLK_PWM1CLK_EN | | ||
615 | LPC32XX_CLKPWR_PWMCLK_PWM1SEL_PCLK | | ||
616 | LPC32XX_CLKPWR_PWMCLK_PWM1_DIV(1) | | ||
617 | LPC32XX_CLKPWR_PWMCLK_PWM2CLK_EN | | ||
618 | LPC32XX_CLKPWR_PWMCLK_PWM2SEL_PCLK | | ||
619 | LPC32XX_CLKPWR_PWMCLK_PWM2_DIV(1), | ||
620 | .get_rate = local_return_parent_rate, | ||
621 | }; | ||
622 | |||
610 | static struct clk clk_uart3 = { | 623 | static struct clk clk_uart3 = { |
611 | .parent = &clk_pclk, | 624 | .parent = &clk_pclk, |
612 | .enable = local_onoff_enable, | 625 | .enable = local_onoff_enable, |
@@ -1188,6 +1201,7 @@ static struct clk_lookup lookups[] = { | |||
1188 | CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9), | 1201 | CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9), |
1189 | CLKDEV_INIT("pl08xdmac", NULL, &clk_dma), | 1202 | CLKDEV_INIT("pl08xdmac", NULL, &clk_dma), |
1190 | CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt), | 1203 | CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt), |
1204 | CLKDEV_INIT("4005c000.pwm", NULL, &clk_pwm), | ||
1191 | CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3), | 1205 | CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3), |
1192 | CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4), | 1206 | CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4), |
1193 | CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5), | 1207 | CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5), |