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-rw-r--r--arch/arc/include/asm/io.h2
-rw-r--r--arch/arm/include/asm/io.h89
-rw-r--r--arch/arm/include/asm/memory.h4
-rw-r--r--arch/arm/mach-ebsa110/include/mach/io.h25
-rw-r--r--arch/arm/mach-ebsa110/io.c14
-rw-r--r--arch/arm/mach-ixp4xx/common.c2
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/io.h28
-rw-r--r--arch/arm64/Kconfig1
-rw-r--r--arch/arm64/include/asm/io.h122
-rw-r--r--arch/arm64/include/asm/memory.h2
-rw-r--r--arch/ia64/include/asm/uaccess.h16
-rw-r--r--arch/s390/include/asm/io.h5
-rw-r--r--arch/s390/mm/maccess.c4
-rw-r--r--arch/x86/include/asm/io.h4
-rw-r--r--arch/x86/mm/ioremap.c4
-rw-r--r--drivers/char/mem.c13
-rw-r--r--include/asm-generic/io.h716
17 files changed, 730 insertions, 321 deletions
diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h
index 334ce7017a18..cabd518cb253 100644
--- a/arch/arc/include/asm/io.h
+++ b/arch/arc/include/asm/io.h
@@ -13,8 +13,6 @@
13#include <asm/byteorder.h> 13#include <asm/byteorder.h>
14#include <asm/page.h> 14#include <asm/page.h>
15 15
16#define PCI_IOBASE ((void __iomem *)0)
17
18extern void __iomem *ioremap(unsigned long physaddr, unsigned long size); 16extern void __iomem *ioremap(unsigned long physaddr, unsigned long size);
19extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size, 17extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
20 unsigned long flags); 18 unsigned long flags);
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 180567408ee8..db58deb00aa7 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -47,13 +47,13 @@ extern void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set);
47 * Generic IO read/write. These perform native-endian accesses. Note 47 * Generic IO read/write. These perform native-endian accesses. Note
48 * that some architectures will want to re-define __raw_{read,write}w. 48 * that some architectures will want to re-define __raw_{read,write}w.
49 */ 49 */
50extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen); 50void __raw_writesb(volatile void __iomem *addr, const void *data, int bytelen);
51extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen); 51void __raw_writesw(volatile void __iomem *addr, const void *data, int wordlen);
52extern void __raw_writesl(void __iomem *addr, const void *data, int longlen); 52void __raw_writesl(volatile void __iomem *addr, const void *data, int longlen);
53 53
54extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen); 54void __raw_readsb(const volatile void __iomem *addr, void *data, int bytelen);
55extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); 55void __raw_readsw(const volatile void __iomem *addr, void *data, int wordlen);
56extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); 56void __raw_readsl(const volatile void __iomem *addr, void *data, int longlen);
57 57
58#if __LINUX_ARM_ARCH__ < 6 58#if __LINUX_ARM_ARCH__ < 6
59/* 59/*
@@ -69,6 +69,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
69 * writeback addressing modes as these incur a significant performance 69 * writeback addressing modes as these incur a significant performance
70 * overhead (the address generation must be emulated in software). 70 * overhead (the address generation must be emulated in software).
71 */ 71 */
72#define __raw_writew __raw_writew
72static inline void __raw_writew(u16 val, volatile void __iomem *addr) 73static inline void __raw_writew(u16 val, volatile void __iomem *addr)
73{ 74{
74 asm volatile("strh %1, %0" 75 asm volatile("strh %1, %0"
@@ -76,6 +77,7 @@ static inline void __raw_writew(u16 val, volatile void __iomem *addr)
76 : "r" (val)); 77 : "r" (val));
77} 78}
78 79
80#define __raw_readw __raw_readw
79static inline u16 __raw_readw(const volatile void __iomem *addr) 81static inline u16 __raw_readw(const volatile void __iomem *addr)
80{ 82{
81 u16 val; 83 u16 val;
@@ -86,6 +88,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
86} 88}
87#endif 89#endif
88 90
91#define __raw_writeb __raw_writeb
89static inline void __raw_writeb(u8 val, volatile void __iomem *addr) 92static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
90{ 93{
91 asm volatile("strb %1, %0" 94 asm volatile("strb %1, %0"
@@ -93,6 +96,7 @@ static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
93 : "r" (val)); 96 : "r" (val));
94} 97}
95 98
99#define __raw_writel __raw_writel
96static inline void __raw_writel(u32 val, volatile void __iomem *addr) 100static inline void __raw_writel(u32 val, volatile void __iomem *addr)
97{ 101{
98 asm volatile("str %1, %0" 102 asm volatile("str %1, %0"
@@ -100,6 +104,7 @@ static inline void __raw_writel(u32 val, volatile void __iomem *addr)
100 : "r" (val)); 104 : "r" (val));
101} 105}
102 106
107#define __raw_readb __raw_readb
103static inline u8 __raw_readb(const volatile void __iomem *addr) 108static inline u8 __raw_readb(const volatile void __iomem *addr)
104{ 109{
105 u8 val; 110 u8 val;
@@ -109,6 +114,7 @@ static inline u8 __raw_readb(const volatile void __iomem *addr)
109 return val; 114 return val;
110} 115}
111 116
117#define __raw_readl __raw_readl
112static inline u32 __raw_readl(const volatile void __iomem *addr) 118static inline u32 __raw_readl(const volatile void __iomem *addr)
113{ 119{
114 u32 val; 120 u32 val;
@@ -267,20 +273,6 @@ extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);
267#define insl(p,d,l) __raw_readsl(__io(p),d,l) 273#define insl(p,d,l) __raw_readsl(__io(p),d,l)
268#endif 274#endif
269 275
270#define outb_p(val,port) outb((val),(port))
271#define outw_p(val,port) outw((val),(port))
272#define outl_p(val,port) outl((val),(port))
273#define inb_p(port) inb((port))
274#define inw_p(port) inw((port))
275#define inl_p(port) inl((port))
276
277#define outsb_p(port,from,len) outsb(port,from,len)
278#define outsw_p(port,from,len) outsw(port,from,len)
279#define outsl_p(port,from,len) outsl(port,from,len)
280#define insb_p(port,to,len) insb(port,to,len)
281#define insw_p(port,to,len) insw(port,to,len)
282#define insl_p(port,to,len) insl(port,to,len)
283
284/* 276/*
285 * String version of IO memory access ops: 277 * String version of IO memory access ops:
286 */ 278 */
@@ -347,40 +339,42 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
347#define iounmap __arm_iounmap 339#define iounmap __arm_iounmap
348 340
349/* 341/*
350 * io{read,write}{8,16,32} macros 342 * io{read,write}{16,32}be() macros
351 */ 343 */
352#ifndef ioread8 344#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
353#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; }) 345#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
354#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; })
355#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; })
356
357#define ioread16be(p) ({ unsigned int __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
358#define ioread32be(p) ({ unsigned int __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
359
360#define iowrite8(v,p) ({ __iowmb(); __raw_writeb(v, p); })
361#define iowrite16(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_le16(v), p); })
362#define iowrite32(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_le32(v), p); })
363 346
364#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); }) 347#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); })
365#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) 348#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })
366
367#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
368#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
369#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
370
371#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
372#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
373#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
374 349
350#ifndef ioport_map
351#define ioport_map ioport_map
375extern void __iomem *ioport_map(unsigned long port, unsigned int nr); 352extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
353#endif
354#ifndef ioport_unmap
355#define ioport_unmap ioport_unmap
376extern void ioport_unmap(void __iomem *addr); 356extern void ioport_unmap(void __iomem *addr);
377#endif 357#endif
378 358
379struct pci_dev; 359struct pci_dev;
380 360
361#define pci_iounmap pci_iounmap
381extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr); 362extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
382 363
383/* 364/*
365 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
366 * access
367 */
368#define xlate_dev_mem_ptr(p) __va(p)
369
370/*
371 * Convert a virtual cached pointer to an uncached pointer
372 */
373#define xlate_dev_kmem_ptr(p) p
374
375#include <asm-generic/io.h>
376
377/*
384 * can the hardware map this into one segment or not, given no other 378 * can the hardware map this into one segment or not, given no other
385 * constraints. 379 * constraints.
386 */ 380 */
@@ -402,17 +396,6 @@ extern int devmem_is_allowed(unsigned long pfn);
402#endif 396#endif
403 397
404/* 398/*
405 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
406 * access
407 */
408#define xlate_dev_mem_ptr(p) __va(p)
409
410/*
411 * Convert a virtual cached pointer to an uncached pointer
412 */
413#define xlate_dev_kmem_ptr(p) p
414
415/*
416 * Register ISA memory and port locations for glibc iopl/inb/outb 399 * Register ISA memory and port locations for glibc iopl/inb/outb
417 * emulation. 400 * emulation.
418 */ 401 */
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index e731018869a7..184def0e1652 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -274,11 +274,13 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
274 * translation for translating DMA addresses. Use the driver 274 * translation for translating DMA addresses. Use the driver
275 * DMA support - see dma-mapping.h. 275 * DMA support - see dma-mapping.h.
276 */ 276 */
277#define virt_to_phys virt_to_phys
277static inline phys_addr_t virt_to_phys(const volatile void *x) 278static inline phys_addr_t virt_to_phys(const volatile void *x)
278{ 279{
279 return __virt_to_phys((unsigned long)(x)); 280 return __virt_to_phys((unsigned long)(x));
280} 281}
281 282
283#define phys_to_virt phys_to_virt
282static inline void *phys_to_virt(phys_addr_t x) 284static inline void *phys_to_virt(phys_addr_t x)
283{ 285{
284 return (void *)__phys_to_virt(x); 286 return (void *)__phys_to_virt(x);
@@ -322,11 +324,13 @@ static inline phys_addr_t __virt_to_idmap(unsigned long x)
322#endif 324#endif
323 325
324#ifdef CONFIG_VIRT_TO_BUS 326#ifdef CONFIG_VIRT_TO_BUS
327#define virt_to_bus virt_to_bus
325static inline __deprecated unsigned long virt_to_bus(void *x) 328static inline __deprecated unsigned long virt_to_bus(void *x)
326{ 329{
327 return __virt_to_bus((unsigned long)x); 330 return __virt_to_bus((unsigned long)x);
328} 331}
329 332
333#define bus_to_virt bus_to_virt
330static inline __deprecated void *bus_to_virt(unsigned long x) 334static inline __deprecated void *bus_to_virt(unsigned long x)
331{ 335{
332 return (void *)__bus_to_virt(x); 336 return (void *)__bus_to_virt(x);
diff --git a/arch/arm/mach-ebsa110/include/mach/io.h b/arch/arm/mach-ebsa110/include/mach/io.h
index 11bb0799424b..69975784acfa 100644
--- a/arch/arm/mach-ebsa110/include/mach/io.h
+++ b/arch/arm/mach-ebsa110/include/mach/io.h
@@ -29,9 +29,9 @@ u8 __readb(const volatile void __iomem *addr);
29u16 __readw(const volatile void __iomem *addr); 29u16 __readw(const volatile void __iomem *addr);
30u32 __readl(const volatile void __iomem *addr); 30u32 __readl(const volatile void __iomem *addr);
31 31
32void __writeb(u8 val, void __iomem *addr); 32void __writeb(u8 val, volatile void __iomem *addr);
33void __writew(u16 val, void __iomem *addr); 33void __writew(u16 val, volatile void __iomem *addr);
34void __writel(u32 val, void __iomem *addr); 34void __writel(u32 val, volatile void __iomem *addr);
35 35
36/* 36/*
37 * Argh, someone forgot the IOCS16 line. We therefore have to handle 37 * Argh, someone forgot the IOCS16 line. We therefore have to handle
@@ -62,20 +62,31 @@ void __writel(u32 val, void __iomem *addr);
62#define writew(v,b) __writew(v,b) 62#define writew(v,b) __writew(v,b)
63#define writel(v,b) __writel(v,b) 63#define writel(v,b) __writel(v,b)
64 64
65#define insb insb
65extern void insb(unsigned int port, void *buf, int sz); 66extern void insb(unsigned int port, void *buf, int sz);
67#define insw insw
66extern void insw(unsigned int port, void *buf, int sz); 68extern void insw(unsigned int port, void *buf, int sz);
69#define insl insl
67extern void insl(unsigned int port, void *buf, int sz); 70extern void insl(unsigned int port, void *buf, int sz);
68 71
72#define outsb outsb
69extern void outsb(unsigned int port, const void *buf, int sz); 73extern void outsb(unsigned int port, const void *buf, int sz);
74#define outsw outsw
70extern void outsw(unsigned int port, const void *buf, int sz); 75extern void outsw(unsigned int port, const void *buf, int sz);
76#define outsl outsl
71extern void outsl(unsigned int port, const void *buf, int sz); 77extern void outsl(unsigned int port, const void *buf, int sz);
72 78
73/* can't support writesb atm */ 79/* can't support writesb atm */
74extern void writesw(void __iomem *addr, const void *data, int wordlen); 80#define writesw writesw
75extern void writesl(void __iomem *addr, const void *data, int longlen); 81extern void writesw(volatile void __iomem *addr, const void *data, int wordlen);
82#define writesl writesl
83extern void writesl(volatile void __iomem *addr, const void *data, int longlen);
76 84
77/* can't support readsb atm */ 85/* can't support readsb atm */
78extern void readsw(const void __iomem *addr, void *data, int wordlen); 86#define readsw readsw
79extern void readsl(const void __iomem *addr, void *data, int longlen); 87extern void readsw(const volatile void __iomem *addr, void *data, int wordlen);
88
89#define readsl readsl
90extern void readsl(const volatile void __iomem *addr, void *data, int longlen);
80 91
81#endif 92#endif
diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c
index 756cc377a73d..b57980b435fd 100644
--- a/arch/arm/mach-ebsa110/io.c
+++ b/arch/arm/mach-ebsa110/io.c
@@ -102,7 +102,7 @@ EXPORT_SYMBOL(__readb);
102EXPORT_SYMBOL(__readw); 102EXPORT_SYMBOL(__readw);
103EXPORT_SYMBOL(__readl); 103EXPORT_SYMBOL(__readl);
104 104
105void readsw(const void __iomem *addr, void *data, int len) 105void readsw(const volatile void __iomem *addr, void *data, int len)
106{ 106{
107 void __iomem *a = __isamem_convert_addr(addr); 107 void __iomem *a = __isamem_convert_addr(addr);
108 108
@@ -112,7 +112,7 @@ void readsw(const void __iomem *addr, void *data, int len)
112} 112}
113EXPORT_SYMBOL(readsw); 113EXPORT_SYMBOL(readsw);
114 114
115void readsl(const void __iomem *addr, void *data, int len) 115void readsl(const volatile void __iomem *addr, void *data, int len)
116{ 116{
117 void __iomem *a = __isamem_convert_addr(addr); 117 void __iomem *a = __isamem_convert_addr(addr);
118 118
@@ -122,7 +122,7 @@ void readsl(const void __iomem *addr, void *data, int len)
122} 122}
123EXPORT_SYMBOL(readsl); 123EXPORT_SYMBOL(readsl);
124 124
125void __writeb(u8 val, void __iomem *addr) 125void __writeb(u8 val, volatile void __iomem *addr)
126{ 126{
127 void __iomem *a = __isamem_convert_addr(addr); 127 void __iomem *a = __isamem_convert_addr(addr);
128 128
@@ -132,7 +132,7 @@ void __writeb(u8 val, void __iomem *addr)
132 __raw_writeb(val, a); 132 __raw_writeb(val, a);
133} 133}
134 134
135void __writew(u16 val, void __iomem *addr) 135void __writew(u16 val, volatile void __iomem *addr)
136{ 136{
137 void __iomem *a = __isamem_convert_addr(addr); 137 void __iomem *a = __isamem_convert_addr(addr);
138 138
@@ -142,7 +142,7 @@ void __writew(u16 val, void __iomem *addr)
142 __raw_writew(val, a); 142 __raw_writew(val, a);
143} 143}
144 144
145void __writel(u32 val, void __iomem *addr) 145void __writel(u32 val, volatile void __iomem *addr)
146{ 146{
147 void __iomem *a = __isamem_convert_addr(addr); 147 void __iomem *a = __isamem_convert_addr(addr);
148 148
@@ -157,7 +157,7 @@ EXPORT_SYMBOL(__writeb);
157EXPORT_SYMBOL(__writew); 157EXPORT_SYMBOL(__writew);
158EXPORT_SYMBOL(__writel); 158EXPORT_SYMBOL(__writel);
159 159
160void writesw(void __iomem *addr, const void *data, int len) 160void writesw(volatile void __iomem *addr, const void *data, int len)
161{ 161{
162 void __iomem *a = __isamem_convert_addr(addr); 162 void __iomem *a = __isamem_convert_addr(addr);
163 163
@@ -167,7 +167,7 @@ void writesw(void __iomem *addr, const void *data, int len)
167} 167}
168EXPORT_SYMBOL(writesw); 168EXPORT_SYMBOL(writesw);
169 169
170void writesl(void __iomem *addr, const void *data, int len) 170void writesl(volatile void __iomem *addr, const void *data, int len)
171{ 171{
172 void __iomem *a = __isamem_convert_addr(addr); 172 void __iomem *a = __isamem_convert_addr(addr);
173 173
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fc4b7b24265e..8537d4c41e34 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -652,7 +652,7 @@ static void __iomem *ixp4xx_ioremap_caller(phys_addr_t addr, size_t size,
652 return (void __iomem *)addr; 652 return (void __iomem *)addr;
653} 653}
654 654
655static void ixp4xx_iounmap(void __iomem *addr) 655static void ixp4xx_iounmap(volatile void __iomem *addr)
656{ 656{
657 if (!is_pci_memory((__force u32)addr)) 657 if (!is_pci_memory((__force u32)addr))
658 __iounmap(addr); 658 __iounmap(addr);
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 559c69a47731..6a722860e34d 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -58,6 +58,10 @@ static inline int is_pci_memory(u32 addr)
58#define writew(v, p) __indirect_writew(v, p) 58#define writew(v, p) __indirect_writew(v, p)
59#define writel(v, p) __indirect_writel(v, p) 59#define writel(v, p) __indirect_writel(v, p)
60 60
61#define writeb_relaxed(v, p) __indirect_writeb(v, p)
62#define writew_relaxed(v, p) __indirect_writew(v, p)
63#define writel_relaxed(v, p) __indirect_writel(v, p)
64
61#define writesb(p, v, l) __indirect_writesb(p, v, l) 65#define writesb(p, v, l) __indirect_writesb(p, v, l)
62#define writesw(p, v, l) __indirect_writesw(p, v, l) 66#define writesw(p, v, l) __indirect_writesw(p, v, l)
63#define writesl(p, v, l) __indirect_writesl(p, v, l) 67#define writesl(p, v, l) __indirect_writesl(p, v, l)
@@ -66,6 +70,10 @@ static inline int is_pci_memory(u32 addr)
66#define readw(p) __indirect_readw(p) 70#define readw(p) __indirect_readw(p)
67#define readl(p) __indirect_readl(p) 71#define readl(p) __indirect_readl(p)
68 72
73#define readb_relaxed(p) __indirect_readb(p)
74#define readw_relaxed(p) __indirect_readw(p)
75#define readl_relaxed(p) __indirect_readl(p)
76
69#define readsb(p, v, l) __indirect_readsb(p, v, l) 77#define readsb(p, v, l) __indirect_readsb(p, v, l)
70#define readsw(p, v, l) __indirect_readsw(p, v, l) 78#define readsw(p, v, l) __indirect_readsw(p, v, l)
71#define readsl(p, v, l) __indirect_readsl(p, v, l) 79#define readsl(p, v, l) __indirect_readsl(p, v, l)
@@ -76,7 +84,7 @@ static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
76 u32 n, byte_enables, data; 84 u32 n, byte_enables, data;
77 85
78 if (!is_pci_memory(addr)) { 86 if (!is_pci_memory(addr)) {
79 __raw_writeb(value, addr); 87 __raw_writeb(value, p);
80 return; 88 return;
81 } 89 }
82 90
@@ -99,7 +107,7 @@ static inline void __indirect_writew(u16 value, volatile void __iomem *p)
99 u32 n, byte_enables, data; 107 u32 n, byte_enables, data;
100 108
101 if (!is_pci_memory(addr)) { 109 if (!is_pci_memory(addr)) {
102 __raw_writew(value, addr); 110 __raw_writew(value, p);
103 return; 111 return;
104 } 112 }
105 113
@@ -141,7 +149,7 @@ static inline unsigned char __indirect_readb(const volatile void __iomem *p)
141 u32 n, byte_enables, data; 149 u32 n, byte_enables, data;
142 150
143 if (!is_pci_memory(addr)) 151 if (!is_pci_memory(addr))
144 return __raw_readb(addr); 152 return __raw_readb(p);
145 153
146 n = addr % 4; 154 n = addr % 4;
147 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL; 155 byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
@@ -164,7 +172,7 @@ static inline unsigned short __indirect_readw(const volatile void __iomem *p)
164 u32 n, byte_enables, data; 172 u32 n, byte_enables, data;
165 173
166 if (!is_pci_memory(addr)) 174 if (!is_pci_memory(addr))
167 return __raw_readw(addr); 175 return __raw_readw(p);
168 176
169 n = addr % 4; 177 n = addr % 4;
170 byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL; 178 byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL;
@@ -226,6 +234,7 @@ static inline void __indirect_readsl(const volatile void __iomem *bus_addr,
226 * I/O functions. 234 * I/O functions.
227 */ 235 */
228 236
237#define outb outb
229static inline void outb(u8 value, u32 addr) 238static inline void outb(u8 value, u32 addr)
230{ 239{
231 u32 n, byte_enables, data; 240 u32 n, byte_enables, data;
@@ -235,12 +244,14 @@ static inline void outb(u8 value, u32 addr)
235 ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data); 244 ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data);
236} 245}
237 246
247#define outsb outsb
238static inline void outsb(u32 io_addr, const u8 *vaddr, u32 count) 248static inline void outsb(u32 io_addr, const u8 *vaddr, u32 count)
239{ 249{
240 while (count--) 250 while (count--)
241 outb(*vaddr++, io_addr); 251 outb(*vaddr++, io_addr);
242} 252}
243 253
254#define outw outw
244static inline void outw(u16 value, u32 addr) 255static inline void outw(u16 value, u32 addr)
245{ 256{
246 u32 n, byte_enables, data; 257 u32 n, byte_enables, data;
@@ -250,23 +261,27 @@ static inline void outw(u16 value, u32 addr)
250 ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data); 261 ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data);
251} 262}
252 263
264#define outsw outsw
253static inline void outsw(u32 io_addr, const u16 *vaddr, u32 count) 265static inline void outsw(u32 io_addr, const u16 *vaddr, u32 count)
254{ 266{
255 while (count--) 267 while (count--)
256 outw(cpu_to_le16(*vaddr++), io_addr); 268 outw(cpu_to_le16(*vaddr++), io_addr);
257} 269}
258 270
271#define outl outl
259static inline void outl(u32 value, u32 addr) 272static inline void outl(u32 value, u32 addr)
260{ 273{
261 ixp4xx_pci_write(addr, NP_CMD_IOWRITE, value); 274 ixp4xx_pci_write(addr, NP_CMD_IOWRITE, value);
262} 275}
263 276
277#define outsl outsl
264static inline void outsl(u32 io_addr, const u32 *vaddr, u32 count) 278static inline void outsl(u32 io_addr, const u32 *vaddr, u32 count)
265{ 279{
266 while (count--) 280 while (count--)
267 outl(cpu_to_le32(*vaddr++), io_addr); 281 outl(cpu_to_le32(*vaddr++), io_addr);
268} 282}
269 283
284#define inb inb
270static inline u8 inb(u32 addr) 285static inline u8 inb(u32 addr)
271{ 286{
272 u32 n, byte_enables, data; 287 u32 n, byte_enables, data;
@@ -278,12 +293,14 @@ static inline u8 inb(u32 addr)
278 return data >> (8*n); 293 return data >> (8*n);
279} 294}
280 295
296#define insb insb
281static inline void insb(u32 io_addr, u8 *vaddr, u32 count) 297static inline void insb(u32 io_addr, u8 *vaddr, u32 count)
282{ 298{
283 while (count--) 299 while (count--)
284 *vaddr++ = inb(io_addr); 300 *vaddr++ = inb(io_addr);
285} 301}
286 302
303#define inw inw
287static inline u16 inw(u32 addr) 304static inline u16 inw(u32 addr)
288{ 305{
289 u32 n, byte_enables, data; 306 u32 n, byte_enables, data;
@@ -295,12 +312,14 @@ static inline u16 inw(u32 addr)
295 return data>>(8*n); 312 return data>>(8*n);
296} 313}
297 314
315#define insw insw
298static inline void insw(u32 io_addr, u16 *vaddr, u32 count) 316static inline void insw(u32 io_addr, u16 *vaddr, u32 count)
299{ 317{
300 while (count--) 318 while (count--)
301 *vaddr++ = le16_to_cpu(inw(io_addr)); 319 *vaddr++ = le16_to_cpu(inw(io_addr));
302} 320}
303 321
322#define inl inl
304static inline u32 inl(u32 addr) 323static inline u32 inl(u32 addr)
305{ 324{
306 u32 data; 325 u32 data;
@@ -310,6 +329,7 @@ static inline u32 inl(u32 addr)
310 return data; 329 return data;
311} 330}
312 331
332#define insl insl
313static inline void insl(u32 io_addr, u32 *vaddr, u32 count) 333static inline void insl(u32 io_addr, u32 *vaddr, u32 count)
314{ 334{
315 while (count--) 335 while (count--)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ac9afde76dea..37cd23625708 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -23,7 +23,6 @@ config ARM64
23 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 23 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
24 select GENERIC_CPU_AUTOPROBE 24 select GENERIC_CPU_AUTOPROBE
25 select GENERIC_EARLY_IOREMAP 25 select GENERIC_EARLY_IOREMAP
26 select GENERIC_IOMAP
27 select GENERIC_IRQ_PROBE 26 select GENERIC_IRQ_PROBE
28 select GENERIC_IRQ_SHOW 27 select GENERIC_IRQ_SHOW
29 select GENERIC_SCHED_CLOCK 28 select GENERIC_SCHED_CLOCK
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 79f1d519221f..deb6d2b6df0b 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -34,26 +34,31 @@
34/* 34/*
35 * Generic IO read/write. These perform native-endian accesses. 35 * Generic IO read/write. These perform native-endian accesses.
36 */ 36 */
37#define __raw_writeb __raw_writeb
37static inline void __raw_writeb(u8 val, volatile void __iomem *addr) 38static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
38{ 39{
39 asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr)); 40 asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr));
40} 41}
41 42
43#define __raw_writew __raw_writew
42static inline void __raw_writew(u16 val, volatile void __iomem *addr) 44static inline void __raw_writew(u16 val, volatile void __iomem *addr)
43{ 45{
44 asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr)); 46 asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr));
45} 47}
46 48
49#define __raw_writel __raw_writel
47static inline void __raw_writel(u32 val, volatile void __iomem *addr) 50static inline void __raw_writel(u32 val, volatile void __iomem *addr)
48{ 51{
49 asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr)); 52 asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr));
50} 53}
51 54
55#define __raw_writeq __raw_writeq
52static inline void __raw_writeq(u64 val, volatile void __iomem *addr) 56static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
53{ 57{
54 asm volatile("str %0, [%1]" : : "r" (val), "r" (addr)); 58 asm volatile("str %0, [%1]" : : "r" (val), "r" (addr));
55} 59}
56 60
61#define __raw_readb __raw_readb
57static inline u8 __raw_readb(const volatile void __iomem *addr) 62static inline u8 __raw_readb(const volatile void __iomem *addr)
58{ 63{
59 u8 val; 64 u8 val;
@@ -61,6 +66,7 @@ static inline u8 __raw_readb(const volatile void __iomem *addr)
61 return val; 66 return val;
62} 67}
63 68
69#define __raw_readw __raw_readw
64static inline u16 __raw_readw(const volatile void __iomem *addr) 70static inline u16 __raw_readw(const volatile void __iomem *addr)
65{ 71{
66 u16 val; 72 u16 val;
@@ -68,6 +74,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
68 return val; 74 return val;
69} 75}
70 76
77#define __raw_readl __raw_readl
71static inline u32 __raw_readl(const volatile void __iomem *addr) 78static inline u32 __raw_readl(const volatile void __iomem *addr)
72{ 79{
73 u32 val; 80 u32 val;
@@ -75,6 +82,7 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
75 return val; 82 return val;
76} 83}
77 84
85#define __raw_readq __raw_readq
78static inline u64 __raw_readq(const volatile void __iomem *addr) 86static inline u64 __raw_readq(const volatile void __iomem *addr)
79{ 87{
80 u64 val; 88 u64 val;
@@ -125,94 +133,6 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
125#define IO_SPACE_LIMIT (SZ_32M - 1) 133#define IO_SPACE_LIMIT (SZ_32M - 1)
126#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_32M)) 134#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_32M))
127 135
128static inline u8 inb(unsigned long addr)
129{
130 return readb(addr + PCI_IOBASE);
131}
132
133static inline u16 inw(unsigned long addr)
134{
135 return readw(addr + PCI_IOBASE);
136}
137
138static inline u32 inl(unsigned long addr)
139{
140 return readl(addr + PCI_IOBASE);
141}
142
143static inline void outb(u8 b, unsigned long addr)
144{
145 writeb(b, addr + PCI_IOBASE);
146}
147
148static inline void outw(u16 b, unsigned long addr)
149{
150 writew(b, addr + PCI_IOBASE);
151}
152
153static inline void outl(u32 b, unsigned long addr)
154{
155 writel(b, addr + PCI_IOBASE);
156}
157
158#define inb_p(addr) inb(addr)
159#define inw_p(addr) inw(addr)
160#define inl_p(addr) inl(addr)
161
162#define outb_p(x, addr) outb((x), (addr))
163#define outw_p(x, addr) outw((x), (addr))
164#define outl_p(x, addr) outl((x), (addr))
165
166static inline void insb(unsigned long addr, void *buffer, int count)
167{
168 u8 *buf = buffer;
169 while (count--)
170 *buf++ = __raw_readb(addr + PCI_IOBASE);
171}
172
173static inline void insw(unsigned long addr, void *buffer, int count)
174{
175 u16 *buf = buffer;
176 while (count--)
177 *buf++ = __raw_readw(addr + PCI_IOBASE);
178}
179
180static inline void insl(unsigned long addr, void *buffer, int count)
181{
182 u32 *buf = buffer;
183 while (count--)
184 *buf++ = __raw_readl(addr + PCI_IOBASE);
185}
186
187static inline void outsb(unsigned long addr, const void *buffer, int count)
188{
189 const u8 *buf = buffer;
190 while (count--)
191 __raw_writeb(*buf++, addr + PCI_IOBASE);
192}
193
194static inline void outsw(unsigned long addr, const void *buffer, int count)
195{
196 const u16 *buf = buffer;
197 while (count--)
198 __raw_writew(*buf++, addr + PCI_IOBASE);
199}
200
201static inline void outsl(unsigned long addr, const void *buffer, int count)
202{
203 const u32 *buf = buffer;
204 while (count--)
205 __raw_writel(*buf++, addr + PCI_IOBASE);
206}
207
208#define insb_p(port,to,len) insb(port,to,len)
209#define insw_p(port,to,len) insw(port,to,len)
210#define insl_p(port,to,len) insl(port,to,len)
211
212#define outsb_p(port,from,len) outsb(port,from,len)
213#define outsw_p(port,from,len) outsw(port,from,len)
214#define outsl_p(port,from,len) outsl(port,from,len)
215
216/* 136/*
217 * String version of I/O memory access operations. 137 * String version of I/O memory access operations.
218 */ 138 */
@@ -236,18 +156,14 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size);
236#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) 156#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
237#define iounmap __iounmap 157#define iounmap __iounmap
238 158
239#define ARCH_HAS_IOREMAP_WC
240#include <asm-generic/iomap.h>
241
242/* 159/*
243 * More restrictive address range checking than the default implementation 160 * io{read,write}{16,32}be() macros
244 * (PHYS_OFFSET and PHYS_MASK taken into account).
245 */ 161 */
246#define ARCH_HAS_VALID_PHYS_ADDR_RANGE 162#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
247extern int valid_phys_addr_range(phys_addr_t addr, size_t size); 163#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
248extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
249 164
250extern int devmem_is_allowed(unsigned long pfn); 165#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); })
166#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })
251 167
252/* 168/*
253 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 169 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
@@ -260,6 +176,18 @@ extern int devmem_is_allowed(unsigned long pfn);
260 */ 176 */
261#define xlate_dev_kmem_ptr(p) p 177#define xlate_dev_kmem_ptr(p) p
262 178
179#include <asm-generic/io.h>
180
181/*
182 * More restrictive address range checking than the default implementation
183 * (PHYS_OFFSET and PHYS_MASK taken into account).
184 */
185#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
186extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
187extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
188
189extern int devmem_is_allowed(unsigned long pfn);
190
263struct bio_vec; 191struct bio_vec;
264extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1, 192extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
265 const struct bio_vec *vec2); 193 const struct bio_vec *vec2);
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index ccc7087d3c4e..a40a4d7e830f 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -120,11 +120,13 @@ extern phys_addr_t memstart_addr;
120 * translation for translating DMA addresses. Use the driver 120 * translation for translating DMA addresses. Use the driver
121 * DMA support - see dma-mapping.h. 121 * DMA support - see dma-mapping.h.
122 */ 122 */
123#define virt_to_phys virt_to_phys
123static inline phys_addr_t virt_to_phys(const volatile void *x) 124static inline phys_addr_t virt_to_phys(const volatile void *x)
124{ 125{
125 return __virt_to_phys((unsigned long)(x)); 126 return __virt_to_phys((unsigned long)(x));
126} 127}
127 128
129#define phys_to_virt phys_to_virt
128static inline void *phys_to_virt(phys_addr_t x) 130static inline void *phys_to_virt(phys_addr_t x)
129{ 131{
130 return (void *)(__phys_to_virt(x)); 132 return (void *)(__phys_to_virt(x));
diff --git a/arch/ia64/include/asm/uaccess.h b/arch/ia64/include/asm/uaccess.h
index 449c8c0fa2bd..103bedc59644 100644
--- a/arch/ia64/include/asm/uaccess.h
+++ b/arch/ia64/include/asm/uaccess.h
@@ -365,15 +365,15 @@ ia64_done_with_exception (struct pt_regs *regs)
365} 365}
366 366
367#define ARCH_HAS_TRANSLATE_MEM_PTR 1 367#define ARCH_HAS_TRANSLATE_MEM_PTR 1
368static __inline__ char * 368static __inline__ void *
369xlate_dev_mem_ptr (unsigned long p) 369xlate_dev_mem_ptr(phys_addr_t p)
370{ 370{
371 struct page *page; 371 struct page *page;
372 char * ptr; 372 void *ptr;
373 373
374 page = pfn_to_page(p >> PAGE_SHIFT); 374 page = pfn_to_page(p >> PAGE_SHIFT);
375 if (PageUncached(page)) 375 if (PageUncached(page))
376 ptr = (char *)p + __IA64_UNCACHED_OFFSET; 376 ptr = (void *)p + __IA64_UNCACHED_OFFSET;
377 else 377 else
378 ptr = __va(p); 378 ptr = __va(p);
379 379
@@ -383,15 +383,15 @@ xlate_dev_mem_ptr (unsigned long p)
383/* 383/*
384 * Convert a virtual cached kernel memory pointer to an uncached pointer 384 * Convert a virtual cached kernel memory pointer to an uncached pointer
385 */ 385 */
386static __inline__ char * 386static __inline__ void *
387xlate_dev_kmem_ptr (char * p) 387xlate_dev_kmem_ptr(void *p)
388{ 388{
389 struct page *page; 389 struct page *page;
390 char * ptr; 390 void *ptr;
391 391
392 page = virt_to_page((unsigned long)p); 392 page = virt_to_page((unsigned long)p);
393 if (PageUncached(page)) 393 if (PageUncached(page))
394 ptr = (char *)__pa(p) + __IA64_UNCACHED_OFFSET; 394 ptr = (void *)__pa(p) + __IA64_UNCACHED_OFFSET;
395 else 395 else
396 ptr = p; 396 ptr = p;
397 397
diff --git a/arch/s390/include/asm/io.h b/arch/s390/include/asm/io.h
index cd6b9ee7b69c..d22c2eeae78f 100644
--- a/arch/s390/include/asm/io.h
+++ b/arch/s390/include/asm/io.h
@@ -13,9 +13,10 @@
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/pci_io.h> 14#include <asm/pci_io.h>
15 15
16void *xlate_dev_mem_ptr(unsigned long phys);
17#define xlate_dev_mem_ptr xlate_dev_mem_ptr 16#define xlate_dev_mem_ptr xlate_dev_mem_ptr
18void unxlate_dev_mem_ptr(unsigned long phys, void *addr); 17void *xlate_dev_mem_ptr(phys_addr_t phys);
18#define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
19void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);
19 20
20/* 21/*
21 * Convert a virtual cached pointer to an uncached pointer 22 * Convert a virtual cached pointer to an uncached pointer
diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
index 2a2e35416d2f..2eb34bdfc613 100644
--- a/arch/s390/mm/maccess.c
+++ b/arch/s390/mm/maccess.c
@@ -176,7 +176,7 @@ static int is_swapped(unsigned long addr)
176 * For swapped prefix pages a new buffer is returned that contains a copy of 176 * For swapped prefix pages a new buffer is returned that contains a copy of
177 * the absolute memory. The buffer size is maximum one page large. 177 * the absolute memory. The buffer size is maximum one page large.
178 */ 178 */
179void *xlate_dev_mem_ptr(unsigned long addr) 179void *xlate_dev_mem_ptr(phys_addr_t addr)
180{ 180{
181 void *bounce = (void *) addr; 181 void *bounce = (void *) addr;
182 unsigned long size; 182 unsigned long size;
@@ -197,7 +197,7 @@ void *xlate_dev_mem_ptr(unsigned long addr)
197/* 197/*
198 * Free converted buffer for /dev/mem access (if necessary) 198 * Free converted buffer for /dev/mem access (if necessary)
199 */ 199 */
200void unxlate_dev_mem_ptr(unsigned long addr, void *buf) 200void unxlate_dev_mem_ptr(phys_addr_t addr, void *buf)
201{ 201{
202 if ((void *) addr != buf) 202 if ((void *) addr != buf)
203 free_page((unsigned long) buf); 203 free_page((unsigned long) buf);
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index b8237d8a1e0c..ae2b593e7c6e 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -310,8 +310,8 @@ BUILDIO(b, b, char)
310BUILDIO(w, w, short) 310BUILDIO(w, w, short)
311BUILDIO(l, , int) 311BUILDIO(l, , int)
312 312
313extern void *xlate_dev_mem_ptr(unsigned long phys); 313extern void *xlate_dev_mem_ptr(phys_addr_t phys);
314extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr); 314extern void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr);
315 315
316extern int ioremap_change_attr(unsigned long vaddr, unsigned long size, 316extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
317 unsigned long prot_val); 317 unsigned long prot_val);
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index af78e50ca6ce..b12f43c192cf 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -327,7 +327,7 @@ EXPORT_SYMBOL(iounmap);
327 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 327 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
328 * access 328 * access
329 */ 329 */
330void *xlate_dev_mem_ptr(unsigned long phys) 330void *xlate_dev_mem_ptr(phys_addr_t phys)
331{ 331{
332 void *addr; 332 void *addr;
333 unsigned long start = phys & PAGE_MASK; 333 unsigned long start = phys & PAGE_MASK;
@@ -343,7 +343,7 @@ void *xlate_dev_mem_ptr(unsigned long phys)
343 return addr; 343 return addr;
344} 344}
345 345
346void unxlate_dev_mem_ptr(unsigned long phys, void *addr) 346void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)
347{ 347{
348 if (page_is_ram(phys >> PAGE_SHIFT)) 348 if (page_is_ram(phys >> PAGE_SHIFT))
349 return; 349 return;
diff --git a/drivers/char/mem.c b/drivers/char/mem.c
index 524b707894ef..4c58333b4257 100644
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
@@ -84,9 +84,12 @@ static inline int range_is_allowed(unsigned long pfn, unsigned long size)
84} 84}
85#endif 85#endif
86 86
87void __weak unxlate_dev_mem_ptr(unsigned long phys, void *addr) 87#ifndef unxlate_dev_mem_ptr
88#define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
89void __weak unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)
88{ 90{
89} 91}
92#endif
90 93
91/* 94/*
92 * This funcion reads the *physical* memory. The f_pos points directly to the 95 * This funcion reads the *physical* memory. The f_pos points directly to the
@@ -97,7 +100,7 @@ static ssize_t read_mem(struct file *file, char __user *buf,
97{ 100{
98 phys_addr_t p = *ppos; 101 phys_addr_t p = *ppos;
99 ssize_t read, sz; 102 ssize_t read, sz;
100 char *ptr; 103 void *ptr;
101 104
102 if (p != *ppos) 105 if (p != *ppos)
103 return 0; 106 return 0;
@@ -400,7 +403,7 @@ static ssize_t read_kmem(struct file *file, char __user *buf,
400 * uncached, then it must also be accessed uncached 403 * uncached, then it must also be accessed uncached
401 * by the kernel or data corruption may occur 404 * by the kernel or data corruption may occur
402 */ 405 */
403 kbuf = xlate_dev_kmem_ptr((char *)p); 406 kbuf = xlate_dev_kmem_ptr((void *)p);
404 407
405 if (copy_to_user(buf, kbuf, sz)) 408 if (copy_to_user(buf, kbuf, sz))
406 return -EFAULT; 409 return -EFAULT;
@@ -461,7 +464,7 @@ static ssize_t do_write_kmem(unsigned long p, const char __user *buf,
461#endif 464#endif
462 465
463 while (count > 0) { 466 while (count > 0) {
464 char *ptr; 467 void *ptr;
465 468
466 sz = size_inside_page(p, count); 469 sz = size_inside_page(p, count);
467 470
@@ -470,7 +473,7 @@ static ssize_t do_write_kmem(unsigned long p, const char __user *buf,
470 * it must also be accessed uncached by the kernel or data 473 * it must also be accessed uncached by the kernel or data
471 * corruption may occur. 474 * corruption may occur.
472 */ 475 */
473 ptr = xlate_dev_kmem_ptr((char *)p); 476 ptr = xlate_dev_kmem_ptr((void *)p);
474 477
475 copied = copy_from_user(ptr, buf, sz); 478 copied = copy_from_user(ptr, buf, sz);
476 if (copied) { 479 if (copied) {
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index b8fdc57a7335..00483d769d86 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -12,6 +12,7 @@
12#define __ASM_GENERIC_IO_H 12#define __ASM_GENERIC_IO_H
13 13
14#include <asm/page.h> /* I/O is all done through memory accesses */ 14#include <asm/page.h> /* I/O is all done through memory accesses */
15#include <linux/string.h> /* for memset() and memcpy() */
15#include <linux/types.h> 16#include <linux/types.h>
16 17
17#ifdef CONFIG_GENERIC_IOMAP 18#ifdef CONFIG_GENERIC_IOMAP
@@ -24,260 +25,654 @@
24#define mmiowb() do {} while (0) 25#define mmiowb() do {} while (0)
25#endif 26#endif
26 27
27/*****************************************************************************/
28/* 28/*
29 * readX/writeX() are used to access memory mapped devices. On some 29 * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
30 * architectures the memory mapped IO stuff needs to be accessed 30 *
31 * differently. On the simple architectures, we just read/write the 31 * On some architectures memory mapped IO needs to be accessed differently.
32 * memory location directly. 32 * On the simple architectures, we just read/write the memory location
33 * directly.
33 */ 34 */
35
34#ifndef __raw_readb 36#ifndef __raw_readb
37#define __raw_readb __raw_readb
35static inline u8 __raw_readb(const volatile void __iomem *addr) 38static inline u8 __raw_readb(const volatile void __iomem *addr)
36{ 39{
37 return *(const volatile u8 __force *) addr; 40 return *(const volatile u8 __force *)addr;
38} 41}
39#endif 42#endif
40 43
41#ifndef __raw_readw 44#ifndef __raw_readw
45#define __raw_readw __raw_readw
42static inline u16 __raw_readw(const volatile void __iomem *addr) 46static inline u16 __raw_readw(const volatile void __iomem *addr)
43{ 47{
44 return *(const volatile u16 __force *) addr; 48 return *(const volatile u16 __force *)addr;
45} 49}
46#endif 50#endif
47 51
48#ifndef __raw_readl 52#ifndef __raw_readl
53#define __raw_readl __raw_readl
49static inline u32 __raw_readl(const volatile void __iomem *addr) 54static inline u32 __raw_readl(const volatile void __iomem *addr)
50{ 55{
51 return *(const volatile u32 __force *) addr; 56 return *(const volatile u32 __force *)addr;
52} 57}
53#endif 58#endif
54 59
55#define readb __raw_readb 60#ifdef CONFIG_64BIT
56 61#ifndef __raw_readq
57#define readw readw 62#define __raw_readq __raw_readq
58static inline u16 readw(const volatile void __iomem *addr) 63static inline u64 __raw_readq(const volatile void __iomem *addr)
59{
60 return __le16_to_cpu(__raw_readw(addr));
61}
62
63#define readl readl
64static inline u32 readl(const volatile void __iomem *addr)
65{ 64{
66 return __le32_to_cpu(__raw_readl(addr)); 65 return *(const volatile u64 __force *)addr;
67} 66}
67#endif
68#endif /* CONFIG_64BIT */
68 69
69#ifndef __raw_writeb 70#ifndef __raw_writeb
70static inline void __raw_writeb(u8 b, volatile void __iomem *addr) 71#define __raw_writeb __raw_writeb
72static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
71{ 73{
72 *(volatile u8 __force *) addr = b; 74 *(volatile u8 __force *)addr = value;
73} 75}
74#endif 76#endif
75 77
76#ifndef __raw_writew 78#ifndef __raw_writew
77static inline void __raw_writew(u16 b, volatile void __iomem *addr) 79#define __raw_writew __raw_writew
80static inline void __raw_writew(u16 value, volatile void __iomem *addr)
78{ 81{
79 *(volatile u16 __force *) addr = b; 82 *(volatile u16 __force *)addr = value;
80} 83}
81#endif 84#endif
82 85
83#ifndef __raw_writel 86#ifndef __raw_writel
84static inline void __raw_writel(u32 b, volatile void __iomem *addr) 87#define __raw_writel __raw_writel
88static inline void __raw_writel(u32 value, volatile void __iomem *addr)
85{ 89{
86 *(volatile u32 __force *) addr = b; 90 *(volatile u32 __force *)addr = value;
87} 91}
88#endif 92#endif
89 93
90#define writeb __raw_writeb
91#define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr)
92#define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr)
93
94#ifdef CONFIG_64BIT 94#ifdef CONFIG_64BIT
95#ifndef __raw_readq 95#ifndef __raw_writeq
96static inline u64 __raw_readq(const volatile void __iomem *addr) 96#define __raw_writeq __raw_writeq
97static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
97{ 98{
98 return *(const volatile u64 __force *) addr; 99 *(volatile u64 __force *)addr = value;
99} 100}
100#endif 101#endif
102#endif /* CONFIG_64BIT */
101 103
102#define readq readq 104/*
103static inline u64 readq(const volatile void __iomem *addr) 105 * {read,write}{b,w,l,q}() access little endian memory and return result in
104{ 106 * native endianness.
105 return __le64_to_cpu(__raw_readq(addr)); 107 */
106}
107 108
108#ifndef __raw_writeq 109#ifndef readb
109static inline void __raw_writeq(u64 b, volatile void __iomem *addr) 110#define readb readb
111static inline u8 readb(const volatile void __iomem *addr)
110{ 112{
111 *(volatile u64 __force *) addr = b; 113 return __raw_readb(addr);
112} 114}
113#endif 115#endif
114 116
115#define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr) 117#ifndef readw
116#endif /* CONFIG_64BIT */ 118#define readw readw
117 119static inline u16 readw(const volatile void __iomem *addr)
118#ifndef PCI_IOBASE 120{
119#define PCI_IOBASE ((void __iomem *) 0) 121 return __le16_to_cpu(__raw_readw(addr));
122}
120#endif 123#endif
121 124
122/*****************************************************************************/ 125#ifndef readl
123/* 126#define readl readl
124 * traditional input/output functions 127static inline u32 readl(const volatile void __iomem *addr)
125 */
126
127static inline u8 inb(unsigned long addr)
128{ 128{
129 return readb(addr + PCI_IOBASE); 129 return __le32_to_cpu(__raw_readl(addr));
130} 130}
131#endif
131 132
132static inline u16 inw(unsigned long addr) 133#ifdef CONFIG_64BIT
134#ifndef readq
135#define readq readq
136static inline u64 readq(const volatile void __iomem *addr)
133{ 137{
134 return readw(addr + PCI_IOBASE); 138 return __le64_to_cpu(__raw_readq(addr));
135} 139}
140#endif
141#endif /* CONFIG_64BIT */
136 142
137static inline u32 inl(unsigned long addr) 143#ifndef writeb
144#define writeb writeb
145static inline void writeb(u8 value, volatile void __iomem *addr)
138{ 146{
139 return readl(addr + PCI_IOBASE); 147 __raw_writeb(value, addr);
140} 148}
149#endif
141 150
142static inline void outb(u8 b, unsigned long addr) 151#ifndef writew
152#define writew writew
153static inline void writew(u16 value, volatile void __iomem *addr)
143{ 154{
144 writeb(b, addr + PCI_IOBASE); 155 __raw_writew(cpu_to_le16(value), addr);
145} 156}
157#endif
146 158
147static inline void outw(u16 b, unsigned long addr) 159#ifndef writel
160#define writel writel
161static inline void writel(u32 value, volatile void __iomem *addr)
148{ 162{
149 writew(b, addr + PCI_IOBASE); 163 __raw_writel(__cpu_to_le32(value), addr);
150} 164}
165#endif
151 166
152static inline void outl(u32 b, unsigned long addr) 167#ifdef CONFIG_64BIT
168#ifndef writeq
169#define writeq writeq
170static inline void writeq(u64 value, volatile void __iomem *addr)
153{ 171{
154 writel(b, addr + PCI_IOBASE); 172 __raw_writeq(__cpu_to_le64(value), addr);
155} 173}
174#endif
175#endif /* CONFIG_64BIT */
156 176
157#define inb_p(addr) inb(addr) 177/*
158#define inw_p(addr) inw(addr) 178 * {read,write}s{b,w,l,q}() repeatedly access the same memory address in
159#define inl_p(addr) inl(addr) 179 * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
160#define outb_p(x, addr) outb((x), (addr)) 180 */
161#define outw_p(x, addr) outw((x), (addr)) 181#ifndef readsb
162#define outl_p(x, addr) outl((x), (addr)) 182#define readsb readsb
163 183static inline void readsb(const volatile void __iomem *addr, void *buffer,
164#ifndef insb 184 unsigned int count)
165static inline void insb(unsigned long addr, void *buffer, int count)
166{ 185{
167 if (count) { 186 if (count) {
168 u8 *buf = buffer; 187 u8 *buf = buffer;
188
169 do { 189 do {
170 u8 x = __raw_readb(addr + PCI_IOBASE); 190 u8 x = __raw_readb(addr);
171 *buf++ = x; 191 *buf++ = x;
172 } while (--count); 192 } while (--count);
173 } 193 }
174} 194}
175#endif 195#endif
176 196
177#ifndef insw 197#ifndef readsw
178static inline void insw(unsigned long addr, void *buffer, int count) 198#define readsw readsw
199static inline void readsw(const volatile void __iomem *addr, void *buffer,
200 unsigned int count)
179{ 201{
180 if (count) { 202 if (count) {
181 u16 *buf = buffer; 203 u16 *buf = buffer;
204
182 do { 205 do {
183 u16 x = __raw_readw(addr + PCI_IOBASE); 206 u16 x = __raw_readw(addr);
184 *buf++ = x; 207 *buf++ = x;
185 } while (--count); 208 } while (--count);
186 } 209 }
187} 210}
188#endif 211#endif
189 212
190#ifndef insl 213#ifndef readsl
191static inline void insl(unsigned long addr, void *buffer, int count) 214#define readsl readsl
215static inline void readsl(const volatile void __iomem *addr, void *buffer,
216 unsigned int count)
192{ 217{
193 if (count) { 218 if (count) {
194 u32 *buf = buffer; 219 u32 *buf = buffer;
220
195 do { 221 do {
196 u32 x = __raw_readl(addr + PCI_IOBASE); 222 u32 x = __raw_readl(addr);
197 *buf++ = x; 223 *buf++ = x;
198 } while (--count); 224 } while (--count);
199 } 225 }
200} 226}
201#endif 227#endif
202 228
203#ifndef outsb 229#ifdef CONFIG_64BIT
204static inline void outsb(unsigned long addr, const void *buffer, int count) 230#ifndef readsq
231#define readsq readsq
232static inline void readsq(const volatile void __iomem *addr, void *buffer,
233 unsigned int count)
234{
235 if (count) {
236 u64 *buf = buffer;
237
238 do {
239 u64 x = __raw_readq(addr);
240 *buf++ = x;
241 } while (--count);
242 }
243}
244#endif
245#endif /* CONFIG_64BIT */
246
247#ifndef writesb
248#define writesb writesb
249static inline void writesb(volatile void __iomem *addr, const void *buffer,
250 unsigned int count)
205{ 251{
206 if (count) { 252 if (count) {
207 const u8 *buf = buffer; 253 const u8 *buf = buffer;
254
208 do { 255 do {
209 __raw_writeb(*buf++, addr + PCI_IOBASE); 256 __raw_writeb(*buf++, addr);
210 } while (--count); 257 } while (--count);
211 } 258 }
212} 259}
213#endif 260#endif
214 261
215#ifndef outsw 262#ifndef writesw
216static inline void outsw(unsigned long addr, const void *buffer, int count) 263#define writesw writesw
264static inline void writesw(volatile void __iomem *addr, const void *buffer,
265 unsigned int count)
217{ 266{
218 if (count) { 267 if (count) {
219 const u16 *buf = buffer; 268 const u16 *buf = buffer;
269
220 do { 270 do {
221 __raw_writew(*buf++, addr + PCI_IOBASE); 271 __raw_writew(*buf++, addr);
222 } while (--count); 272 } while (--count);
223 } 273 }
224} 274}
225#endif 275#endif
226 276
227#ifndef outsl 277#ifndef writesl
228static inline void outsl(unsigned long addr, const void *buffer, int count) 278#define writesl writesl
279static inline void writesl(volatile void __iomem *addr, const void *buffer,
280 unsigned int count)
229{ 281{
230 if (count) { 282 if (count) {
231 const u32 *buf = buffer; 283 const u32 *buf = buffer;
284
232 do { 285 do {
233 __raw_writel(*buf++, addr + PCI_IOBASE); 286 __raw_writel(*buf++, addr);
234 } while (--count); 287 } while (--count);
235 } 288 }
236} 289}
237#endif 290#endif
238 291
239#ifndef CONFIG_GENERIC_IOMAP 292#ifdef CONFIG_64BIT
240#define ioread8(addr) readb(addr) 293#ifndef writesq
241#define ioread16(addr) readw(addr) 294#define writesq writesq
242#define ioread16be(addr) __be16_to_cpu(__raw_readw(addr)) 295static inline void writesq(volatile void __iomem *addr, const void *buffer,
243#define ioread32(addr) readl(addr) 296 unsigned int count)
244#define ioread32be(addr) __be32_to_cpu(__raw_readl(addr)) 297{
245 298 if (count) {
246#define iowrite8(v, addr) writeb((v), (addr)) 299 const u64 *buf = buffer;
247#define iowrite16(v, addr) writew((v), (addr)) 300
248#define iowrite16be(v, addr) __raw_writew(__cpu_to_be16(v), addr) 301 do {
249#define iowrite32(v, addr) writel((v), (addr)) 302 __raw_writeq(*buf++, addr);
250#define iowrite32be(v, addr) __raw_writel(__cpu_to_be32(v), addr) 303 } while (--count);
251 304 }
252#define ioread8_rep(p, dst, count) \ 305}
253 insb((unsigned long) (p), (dst), (count)) 306#endif
254#define ioread16_rep(p, dst, count) \ 307#endif /* CONFIG_64BIT */
255 insw((unsigned long) (p), (dst), (count)) 308
256#define ioread32_rep(p, dst, count) \ 309#ifndef PCI_IOBASE
257 insl((unsigned long) (p), (dst), (count)) 310#define PCI_IOBASE ((void __iomem *)0)
258 311#endif
259#define iowrite8_rep(p, src, count) \
260 outsb((unsigned long) (p), (src), (count))
261#define iowrite16_rep(p, src, count) \
262 outsw((unsigned long) (p), (src), (count))
263#define iowrite32_rep(p, src, count) \
264 outsl((unsigned long) (p), (src), (count))
265#endif /* CONFIG_GENERIC_IOMAP */
266 312
267#ifndef IO_SPACE_LIMIT 313#ifndef IO_SPACE_LIMIT
268#define IO_SPACE_LIMIT 0xffff 314#define IO_SPACE_LIMIT 0xffff
269#endif 315#endif
270 316
317/*
318 * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
319 * implemented on hardware that needs an additional delay for I/O accesses to
320 * take effect.
321 */
322
323#ifndef inb
324#define inb inb
325static inline u8 inb(unsigned long addr)
326{
327 return readb(PCI_IOBASE + addr);
328}
329#endif
330
331#ifndef inw
332#define inw inw
333static inline u16 inw(unsigned long addr)
334{
335 return readw(PCI_IOBASE + addr);
336}
337#endif
338
339#ifndef inl
340#define inl inl
341static inline u32 inl(unsigned long addr)
342{
343 return readl(PCI_IOBASE + addr);
344}
345#endif
346
347#ifndef outb
348#define outb outb
349static inline void outb(u8 value, unsigned long addr)
350{
351 writeb(value, PCI_IOBASE + addr);
352}
353#endif
354
355#ifndef outw
356#define outw outw
357static inline void outw(u16 value, unsigned long addr)
358{
359 writew(value, PCI_IOBASE + addr);
360}
361#endif
362
363#ifndef outl
364#define outl outl
365static inline void outl(u32 value, unsigned long addr)
366{
367 writel(value, PCI_IOBASE + addr);
368}
369#endif
370
371#ifndef inb_p
372#define inb_p inb_p
373static inline u8 inb_p(unsigned long addr)
374{
375 return inb(addr);
376}
377#endif
378
379#ifndef inw_p
380#define inw_p inw_p
381static inline u16 inw_p(unsigned long addr)
382{
383 return inw(addr);
384}
385#endif
386
387#ifndef inl_p
388#define inl_p inl_p
389static inline u32 inl_p(unsigned long addr)
390{
391 return inl(addr);
392}
393#endif
394
395#ifndef outb_p
396#define outb_p outb_p
397static inline void outb_p(u8 value, unsigned long addr)
398{
399 outb(value, addr);
400}
401#endif
402
403#ifndef outw_p
404#define outw_p outw_p
405static inline void outw_p(u16 value, unsigned long addr)
406{
407 outw(value, addr);
408}
409#endif
410
411#ifndef outl_p
412#define outl_p outl_p
413static inline void outl_p(u32 value, unsigned long addr)
414{
415 outl(value, addr);
416}
417#endif
418
419/*
420 * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
421 * single I/O port multiple times.
422 */
423
424#ifndef insb
425#define insb insb
426static inline void insb(unsigned long addr, void *buffer, unsigned int count)
427{
428 readsb(PCI_IOBASE + addr, buffer, count);
429}
430#endif
431
432#ifndef insw
433#define insw insw
434static inline void insw(unsigned long addr, void *buffer, unsigned int count)
435{
436 readsw(PCI_IOBASE + addr, buffer, count);
437}
438#endif
439
440#ifndef insl
441#define insl insl
442static inline void insl(unsigned long addr, void *buffer, unsigned int count)
443{
444 readsl(PCI_IOBASE + addr, buffer, count);
445}
446#endif
447
448#ifndef outsb
449#define outsb outsb
450static inline void outsb(unsigned long addr, const void *buffer,
451 unsigned int count)
452{
453 writesb(PCI_IOBASE + addr, buffer, count);
454}
455#endif
456
457#ifndef outsw
458#define outsw outsw
459static inline void outsw(unsigned long addr, const void *buffer,
460 unsigned int count)
461{
462 writesw(PCI_IOBASE + addr, buffer, count);
463}
464#endif
465
466#ifndef outsl
467#define outsl outsl
468static inline void outsl(unsigned long addr, const void *buffer,
469 unsigned int count)
470{
471 writesl(PCI_IOBASE + addr, buffer, count);
472}
473#endif
474
475#ifndef insb_p
476#define insb_p insb_p
477static inline void insb_p(unsigned long addr, void *buffer, unsigned int count)
478{
479 insb(addr, buffer, count);
480}
481#endif
482
483#ifndef insw_p
484#define insw_p insw_p
485static inline void insw_p(unsigned long addr, void *buffer, unsigned int count)
486{
487 insw(addr, buffer, count);
488}
489#endif
490
491#ifndef insl_p
492#define insl_p insl_p
493static inline void insl_p(unsigned long addr, void *buffer, unsigned int count)
494{
495 insl(addr, buffer, count);
496}
497#endif
498
499#ifndef outsb_p
500#define outsb_p outsb_p
501static inline void outsb_p(unsigned long addr, const void *buffer,
502 unsigned int count)
503{
504 outsb(addr, buffer, count);
505}
506#endif
507
508#ifndef outsw_p
509#define outsw_p outsw_p
510static inline void outsw_p(unsigned long addr, const void *buffer,
511 unsigned int count)
512{
513 outsw(addr, buffer, count);
514}
515#endif
516
517#ifndef outsl_p
518#define outsl_p outsl_p
519static inline void outsl_p(unsigned long addr, const void *buffer,
520 unsigned int count)
521{
522 outsl(addr, buffer, count);
523}
524#endif
525
526#ifndef CONFIG_GENERIC_IOMAP
527#ifndef ioread8
528#define ioread8 ioread8
529static inline u8 ioread8(const volatile void __iomem *addr)
530{
531 return readb(addr);
532}
533#endif
534
535#ifndef ioread16
536#define ioread16 ioread16
537static inline u16 ioread16(const volatile void __iomem *addr)
538{
539 return readw(addr);
540}
541#endif
542
543#ifndef ioread32
544#define ioread32 ioread32
545static inline u32 ioread32(const volatile void __iomem *addr)
546{
547 return readl(addr);
548}
549#endif
550
551#ifndef iowrite8
552#define iowrite8 iowrite8
553static inline void iowrite8(u8 value, volatile void __iomem *addr)
554{
555 writeb(value, addr);
556}
557#endif
558
559#ifndef iowrite16
560#define iowrite16 iowrite16
561static inline void iowrite16(u16 value, volatile void __iomem *addr)
562{
563 writew(value, addr);
564}
565#endif
566
567#ifndef iowrite32
568#define iowrite32 iowrite32
569static inline void iowrite32(u32 value, volatile void __iomem *addr)
570{
571 writel(value, addr);
572}
573#endif
574
575#ifndef ioread16be
576#define ioread16be ioread16be
577static inline u16 ioread16be(const volatile void __iomem *addr)
578{
579 return __be16_to_cpu(__raw_readw(addr));
580}
581#endif
582
583#ifndef ioread32be
584#define ioread32be ioread32be
585static inline u32 ioread32be(const volatile void __iomem *addr)
586{
587 return __be32_to_cpu(__raw_readl(addr));
588}
589#endif
590
591#ifndef iowrite16be
592#define iowrite16be iowrite16be
593static inline void iowrite16be(u16 value, void volatile __iomem *addr)
594{
595 __raw_writew(__cpu_to_be16(value), addr);
596}
597#endif
598
599#ifndef iowrite32be
600#define iowrite32be iowrite32be
601static inline void iowrite32be(u32 value, volatile void __iomem *addr)
602{
603 __raw_writel(__cpu_to_be32(value), addr);
604}
605#endif
606
607#ifndef ioread8_rep
608#define ioread8_rep ioread8_rep
609static inline void ioread8_rep(const volatile void __iomem *addr, void *buffer,
610 unsigned int count)
611{
612 readsb(addr, buffer, count);
613}
614#endif
615
616#ifndef ioread16_rep
617#define ioread16_rep ioread16_rep
618static inline void ioread16_rep(const volatile void __iomem *addr,
619 void *buffer, unsigned int count)
620{
621 readsw(addr, buffer, count);
622}
623#endif
624
625#ifndef ioread32_rep
626#define ioread32_rep ioread32_rep
627static inline void ioread32_rep(const volatile void __iomem *addr,
628 void *buffer, unsigned int count)
629{
630 readsl(addr, buffer, count);
631}
632#endif
633
634#ifndef iowrite8_rep
635#define iowrite8_rep iowrite8_rep
636static inline void iowrite8_rep(volatile void __iomem *addr,
637 const void *buffer,
638 unsigned int count)
639{
640 writesb(addr, buffer, count);
641}
642#endif
643
644#ifndef iowrite16_rep
645#define iowrite16_rep iowrite16_rep
646static inline void iowrite16_rep(volatile void __iomem *addr,
647 const void *buffer,
648 unsigned int count)
649{
650 writesw(addr, buffer, count);
651}
652#endif
653
654#ifndef iowrite32_rep
655#define iowrite32_rep iowrite32_rep
656static inline void iowrite32_rep(volatile void __iomem *addr,
657 const void *buffer,
658 unsigned int count)
659{
660 writesl(addr, buffer, count);
661}
662#endif
663#endif /* CONFIG_GENERIC_IOMAP */
664
271#ifdef __KERNEL__ 665#ifdef __KERNEL__
272 666
273#include <linux/vmalloc.h> 667#include <linux/vmalloc.h>
274#define __io_virt(x) ((void __force *) (x)) 668#define __io_virt(x) ((void __force *)(x))
275 669
276#ifndef CONFIG_GENERIC_IOMAP 670#ifndef CONFIG_GENERIC_IOMAP
277struct pci_dev; 671struct pci_dev;
278extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); 672extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
279 673
280#ifndef pci_iounmap 674#ifndef pci_iounmap
675#define pci_iounmap pci_iounmap
281static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) 676static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
282{ 677{
283} 678}
@@ -289,11 +684,15 @@ static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p)
289 * These are pretty trivial 684 * These are pretty trivial
290 */ 685 */
291#ifndef virt_to_phys 686#ifndef virt_to_phys
687#define virt_to_phys virt_to_phys
292static inline unsigned long virt_to_phys(volatile void *address) 688static inline unsigned long virt_to_phys(volatile void *address)
293{ 689{
294 return __pa((unsigned long)address); 690 return __pa((unsigned long)address);
295} 691}
692#endif
296 693
694#ifndef phys_to_virt
695#define phys_to_virt phys_to_virt
297static inline void *phys_to_virt(unsigned long address) 696static inline void *phys_to_virt(unsigned long address)
298{ 697{
299 return __va(address); 698 return __va(address);
@@ -306,37 +705,65 @@ static inline void *phys_to_virt(unsigned long address)
306 * This implementation is for the no-MMU case only... if you have an MMU 705 * This implementation is for the no-MMU case only... if you have an MMU
307 * you'll need to provide your own definitions. 706 * you'll need to provide your own definitions.
308 */ 707 */
708
309#ifndef CONFIG_MMU 709#ifndef CONFIG_MMU
310static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size) 710#ifndef ioremap
711#define ioremap ioremap
712static inline void __iomem *ioremap(phys_addr_t offset, size_t size)
311{ 713{
312 return (void __iomem*) (unsigned long)offset; 714 return (void __iomem *)(unsigned long)offset;
313} 715}
716#endif
314 717
315#define __ioremap(offset, size, flags) ioremap(offset, size) 718#ifndef __ioremap
719#define __ioremap __ioremap
720static inline void __iomem *__ioremap(phys_addr_t offset, size_t size,
721 unsigned long flags)
722{
723 return ioremap(offset, size);
724}
725#endif
316 726
317#ifndef ioremap_nocache 727#ifndef ioremap_nocache
318#define ioremap_nocache ioremap 728#define ioremap_nocache ioremap_nocache
729static inline void __iomem *ioremap_nocache(phys_addr_t offset, size_t size)
730{
731 return ioremap(offset, size);
732}
319#endif 733#endif
320 734
321#ifndef ioremap_wc 735#ifndef ioremap_wc
322#define ioremap_wc ioremap_nocache 736#define ioremap_wc ioremap_wc
737static inline void __iomem *ioremap_wc(phys_addr_t offset, size_t size)
738{
739 return ioremap_nocache(offset, size);
740}
323#endif 741#endif
324 742
743#ifndef iounmap
744#define iounmap iounmap
325static inline void iounmap(void __iomem *addr) 745static inline void iounmap(void __iomem *addr)
326{ 746{
327} 747}
748#endif
328#endif /* CONFIG_MMU */ 749#endif /* CONFIG_MMU */
329 750
330#ifdef CONFIG_HAS_IOPORT_MAP 751#ifdef CONFIG_HAS_IOPORT_MAP
331#ifndef CONFIG_GENERIC_IOMAP 752#ifndef CONFIG_GENERIC_IOMAP
753#ifndef ioport_map
754#define ioport_map ioport_map
332static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) 755static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
333{ 756{
334 return PCI_IOBASE + (port & IO_SPACE_LIMIT); 757 return PCI_IOBASE + (port & IO_SPACE_LIMIT);
335} 758}
759#endif
336 760
761#ifndef ioport_unmap
762#define ioport_unmap ioport_unmap
337static inline void ioport_unmap(void __iomem *p) 763static inline void ioport_unmap(void __iomem *p)
338{ 764{
339} 765}
766#endif
340#else /* CONFIG_GENERIC_IOMAP */ 767#else /* CONFIG_GENERIC_IOMAP */
341extern void __iomem *ioport_map(unsigned long port, unsigned int nr); 768extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
342extern void ioport_unmap(void __iomem *p); 769extern void ioport_unmap(void __iomem *p);
@@ -344,35 +771,68 @@ extern void ioport_unmap(void __iomem *p);
344#endif /* CONFIG_HAS_IOPORT_MAP */ 771#endif /* CONFIG_HAS_IOPORT_MAP */
345 772
346#ifndef xlate_dev_kmem_ptr 773#ifndef xlate_dev_kmem_ptr
347#define xlate_dev_kmem_ptr(p) p 774#define xlate_dev_kmem_ptr xlate_dev_kmem_ptr
775static inline void *xlate_dev_kmem_ptr(void *addr)
776{
777 return addr;
778}
348#endif 779#endif
780
349#ifndef xlate_dev_mem_ptr 781#ifndef xlate_dev_mem_ptr
350#define xlate_dev_mem_ptr(p) __va(p) 782#define xlate_dev_mem_ptr xlate_dev_mem_ptr
783static inline void *xlate_dev_mem_ptr(phys_addr_t addr)
784{
785 return __va(addr);
786}
787#endif
788
789#ifndef unxlate_dev_mem_ptr
790#define unxlate_dev_mem_ptr unxlate_dev_mem_ptr
791static inline void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)
792{
793}
351#endif 794#endif
352 795
353#ifdef CONFIG_VIRT_TO_BUS 796#ifdef CONFIG_VIRT_TO_BUS
354#ifndef virt_to_bus 797#ifndef virt_to_bus
355static inline unsigned long virt_to_bus(volatile void *address) 798static inline unsigned long virt_to_bus(void *address)
356{ 799{
357 return ((unsigned long) address); 800 return (unsigned long)address;
358} 801}
359 802
360static inline void *bus_to_virt(unsigned long address) 803static inline void *bus_to_virt(unsigned long address)
361{ 804{
362 return (void *) address; 805 return (void *)address;
363} 806}
364#endif 807#endif
365#endif 808#endif
366 809
367#ifndef memset_io 810#ifndef memset_io
368#define memset_io(a, b, c) memset(__io_virt(a), (b), (c)) 811#define memset_io memset_io
812static inline void memset_io(volatile void __iomem *addr, int value,
813 size_t size)
814{
815 memset(__io_virt(addr), value, size);
816}
369#endif 817#endif
370 818
371#ifndef memcpy_fromio 819#ifndef memcpy_fromio
372#define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c)) 820#define memcpy_fromio memcpy_fromio
821static inline void memcpy_fromio(void *buffer,
822 const volatile void __iomem *addr,
823 size_t size)
824{
825 memcpy(buffer, __io_virt(addr), size);
826}
373#endif 827#endif
828
374#ifndef memcpy_toio 829#ifndef memcpy_toio
375#define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c)) 830#define memcpy_toio memcpy_toio
831static inline void memcpy_toio(volatile void __iomem *addr, const void *buffer,
832 size_t size)
833{
834 memcpy(__io_virt(addr), buffer, size);
835}
376#endif 836#endif
377 837
378#endif /* __KERNEL__ */ 838#endif /* __KERNEL__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-24 02:14:29 -0400