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-rw-r--r--drivers/mtd/nand/denali.c2
-rw-r--r--drivers/mtd/nand/nand_base.c14
-rw-r--r--include/linux/mtd/nand.h9
3 files changed, 16 insertions, 9 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 154b033b4e8e..370b9dd7a278 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1520,7 +1520,7 @@ int denali_init(struct denali_nand_info *denali)
1520 * so just let controller do 15bit ECC for MLC and 8bit ECC for 1520 * so just let controller do 15bit ECC for MLC and 8bit ECC for
1521 * SLC if possible. 1521 * SLC if possible.
1522 * */ 1522 * */
1523 if (denali->nand.cellinfo & NAND_CI_CELLTYPE_MSK && 1523 if (!nand_is_slc(&denali->nand) &&
1524 (denali->mtd.oobsize > (denali->bbtskipbytes + 1524 (denali->mtd.oobsize > (denali->bbtskipbytes +
1525 ECC_15BITS * (denali->mtd.writesize / 1525 ECC_15BITS * (denali->mtd.writesize /
1526 ECC_SECTOR_SIZE)))) { 1526 ECC_SECTOR_SIZE)))) {
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 0b39d0c03f1e..6ea66270dbf5 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3108,8 +3108,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
3108 * ID to decide what to do. 3108 * ID to decide what to do.
3109 */ 3109 */
3110 if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG && 3110 if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG &&
3111 (chip->cellinfo & NAND_CI_CELLTYPE_MSK) && 3111 !nand_is_slc(chip) && id_data[5] != 0x00) {
3112 id_data[5] != 0x00) {
3113 /* Calc pagesize */ 3112 /* Calc pagesize */
3114 mtd->writesize = 2048 << (extid & 0x03); 3113 mtd->writesize = 2048 << (extid & 0x03);
3115 extid >>= 2; 3114 extid >>= 2;
@@ -3141,7 +3140,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
3141 (((extid >> 1) & 0x04) | (extid & 0x03)); 3140 (((extid >> 1) & 0x04) | (extid & 0x03));
3142 *busw = 0; 3141 *busw = 0;
3143 } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX && 3142 } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
3144 (chip->cellinfo & NAND_CI_CELLTYPE_MSK)) { 3143 !nand_is_slc(chip)) {
3145 unsigned int tmp; 3144 unsigned int tmp;
3146 3145
3147 /* Calc pagesize */ 3146 /* Calc pagesize */
@@ -3204,7 +3203,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
3204 * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC 3203 * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC
3205 */ 3204 */
3206 if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA && 3205 if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA &&
3207 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK) && 3206 nand_is_slc(chip) &&
3208 (id_data[5] & 0x7) == 0x6 /* 24nm */ && 3207 (id_data[5] & 0x7) == 0x6 /* 24nm */ &&
3209 !(id_data[4] & 0x80) /* !BENAND */) { 3208 !(id_data[4] & 0x80) /* !BENAND */) {
3210 mtd->oobsize = 32 * mtd->writesize >> 9; 3209 mtd->oobsize = 32 * mtd->writesize >> 9;
@@ -3265,11 +3264,11 @@ static void nand_decode_bbm_options(struct mtd_info *mtd,
3265 * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba, 3264 * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba,
3266 * AMD/Spansion, and Macronix. All others scan only the first page. 3265 * AMD/Spansion, and Macronix. All others scan only the first page.
3267 */ 3266 */
3268 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) && 3267 if (!nand_is_slc(chip) &&
3269 (maf_id == NAND_MFR_SAMSUNG || 3268 (maf_id == NAND_MFR_SAMSUNG ||
3270 maf_id == NAND_MFR_HYNIX)) 3269 maf_id == NAND_MFR_HYNIX))
3271 chip->bbt_options |= NAND_BBT_SCANLASTPAGE; 3270 chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
3272 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) && 3271 else if ((nand_is_slc(chip) &&
3273 (maf_id == NAND_MFR_SAMSUNG || 3272 (maf_id == NAND_MFR_SAMSUNG ||
3274 maf_id == NAND_MFR_HYNIX || 3273 maf_id == NAND_MFR_HYNIX ||
3275 maf_id == NAND_MFR_TOSHIBA || 3274 maf_id == NAND_MFR_TOSHIBA ||
@@ -3745,8 +3744,7 @@ int nand_scan_tail(struct mtd_info *mtd)
3745 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; 3744 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
3746 3745
3747 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ 3746 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
3748 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && 3747 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {
3749 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
3750 switch (chip->ecc.steps) { 3748 switch (chip->ecc.steps) {
3751 case 2: 3749 case 2:
3752 mtd->subpage_sft = 1; 3750 mtd->subpage_sft = 1;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 129548169400..5c05bab0ad89 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -795,4 +795,13 @@ static inline int onfi_get_sync_timing_mode(struct nand_chip *chip)
795 return le16_to_cpu(chip->onfi_params.src_sync_timing_mode); 795 return le16_to_cpu(chip->onfi_params.src_sync_timing_mode);
796} 796}
797 797
798/*
799 * Check if it is a SLC nand.
800 * The !nand_is_slc() can be used to check the MLC/TLC nand chips.
801 * We do not distinguish the MLC and TLC now.
802 */
803static inline bool nand_is_slc(struct nand_chip *chip)
804{
805 return !(chip->cellinfo & NAND_CI_CELLTYPE_MSK);
806}
798#endif /* __LINUX_MTD_NAND_H */ 807#endif /* __LINUX_MTD_NAND_H */