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-rw-r--r--arch/x86/pci/intel_mid_pci.c3
-rw-r--r--arch/x86/platform/intel-mid/sfi.c2
-rw-r--r--arch/x86/platform/sfi/sfi.c8
3 files changed, 12 insertions, 1 deletions
diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
index 84b9d672843d..fcbdc5fac2c6 100644
--- a/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -217,6 +217,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
217 * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to 217 * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
218 * IOAPIC RTE entries, so we just enable RTE for the device. 218 * IOAPIC RTE entries, so we just enable RTE for the device.
219 */ 219 */
220 if (mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC) < 0)
221 return -EBUSY;
222
220 irq_attr.ioapic = mp_find_ioapic(dev->irq); 223 irq_attr.ioapic = mp_find_ioapic(dev->irq);
221 irq_attr.ioapic_pin = dev->irq; 224 irq_attr.ioapic_pin = dev->irq;
222 irq_attr.trigger = 1; /* level */ 225 irq_attr.trigger = 1; /* level */
diff --git a/arch/x86/platform/intel-mid/sfi.c b/arch/x86/platform/intel-mid/sfi.c
index 994c40bd7cb7..7161395e7de7 100644
--- a/arch/x86/platform/intel-mid/sfi.c
+++ b/arch/x86/platform/intel-mid/sfi.c
@@ -473,6 +473,8 @@ static int __init sfi_parse_devs(struct sfi_table_header *table)
473 /* PNW and CLV go with active low */ 473 /* PNW and CLV go with active low */
474 irq_attr.polarity = 1; 474 irq_attr.polarity = 1;
475 } 475 }
476 WARN_ON(mp_map_gsi_to_irq(irq,
477 IOAPIC_MAP_ALLOC) < 0);
476 io_apic_set_pci_routing(NULL, irq, &irq_attr); 478 io_apic_set_pci_routing(NULL, irq, &irq_attr);
477 } 479 }
478 } else { 480 } else {
diff --git a/arch/x86/platform/sfi/sfi.c b/arch/x86/platform/sfi/sfi.c
index 8f2f789c6f04..1fdaa57f41a5 100644
--- a/arch/x86/platform/sfi/sfi.c
+++ b/arch/x86/platform/sfi/sfi.c
@@ -25,6 +25,7 @@
25#include <linux/init.h> 25#include <linux/init.h>
26#include <linux/sfi.h> 26#include <linux/sfi.h>
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/irqdomain.h>
28 29
29#include <asm/io_apic.h> 30#include <asm/io_apic.h>
30#include <asm/mpspec.h> 31#include <asm/mpspec.h>
@@ -70,19 +71,24 @@ static int __init sfi_parse_cpus(struct sfi_table_header *table)
70#endif /* CONFIG_X86_LOCAL_APIC */ 71#endif /* CONFIG_X86_LOCAL_APIC */
71 72
72#ifdef CONFIG_X86_IO_APIC 73#ifdef CONFIG_X86_IO_APIC
74static struct irq_domain_ops sfi_ioapic_irqdomain_ops;
73 75
74static int __init sfi_parse_ioapic(struct sfi_table_header *table) 76static int __init sfi_parse_ioapic(struct sfi_table_header *table)
75{ 77{
76 struct sfi_table_simple *sb; 78 struct sfi_table_simple *sb;
77 struct sfi_apic_table_entry *pentry; 79 struct sfi_apic_table_entry *pentry;
78 int i, num; 80 int i, num;
81 struct ioapic_domain_cfg cfg = {
82 .type = IOAPIC_DOMAIN_STRICT,
83 .ops = &sfi_ioapic_irqdomain_ops,
84 };
79 85
80 sb = (struct sfi_table_simple *)table; 86 sb = (struct sfi_table_simple *)table;
81 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_apic_table_entry); 87 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_apic_table_entry);
82 pentry = (struct sfi_apic_table_entry *)sb->pentry; 88 pentry = (struct sfi_apic_table_entry *)sb->pentry;
83 89
84 for (i = 0; i < num; i++) { 90 for (i = 0; i < num; i++) {
85 mp_register_ioapic(i, pentry->phys_addr, gsi_top, NULL); 91 mp_register_ioapic(i, pentry->phys_addr, gsi_top, &cfg);
86 pentry++; 92 pentry++;
87 } 93 }
88 94