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-rw-r--r--drivers/net/Kconfig2
-rw-r--r--drivers/net/ucc_geth.c633
-rw-r--r--drivers/net/ucc_geth.h248
-rw-r--r--drivers/net/ucc_geth_phy.c26
-rw-r--r--drivers/net/ucc_geth_phy.h2
5 files changed, 475 insertions, 436 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index ab92cc794c64..e2ed24918a58 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -2288,7 +2288,7 @@ config UGETH_TX_ON_DEMOND
2288 2288
2289config UGETH_HAS_GIGA 2289config UGETH_HAS_GIGA
2290 bool 2290 bool
2291 depends on UCC_GETH && MPC836x 2291 depends on UCC_GETH && PPC_MPC836x
2292 2292
2293config MV643XX_ETH 2293config MV643XX_ETH
2294 tristate "MV-643XX Ethernet support" 2294 tristate "MV-643XX Ethernet support"
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 12cd7b561f35..b37888011067 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -2,14 +2,11 @@
2 * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved. 2 * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
3 * 3 *
4 * Author: Shlomi Gridish <gridish@freescale.com> 4 * Author: Shlomi Gridish <gridish@freescale.com>
5 * Li Yang <leoli@freescale.com>
5 * 6 *
6 * Description: 7 * Description:
7 * QE UCC Gigabit Ethernet Driver 8 * QE UCC Gigabit Ethernet Driver
8 * 9 *
9 * Changelog:
10 * Jul 6, 2006 Li Yang <LeoLi@freescale.com>
11 * - Rearrange code and style fixes
12 *
13 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the 11 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your 12 * Free Software Foundation; either version 2 of the License, or (at your
@@ -31,9 +28,9 @@
31#include <linux/dma-mapping.h> 28#include <linux/dma-mapping.h>
32#include <linux/fsl_devices.h> 29#include <linux/fsl_devices.h>
33#include <linux/ethtool.h> 30#include <linux/ethtool.h>
34#include <linux/platform_device.h>
35#include <linux/mii.h> 31#include <linux/mii.h>
36 32
33#include <asm/of_device.h>
37#include <asm/uaccess.h> 34#include <asm/uaccess.h>
38#include <asm/irq.h> 35#include <asm/irq.h>
39#include <asm/io.h> 36#include <asm/io.h>
@@ -70,7 +67,7 @@
70 67
71static DEFINE_SPINLOCK(ugeth_lock); 68static DEFINE_SPINLOCK(ugeth_lock);
72 69
73static ucc_geth_info_t ugeth_primary_info = { 70static struct ucc_geth_info ugeth_primary_info = {
74 .uf_info = { 71 .uf_info = {
75 .bd_mem_part = MEM_PART_SYSTEM, 72 .bd_mem_part = MEM_PART_SYSTEM,
76 .rtsm = UCC_FAST_SEND_IDLES_BETWEEN_FRAMES, 73 .rtsm = UCC_FAST_SEND_IDLES_BETWEEN_FRAMES,
@@ -163,7 +160,7 @@ static ucc_geth_info_t ugeth_primary_info = {
163 .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, 160 .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
164}; 161};
165 162
166static ucc_geth_info_t ugeth_info[8]; 163static struct ucc_geth_info ugeth_info[8];
167 164
168#ifdef DEBUG 165#ifdef DEBUG
169static void mem_disp(u8 *addr, int size) 166static void mem_disp(u8 *addr, int size)
@@ -219,8 +216,8 @@ static struct list_head *dequeue(struct list_head *lh)
219 } 216 }
220} 217}
221 218
222static int get_interface_details(enet_interface_e enet_interface, 219static int get_interface_details(enum enet_interface enet_interface,
223 enet_speed_e *speed, 220 enum enet_speed *speed,
224 int *r10m, 221 int *r10m,
225 int *rmm, 222 int *rmm,
226 int *rpm, 223 int *rpm,
@@ -283,7 +280,7 @@ static int get_interface_details(enet_interface_e enet_interface,
283 return 0; 280 return 0;
284} 281}
285 282
286static struct sk_buff *get_new_skb(ucc_geth_private_t *ugeth, u8 *bd) 283static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, u8 *bd)
287{ 284{
288 struct sk_buff *skb = NULL; 285 struct sk_buff *skb = NULL;
289 286
@@ -303,21 +300,19 @@ static struct sk_buff *get_new_skb(ucc_geth_private_t *ugeth, u8 *bd)
303 300
304 skb->dev = ugeth->dev; 301 skb->dev = ugeth->dev;
305 302
306 BD_BUFFER_SET(bd, 303 out_be32(&((struct qe_bd *)bd)->buf,
307 dma_map_single(NULL, 304 dma_map_single(NULL,
308 skb->data, 305 skb->data,
309 ugeth->ug_info->uf_info.max_rx_buf_length + 306 ugeth->ug_info->uf_info.max_rx_buf_length +
310 UCC_GETH_RX_DATA_BUF_ALIGNMENT, 307 UCC_GETH_RX_DATA_BUF_ALIGNMENT,
311 DMA_FROM_DEVICE)); 308 DMA_FROM_DEVICE));
312 309
313 BD_STATUS_AND_LENGTH_SET(bd, 310 out_be32((u32 *)bd, (R_E | R_I | (in_be32((u32 *)bd) & R_W)));
314 (R_E | R_I |
315 (BD_STATUS_AND_LENGTH(bd) & R_W)));
316 311
317 return skb; 312 return skb;
318} 313}
319 314
320static int rx_bd_buffer_set(ucc_geth_private_t *ugeth, u8 rxQ) 315static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ)
321{ 316{
322 u8 *bd; 317 u8 *bd;
323 u32 bd_status; 318 u32 bd_status;
@@ -328,7 +323,7 @@ static int rx_bd_buffer_set(ucc_geth_private_t *ugeth, u8 rxQ)
328 i = 0; 323 i = 0;
329 324
330 do { 325 do {
331 bd_status = BD_STATUS_AND_LENGTH(bd); 326 bd_status = in_be32((u32*)bd);
332 skb = get_new_skb(ugeth, bd); 327 skb = get_new_skb(ugeth, bd);
333 328
334 if (!skb) /* If can not allocate data buffer, 329 if (!skb) /* If can not allocate data buffer,
@@ -338,19 +333,19 @@ static int rx_bd_buffer_set(ucc_geth_private_t *ugeth, u8 rxQ)
338 ugeth->rx_skbuff[rxQ][i] = skb; 333 ugeth->rx_skbuff[rxQ][i] = skb;
339 334
340 /* advance the BD pointer */ 335 /* advance the BD pointer */
341 bd += UCC_GETH_SIZE_OF_BD; 336 bd += sizeof(struct qe_bd);
342 i++; 337 i++;
343 } while (!(bd_status & R_W)); 338 } while (!(bd_status & R_W));
344 339
345 return 0; 340 return 0;
346} 341}
347 342
348static int fill_init_enet_entries(ucc_geth_private_t *ugeth, 343static int fill_init_enet_entries(struct ucc_geth_private *ugeth,
349 volatile u32 *p_start, 344 volatile u32 *p_start,
350 u8 num_entries, 345 u8 num_entries,
351 u32 thread_size, 346 u32 thread_size,
352 u32 thread_alignment, 347 u32 thread_alignment,
353 qe_risc_allocation_e risc, 348 enum qe_risc_allocation risc,
354 int skip_page_for_first_entry) 349 int skip_page_for_first_entry)
355{ 350{
356 u32 init_enet_offset; 351 u32 init_enet_offset;
@@ -383,10 +378,10 @@ static int fill_init_enet_entries(ucc_geth_private_t *ugeth,
383 return 0; 378 return 0;
384} 379}
385 380
386static int return_init_enet_entries(ucc_geth_private_t *ugeth, 381static int return_init_enet_entries(struct ucc_geth_private *ugeth,
387 volatile u32 *p_start, 382 volatile u32 *p_start,
388 u8 num_entries, 383 u8 num_entries,
389 qe_risc_allocation_e risc, 384 enum qe_risc_allocation risc,
390 int skip_page_for_first_entry) 385 int skip_page_for_first_entry)
391{ 386{
392 u32 init_enet_offset; 387 u32 init_enet_offset;
@@ -416,11 +411,11 @@ static int return_init_enet_entries(ucc_geth_private_t *ugeth,
416} 411}
417 412
418#ifdef DEBUG 413#ifdef DEBUG
419static int dump_init_enet_entries(ucc_geth_private_t *ugeth, 414static int dump_init_enet_entries(struct ucc_geth_private *ugeth,
420 volatile u32 *p_start, 415 volatile u32 *p_start,
421 u8 num_entries, 416 u8 num_entries,
422 u32 thread_size, 417 u32 thread_size,
423 qe_risc_allocation_e risc, 418 enum qe_risc_allocation risc,
424 int skip_page_for_first_entry) 419 int skip_page_for_first_entry)
425{ 420{
426 u32 init_enet_offset; 421 u32 init_enet_offset;
@@ -456,14 +451,14 @@ static int dump_init_enet_entries(ucc_geth_private_t *ugeth,
456#endif 451#endif
457 452
458#ifdef CONFIG_UGETH_FILTERING 453#ifdef CONFIG_UGETH_FILTERING
459static enet_addr_container_t *get_enet_addr_container(void) 454static struct enet_addr_container *get_enet_addr_container(void)
460{ 455{
461 enet_addr_container_t *enet_addr_cont; 456 struct enet_addr_container *enet_addr_cont;
462 457
463 /* allocate memory */ 458 /* allocate memory */
464 enet_addr_cont = kmalloc(sizeof(enet_addr_container_t), GFP_KERNEL); 459 enet_addr_cont = kmalloc(sizeof(struct enet_addr_container), GFP_KERNEL);
465 if (!enet_addr_cont) { 460 if (!enet_addr_cont) {
466 ugeth_err("%s: No memory for enet_addr_container_t object.", 461 ugeth_err("%s: No memory for enet_addr_container object.",
467 __FUNCTION__); 462 __FUNCTION__);
468 return NULL; 463 return NULL;
469 } 464 }
@@ -472,45 +467,43 @@ static enet_addr_container_t *get_enet_addr_container(void)
472} 467}
473#endif /* CONFIG_UGETH_FILTERING */ 468#endif /* CONFIG_UGETH_FILTERING */
474 469
475static void put_enet_addr_container(enet_addr_container_t *enet_addr_cont) 470static void put_enet_addr_container(struct enet_addr_container *enet_addr_cont)
476{ 471{
477 kfree(enet_addr_cont); 472 kfree(enet_addr_cont);
478} 473}
479 474
475static int set_mac_addr(__be16 __iomem *reg, u8 *mac)
476{
477 out_be16(&reg[0], ((u16)mac[5] << 8) | mac[4]);
478 out_be16(&reg[1], ((u16)mac[3] << 8) | mac[2]);
479 out_be16(&reg[2], ((u16)mac[1] << 8) | mac[0]);
480}
481
480#ifdef CONFIG_UGETH_FILTERING 482#ifdef CONFIG_UGETH_FILTERING
481static int hw_add_addr_in_paddr(ucc_geth_private_t *ugeth, 483static int hw_add_addr_in_paddr(struct ucc_geth_private *ugeth,
482 enet_addr_t *p_enet_addr, u8 paddr_num) 484 u8 *p_enet_addr, u8 paddr_num)
483{ 485{
484 ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; 486 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt;
485 487
486 if (!(paddr_num < NUM_OF_PADDRS)) { 488 if (!(paddr_num < NUM_OF_PADDRS)) {
487 ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); 489 ugeth_warn("%s: Illegal paddr_num.", __FUNCTION__);
488 return -EINVAL; 490 return -EINVAL;
489 } 491 }
490 492
491 p_82xx_addr_filt = 493 p_82xx_addr_filt =
492 (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> 494 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram->
493 addressfiltering; 495 addressfiltering;
494 496
495 /* Ethernet frames are defined in Little Endian mode, */ 497 /* Ethernet frames are defined in Little Endian mode, */
496 /* therefore to insert the address we reverse the bytes. */ 498 /* therefore to insert the address we reverse the bytes. */
497 out_be16(&p_82xx_addr_filt->paddr[paddr_num].h, 499 set_mac_addr(&p_82xx_addr_filt->paddr[paddr_num].h, p_enet_addr);
498 (u16) (((u16) (((u16) ((*p_enet_addr)[5])) << 8)) |
499 (u16) (*p_enet_addr)[4]));
500 out_be16(&p_82xx_addr_filt->paddr[paddr_num].m,
501 (u16) (((u16) (((u16) ((*p_enet_addr)[3])) << 8)) |
502 (u16) (*p_enet_addr)[2]));
503 out_be16(&p_82xx_addr_filt->paddr[paddr_num].l,
504 (u16) (((u16) (((u16) ((*p_enet_addr)[1])) << 8)) |
505 (u16) (*p_enet_addr)[0]));
506
507 return 0; 500 return 0;
508} 501}
509#endif /* CONFIG_UGETH_FILTERING */ 502#endif /* CONFIG_UGETH_FILTERING */
510 503
511static int hw_clear_addr_in_paddr(ucc_geth_private_t *ugeth, u8 paddr_num) 504static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num)
512{ 505{
513 ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; 506 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt;
514 507
515 if (!(paddr_num < NUM_OF_PADDRS)) { 508 if (!(paddr_num < NUM_OF_PADDRS)) {
516 ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); 509 ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__);
@@ -518,7 +511,7 @@ static int hw_clear_addr_in_paddr(ucc_geth_private_t *ugeth, u8 paddr_num)
518 } 511 }
519 512
520 p_82xx_addr_filt = 513 p_82xx_addr_filt =
521 (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> 514 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram->
522 addressfiltering; 515 addressfiltering;
523 516
524 /* Writing address ff.ff.ff.ff.ff.ff disables address 517 /* Writing address ff.ff.ff.ff.ff.ff disables address
@@ -530,14 +523,14 @@ static int hw_clear_addr_in_paddr(ucc_geth_private_t *ugeth, u8 paddr_num)
530 return 0; 523 return 0;
531} 524}
532 525
533static void hw_add_addr_in_hash(ucc_geth_private_t *ugeth, 526static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth,
534 enet_addr_t *p_enet_addr) 527 u8 *p_enet_addr)
535{ 528{
536 ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; 529 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt;
537 u32 cecr_subblock; 530 u32 cecr_subblock;
538 531
539 p_82xx_addr_filt = 532 p_82xx_addr_filt =
540 (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> 533 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram->
541 addressfiltering; 534 addressfiltering;
542 535
543 cecr_subblock = 536 cecr_subblock =
@@ -546,25 +539,18 @@ static void hw_add_addr_in_hash(ucc_geth_private_t *ugeth,
546 /* Ethernet frames are defined in Little Endian mode, 539 /* Ethernet frames are defined in Little Endian mode,
547 therefor to insert */ 540 therefor to insert */
548 /* the address to the hash (Big Endian mode), we reverse the bytes.*/ 541 /* the address to the hash (Big Endian mode), we reverse the bytes.*/
549 out_be16(&p_82xx_addr_filt->taddr.h, 542
550 (u16) (((u16) (((u16) ((*p_enet_addr)[5])) << 8)) | 543 set_mac_addr(&p_82xx_addr_filt->taddr.h, p_enet_addr);
551 (u16) (*p_enet_addr)[4]));
552 out_be16(&p_82xx_addr_filt->taddr.m,
553 (u16) (((u16) (((u16) ((*p_enet_addr)[3])) << 8)) |
554 (u16) (*p_enet_addr)[2]));
555 out_be16(&p_82xx_addr_filt->taddr.l,
556 (u16) (((u16) (((u16) ((*p_enet_addr)[1])) << 8)) |
557 (u16) (*p_enet_addr)[0]));
558 544
559 qe_issue_cmd(QE_SET_GROUP_ADDRESS, cecr_subblock, 545 qe_issue_cmd(QE_SET_GROUP_ADDRESS, cecr_subblock,
560 (u8) QE_CR_PROTOCOL_ETHERNET, 0); 546 QE_CR_PROTOCOL_ETHERNET, 0);
561} 547}
562 548
563#ifdef CONFIG_UGETH_MAGIC_PACKET 549#ifdef CONFIG_UGETH_MAGIC_PACKET
564static void magic_packet_detection_enable(ucc_geth_private_t *ugeth) 550static void magic_packet_detection_enable(struct ucc_geth_private *ugeth)
565{ 551{
566 ucc_fast_private_t *uccf; 552 struct ucc_fast_private *uccf;
567 ucc_geth_t *ug_regs; 553 struct ucc_geth *ug_regs;
568 u32 maccfg2, uccm; 554 u32 maccfg2, uccm;
569 555
570 uccf = ugeth->uccf; 556 uccf = ugeth->uccf;
@@ -581,10 +567,10 @@ static void magic_packet_detection_enable(ucc_geth_private_t *ugeth)
581 out_be32(&ug_regs->maccfg2, maccfg2); 567 out_be32(&ug_regs->maccfg2, maccfg2);
582} 568}
583 569
584static void magic_packet_detection_disable(ucc_geth_private_t *ugeth) 570static void magic_packet_detection_disable(struct ucc_geth_private *ugeth)
585{ 571{
586 ucc_fast_private_t *uccf; 572 struct ucc_fast_private *uccf;
587 ucc_geth_t *ug_regs; 573 struct ucc_geth *ug_regs;
588 u32 maccfg2, uccm; 574 u32 maccfg2, uccm;
589 575
590 uccf = ugeth->uccf; 576 uccf = ugeth->uccf;
@@ -602,26 +588,26 @@ static void magic_packet_detection_disable(ucc_geth_private_t *ugeth)
602} 588}
603#endif /* MAGIC_PACKET */ 589#endif /* MAGIC_PACKET */
604 590
605static inline int compare_addr(enet_addr_t *addr1, enet_addr_t *addr2) 591static inline int compare_addr(u8 **addr1, u8 **addr2)
606{ 592{
607 return memcmp(addr1, addr2, ENET_NUM_OCTETS_PER_ADDRESS); 593 return memcmp(addr1, addr2, ENET_NUM_OCTETS_PER_ADDRESS);
608} 594}
609 595
610#ifdef DEBUG 596#ifdef DEBUG
611static void get_statistics(ucc_geth_private_t *ugeth, 597static void get_statistics(struct ucc_geth_private *ugeth,
612 ucc_geth_tx_firmware_statistics_t * 598 struct ucc_geth_tx_firmware_statistics *
613 tx_firmware_statistics, 599 tx_firmware_statistics,
614 ucc_geth_rx_firmware_statistics_t * 600 struct ucc_geth_rx_firmware_statistics *
615 rx_firmware_statistics, 601 rx_firmware_statistics,
616 ucc_geth_hardware_statistics_t *hardware_statistics) 602 struct ucc_geth_hardware_statistics *hardware_statistics)
617{ 603{
618 ucc_fast_t *uf_regs; 604 struct ucc_fast *uf_regs;
619 ucc_geth_t *ug_regs; 605 struct ucc_geth *ug_regs;
620 ucc_geth_tx_firmware_statistics_pram_t *p_tx_fw_statistics_pram; 606 struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram;
621 ucc_geth_rx_firmware_statistics_pram_t *p_rx_fw_statistics_pram; 607 struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram;
622 608
623 ug_regs = ugeth->ug_regs; 609 ug_regs = ugeth->ug_regs;
624 uf_regs = (ucc_fast_t *) ug_regs; 610 uf_regs = (struct ucc_fast *) ug_regs;
625 p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; 611 p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram;
626 p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; 612 p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram;
627 613
@@ -727,7 +713,7 @@ static void get_statistics(ucc_geth_private_t *ugeth,
727 } 713 }
728} 714}
729 715
730static void dump_bds(ucc_geth_private_t *ugeth) 716static void dump_bds(struct ucc_geth_private *ugeth)
731{ 717{
732 int i; 718 int i;
733 int length; 719 int length;
@@ -736,7 +722,7 @@ static void dump_bds(ucc_geth_private_t *ugeth)
736 if (ugeth->p_tx_bd_ring[i]) { 722 if (ugeth->p_tx_bd_ring[i]) {
737 length = 723 length =
738 (ugeth->ug_info->bdRingLenTx[i] * 724 (ugeth->ug_info->bdRingLenTx[i] *
739 UCC_GETH_SIZE_OF_BD); 725 sizeof(struct qe_bd));
740 ugeth_info("TX BDs[%d]", i); 726 ugeth_info("TX BDs[%d]", i);
741 mem_disp(ugeth->p_tx_bd_ring[i], length); 727 mem_disp(ugeth->p_tx_bd_ring[i], length);
742 } 728 }
@@ -745,14 +731,14 @@ static void dump_bds(ucc_geth_private_t *ugeth)
745 if (ugeth->p_rx_bd_ring[i]) { 731 if (ugeth->p_rx_bd_ring[i]) {
746 length = 732 length =
747 (ugeth->ug_info->bdRingLenRx[i] * 733 (ugeth->ug_info->bdRingLenRx[i] *
748 UCC_GETH_SIZE_OF_BD); 734 sizeof(struct qe_bd));
749 ugeth_info("RX BDs[%d]", i); 735 ugeth_info("RX BDs[%d]", i);
750 mem_disp(ugeth->p_rx_bd_ring[i], length); 736 mem_disp(ugeth->p_rx_bd_ring[i], length);
751 } 737 }
752 } 738 }
753} 739}
754 740
755static void dump_regs(ucc_geth_private_t *ugeth) 741static void dump_regs(struct ucc_geth_private *ugeth)
756{ 742{
757 int i; 743 int i;
758 744
@@ -893,7 +879,7 @@ static void dump_regs(ucc_geth_private_t *ugeth)
893 ugeth_info("Base address: 0x%08x", 879 ugeth_info("Base address: 0x%08x",
894 (u32) & ugeth->p_thread_data_tx[i]); 880 (u32) & ugeth->p_thread_data_tx[i]);
895 mem_disp((u8 *) & ugeth->p_thread_data_tx[i], 881 mem_disp((u8 *) & ugeth->p_thread_data_tx[i],
896 sizeof(ucc_geth_thread_data_tx_t)); 882 sizeof(struct ucc_geth_thread_data_tx));
897 } 883 }
898 } 884 }
899 if (ugeth->p_thread_data_rx) { 885 if (ugeth->p_thread_data_rx) {
@@ -927,7 +913,7 @@ static void dump_regs(ucc_geth_private_t *ugeth)
927 ugeth_info("Base address: 0x%08x", 913 ugeth_info("Base address: 0x%08x",
928 (u32) & ugeth->p_thread_data_rx[i]); 914 (u32) & ugeth->p_thread_data_rx[i]);
929 mem_disp((u8 *) & ugeth->p_thread_data_rx[i], 915 mem_disp((u8 *) & ugeth->p_thread_data_rx[i],
930 sizeof(ucc_geth_thread_data_rx_t)); 916 sizeof(struct ucc_geth_thread_data_rx));
931 } 917 }
932 } 918 }
933 if (ugeth->p_exf_glbl_param) { 919 if (ugeth->p_exf_glbl_param) {
@@ -1105,7 +1091,7 @@ static void dump_regs(ucc_geth_private_t *ugeth)
1105 ugeth_info("Base address: 0x%08x", 1091 ugeth_info("Base address: 0x%08x",
1106 (u32) & ugeth->p_send_q_mem_reg->sqqd[i]); 1092 (u32) & ugeth->p_send_q_mem_reg->sqqd[i]);
1107 mem_disp((u8 *) & ugeth->p_send_q_mem_reg->sqqd[i], 1093 mem_disp((u8 *) & ugeth->p_send_q_mem_reg->sqqd[i],
1108 sizeof(ucc_geth_send_queue_qd_t)); 1094 sizeof(struct ucc_geth_send_queue_qd));
1109 } 1095 }
1110 } 1096 }
1111 if (ugeth->p_scheduler) { 1097 if (ugeth->p_scheduler) {
@@ -1187,7 +1173,7 @@ static void dump_regs(ucc_geth_private_t *ugeth)
1187 qe_muram_addr(in_be32 1173 qe_muram_addr(in_be32
1188 (&ugeth->p_rx_bd_qs_tbl[i]. 1174 (&ugeth->p_rx_bd_qs_tbl[i].
1189 bdbaseptr)), 1175 bdbaseptr)),
1190 sizeof(ucc_geth_rx_prefetched_bds_t)); 1176 sizeof(struct ucc_geth_rx_prefetched_bds));
1191 } 1177 }
1192 } 1178 }
1193 if (ugeth->p_init_enet_param_shadow) { 1179 if (ugeth->p_init_enet_param_shadow) {
@@ -1198,7 +1184,7 @@ static void dump_regs(ucc_geth_private_t *ugeth)
1198 mem_disp((u8 *) ugeth->p_init_enet_param_shadow, 1184 mem_disp((u8 *) ugeth->p_init_enet_param_shadow,
1199 sizeof(*ugeth->p_init_enet_param_shadow)); 1185 sizeof(*ugeth->p_init_enet_param_shadow));
1200 1186
1201 size = sizeof(ucc_geth_thread_rx_pram_t); 1187 size = sizeof(struct ucc_geth_thread_rx_pram);
1202 if (ugeth->ug_info->rxExtendedFiltering) { 1188 if (ugeth->ug_info->rxExtendedFiltering) {
1203 size += 1189 size +=
1204 THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING; 1190 THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING;
@@ -1216,7 +1202,7 @@ static void dump_regs(ucc_geth_private_t *ugeth)
1216 &(ugeth->p_init_enet_param_shadow-> 1202 &(ugeth->p_init_enet_param_shadow->
1217 txthread[0]), 1203 txthread[0]),
1218 ENET_INIT_PARAM_MAX_ENTRIES_TX, 1204 ENET_INIT_PARAM_MAX_ENTRIES_TX,
1219 sizeof(ucc_geth_thread_tx_pram_t), 1205 sizeof(struct ucc_geth_thread_tx_pram),
1220 ugeth->ug_info->riscTx, 0); 1206 ugeth->ug_info->riscTx, 0);
1221 dump_init_enet_entries(ugeth, 1207 dump_init_enet_entries(ugeth,
1222 &(ugeth->p_init_enet_param_shadow-> 1208 &(ugeth->p_init_enet_param_shadow->
@@ -1578,12 +1564,12 @@ static int init_min_frame_len(u16 min_frame_length,
1578 return 0; 1564 return 0;
1579} 1565}
1580 1566
1581static int adjust_enet_interface(ucc_geth_private_t *ugeth) 1567static int adjust_enet_interface(struct ucc_geth_private *ugeth)
1582{ 1568{
1583 ucc_geth_info_t *ug_info; 1569 struct ucc_geth_info *ug_info;
1584 ucc_geth_t *ug_regs; 1570 struct ucc_geth *ug_regs;
1585 ucc_fast_t *uf_regs; 1571 struct ucc_fast *uf_regs;
1586 enet_speed_e speed; 1572 enum enet_speed speed;
1587 int ret_val, rpm = 0, tbi = 0, r10m = 0, rmm = 1573 int ret_val, rpm = 0, tbi = 0, r10m = 0, rmm =
1588 0, limited_to_full_duplex = 0; 1574 0, limited_to_full_duplex = 0;
1589 u32 upsmr, maccfg2, utbipar, tbiBaseAddress; 1575 u32 upsmr, maccfg2, utbipar, tbiBaseAddress;
@@ -1691,8 +1677,8 @@ static int adjust_enet_interface(ucc_geth_private_t *ugeth)
1691 */ 1677 */
1692static void adjust_link(struct net_device *dev) 1678static void adjust_link(struct net_device *dev)
1693{ 1679{
1694 ucc_geth_private_t *ugeth = netdev_priv(dev); 1680 struct ucc_geth_private *ugeth = netdev_priv(dev);
1695 ucc_geth_t *ug_regs; 1681 struct ucc_geth *ug_regs;
1696 u32 tempval; 1682 u32 tempval;
1697 struct ugeth_mii_info *mii_info = ugeth->mii_info; 1683 struct ugeth_mii_info *mii_info = ugeth->mii_info;
1698 1684
@@ -1722,7 +1708,7 @@ static void adjust_link(struct net_device *dev)
1722 if (mii_info->speed != ugeth->oldspeed) { 1708 if (mii_info->speed != ugeth->oldspeed) {
1723 switch (mii_info->speed) { 1709 switch (mii_info->speed) {
1724 case 1000: 1710 case 1000:
1725#ifdef CONFIG_MPC836x 1711#ifdef CONFIG_PPC_MPC836x
1726/* FIXME: This code is for 100Mbs BUG fixing, 1712/* FIXME: This code is for 100Mbs BUG fixing,
1727remove this when it is fixed!!! */ 1713remove this when it is fixed!!! */
1728 if (ugeth->ug_info->enet_interface == 1714 if (ugeth->ug_info->enet_interface ==
@@ -1768,7 +1754,7 @@ remove this when it is fixed!!! */
1768 break; 1754 break;
1769 case 100: 1755 case 100:
1770 case 10: 1756 case 10:
1771#ifdef CONFIG_MPC836x 1757#ifdef CONFIG_PPC_MPC836x
1772/* FIXME: This code is for 100Mbs BUG fixing, 1758/* FIXME: This code is for 100Mbs BUG fixing,
1773remove this lines when it will be fixed!!! */ 1759remove this lines when it will be fixed!!! */
1774 ugeth->ug_info->enet_interface = ENET_100_RGMII; 1760 ugeth->ug_info->enet_interface = ENET_100_RGMII;
@@ -1827,9 +1813,9 @@ remove this lines when it will be fixed!!! */
1827 */ 1813 */
1828static int init_phy(struct net_device *dev) 1814static int init_phy(struct net_device *dev)
1829{ 1815{
1830 ucc_geth_private_t *ugeth = netdev_priv(dev); 1816 struct ucc_geth_private *ugeth = netdev_priv(dev);
1831 struct phy_info *curphy; 1817 struct phy_info *curphy;
1832 ucc_mii_mng_t *mii_regs; 1818 struct ucc_mii_mng *mii_regs;
1833 struct ugeth_mii_info *mii_info; 1819 struct ugeth_mii_info *mii_info;
1834 int err; 1820 int err;
1835 1821
@@ -1914,17 +1900,17 @@ static int init_phy(struct net_device *dev)
1914} 1900}
1915 1901
1916#ifdef CONFIG_UGETH_TX_ON_DEMOND 1902#ifdef CONFIG_UGETH_TX_ON_DEMOND
1917static int ugeth_transmit_on_demand(ucc_geth_private_t *ugeth) 1903static int ugeth_transmit_on_demand(struct ucc_geth_private *ugeth)
1918{ 1904{
1919 ucc_fast_transmit_on_demand(ugeth->uccf); 1905 struct ucc_fastransmit_on_demand(ugeth->uccf);
1920 1906
1921 return 0; 1907 return 0;
1922} 1908}
1923#endif 1909#endif
1924 1910
1925static int ugeth_graceful_stop_tx(ucc_geth_private_t *ugeth) 1911static int ugeth_graceful_stop_tx(struct ucc_geth_private *ugeth)
1926{ 1912{
1927 ucc_fast_private_t *uccf; 1913 struct ucc_fast_private *uccf;
1928 u32 cecr_subblock; 1914 u32 cecr_subblock;
1929 u32 temp; 1915 u32 temp;
1930 1916
@@ -1940,7 +1926,7 @@ static int ugeth_graceful_stop_tx(ucc_geth_private_t *ugeth)
1940 cecr_subblock = 1926 cecr_subblock =
1941 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); 1927 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
1942 qe_issue_cmd(QE_GRACEFUL_STOP_TX, cecr_subblock, 1928 qe_issue_cmd(QE_GRACEFUL_STOP_TX, cecr_subblock,
1943 (u8) QE_CR_PROTOCOL_ETHERNET, 0); 1929 QE_CR_PROTOCOL_ETHERNET, 0);
1944 1930
1945 /* Wait for command to complete */ 1931 /* Wait for command to complete */
1946 do { 1932 do {
@@ -1952,9 +1938,9 @@ static int ugeth_graceful_stop_tx(ucc_geth_private_t *ugeth)
1952 return 0; 1938 return 0;
1953} 1939}
1954 1940
1955static int ugeth_graceful_stop_rx(ucc_geth_private_t * ugeth) 1941static int ugeth_graceful_stop_rx(struct ucc_geth_private * ugeth)
1956{ 1942{
1957 ucc_fast_private_t *uccf; 1943 struct ucc_fast_private *uccf;
1958 u32 cecr_subblock; 1944 u32 cecr_subblock;
1959 u8 temp; 1945 u8 temp;
1960 1946
@@ -1973,7 +1959,7 @@ static int ugeth_graceful_stop_rx(ucc_geth_private_t * ugeth)
1973 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info. 1959 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.
1974 ucc_num); 1960 ucc_num);
1975 qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock, 1961 qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock,
1976 (u8) QE_CR_PROTOCOL_ETHERNET, 0); 1962 QE_CR_PROTOCOL_ETHERNET, 0);
1977 1963
1978 temp = ugeth->p_rx_glbl_pram->rxgstpack; 1964 temp = ugeth->p_rx_glbl_pram->rxgstpack;
1979 } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX)); 1965 } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX));
@@ -1983,41 +1969,40 @@ static int ugeth_graceful_stop_rx(ucc_geth_private_t * ugeth)
1983 return 0; 1969 return 0;
1984} 1970}
1985 1971
1986static int ugeth_restart_tx(ucc_geth_private_t *ugeth) 1972static int ugeth_restart_tx(struct ucc_geth_private *ugeth)
1987{ 1973{
1988 ucc_fast_private_t *uccf; 1974 struct ucc_fast_private *uccf;
1989 u32 cecr_subblock; 1975 u32 cecr_subblock;
1990 1976
1991 uccf = ugeth->uccf; 1977 uccf = ugeth->uccf;
1992 1978
1993 cecr_subblock = 1979 cecr_subblock =
1994 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); 1980 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
1995 qe_issue_cmd(QE_RESTART_TX, cecr_subblock, (u8) QE_CR_PROTOCOL_ETHERNET, 1981 qe_issue_cmd(QE_RESTART_TX, cecr_subblock, QE_CR_PROTOCOL_ETHERNET, 0);
1996 0);
1997 uccf->stopped_tx = 0; 1982 uccf->stopped_tx = 0;
1998 1983
1999 return 0; 1984 return 0;
2000} 1985}
2001 1986
2002static int ugeth_restart_rx(ucc_geth_private_t *ugeth) 1987static int ugeth_restart_rx(struct ucc_geth_private *ugeth)
2003{ 1988{
2004 ucc_fast_private_t *uccf; 1989 struct ucc_fast_private *uccf;
2005 u32 cecr_subblock; 1990 u32 cecr_subblock;
2006 1991
2007 uccf = ugeth->uccf; 1992 uccf = ugeth->uccf;
2008 1993
2009 cecr_subblock = 1994 cecr_subblock =
2010 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); 1995 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
2011 qe_issue_cmd(QE_RESTART_RX, cecr_subblock, (u8) QE_CR_PROTOCOL_ETHERNET, 1996 qe_issue_cmd(QE_RESTART_RX, cecr_subblock, QE_CR_PROTOCOL_ETHERNET,
2012 0); 1997 0);
2013 uccf->stopped_rx = 0; 1998 uccf->stopped_rx = 0;
2014 1999
2015 return 0; 2000 return 0;
2016} 2001}
2017 2002
2018static int ugeth_enable(ucc_geth_private_t *ugeth, comm_dir_e mode) 2003static int ugeth_enable(struct ucc_geth_private *ugeth, enum comm_dir mode)
2019{ 2004{
2020 ucc_fast_private_t *uccf; 2005 struct ucc_fast_private *uccf;
2021 int enabled_tx, enabled_rx; 2006 int enabled_tx, enabled_rx;
2022 2007
2023 uccf = ugeth->uccf; 2008 uccf = ugeth->uccf;
@@ -2044,9 +2029,9 @@ static int ugeth_enable(ucc_geth_private_t *ugeth, comm_dir_e mode)
2044 2029
2045} 2030}
2046 2031
2047static int ugeth_disable(ucc_geth_private_t * ugeth, comm_dir_e mode) 2032static int ugeth_disable(struct ucc_geth_private * ugeth, enum comm_dir mode)
2048{ 2033{
2049 ucc_fast_private_t *uccf; 2034 struct ucc_fast_private *uccf;
2050 2035
2051 uccf = ugeth->uccf; 2036 uccf = ugeth->uccf;
2052 2037
@@ -2069,7 +2054,7 @@ static int ugeth_disable(ucc_geth_private_t * ugeth, comm_dir_e mode)
2069 return 0; 2054 return 0;
2070} 2055}
2071 2056
2072static void ugeth_dump_regs(ucc_geth_private_t *ugeth) 2057static void ugeth_dump_regs(struct ucc_geth_private *ugeth)
2073{ 2058{
2074#ifdef DEBUG 2059#ifdef DEBUG
2075 ucc_fast_dump_regs(ugeth->uccf); 2060 ucc_fast_dump_regs(ugeth->uccf);
@@ -2079,9 +2064,9 @@ static void ugeth_dump_regs(ucc_geth_private_t *ugeth)
2079} 2064}
2080 2065
2081#ifdef CONFIG_UGETH_FILTERING 2066#ifdef CONFIG_UGETH_FILTERING
2082static int ugeth_ext_filtering_serialize_tad(ucc_geth_tad_params_t * 2067static int ugeth_ext_filtering_serialize_tad(struct ucc_geth_tad_params *
2083 p_UccGethTadParams, 2068 p_UccGethTadParams,
2084 qe_fltr_tad_t *qe_fltr_tad) 2069 struct qe_fltr_tad *qe_fltr_tad)
2085{ 2070{
2086 u16 temp; 2071 u16 temp;
2087 2072
@@ -2119,11 +2104,11 @@ static int ugeth_ext_filtering_serialize_tad(ucc_geth_tad_params_t *
2119 return 0; 2104 return 0;
2120} 2105}
2121 2106
2122static enet_addr_container_t 2107static struct enet_addr_container_t
2123 *ugeth_82xx_filtering_get_match_addr_in_hash(ucc_geth_private_t *ugeth, 2108 *ugeth_82xx_filtering_get_match_addr_in_hash(struct ucc_geth_private *ugeth,
2124 enet_addr_t *p_enet_addr) 2109 struct enet_addr *p_enet_addr)
2125{ 2110{
2126 enet_addr_container_t *enet_addr_cont; 2111 struct enet_addr_container *enet_addr_cont;
2127 struct list_head *p_lh; 2112 struct list_head *p_lh;
2128 u16 i, num; 2113 u16 i, num;
2129 int32_t j; 2114 int32_t j;
@@ -2144,7 +2129,7 @@ static enet_addr_container_t
2144 2129
2145 for (i = 0; i < num; i++) { 2130 for (i = 0; i < num; i++) {
2146 enet_addr_cont = 2131 enet_addr_cont =
2147 (enet_addr_container_t *) 2132 (struct enet_addr_container *)
2148 ENET_ADDR_CONT_ENTRY(dequeue(p_lh)); 2133 ENET_ADDR_CONT_ENTRY(dequeue(p_lh));
2149 for (j = ENET_NUM_OCTETS_PER_ADDRESS - 1; j >= 0; j--) { 2134 for (j = ENET_NUM_OCTETS_PER_ADDRESS - 1; j >= 0; j--) {
2150 if ((*p_enet_addr)[j] != (enet_addr_cont->address)[j]) 2135 if ((*p_enet_addr)[j] != (enet_addr_cont->address)[j])
@@ -2157,11 +2142,11 @@ static enet_addr_container_t
2157 return NULL; 2142 return NULL;
2158} 2143}
2159 2144
2160static int ugeth_82xx_filtering_add_addr_in_hash(ucc_geth_private_t *ugeth, 2145static int ugeth_82xx_filtering_add_addr_in_hash(struct ucc_geth_private *ugeth,
2161 enet_addr_t *p_enet_addr) 2146 struct enet_addr *p_enet_addr)
2162{ 2147{
2163 ucc_geth_enet_address_recognition_location_e location; 2148 enum ucc_geth_enet_address_recognition_location location;
2164 enet_addr_container_t *enet_addr_cont; 2149 struct enet_addr_container *enet_addr_cont;
2165 struct list_head *p_lh; 2150 struct list_head *p_lh;
2166 u8 i; 2151 u8 i;
2167 u32 limit; 2152 u32 limit;
@@ -2196,18 +2181,17 @@ static int ugeth_82xx_filtering_add_addr_in_hash(ucc_geth_private_t *ugeth,
2196 enqueue(p_lh, &enet_addr_cont->node); /* Put it back */ 2181 enqueue(p_lh, &enet_addr_cont->node); /* Put it back */
2197 ++(*p_counter); 2182 ++(*p_counter);
2198 2183
2199 hw_add_addr_in_hash(ugeth, &(enet_addr_cont->address)); 2184 hw_add_addr_in_hash(ugeth, enet_addr_cont->address);
2200
2201 return 0; 2185 return 0;
2202} 2186}
2203 2187
2204static int ugeth_82xx_filtering_clear_addr_in_hash(ucc_geth_private_t *ugeth, 2188static int ugeth_82xx_filtering_clear_addr_in_hash(struct ucc_geth_private *ugeth,
2205 enet_addr_t *p_enet_addr) 2189 struct enet_addr *p_enet_addr)
2206{ 2190{
2207 ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; 2191 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt;
2208 enet_addr_container_t *enet_addr_cont; 2192 struct enet_addr_container *enet_addr_cont;
2209 ucc_fast_private_t *uccf; 2193 struct ucc_fast_private *uccf;
2210 comm_dir_e comm_dir; 2194 enum comm_dir comm_dir;
2211 u16 i, num; 2195 u16 i, num;
2212 struct list_head *p_lh; 2196 struct list_head *p_lh;
2213 u32 *addr_h, *addr_l; 2197 u32 *addr_h, *addr_l;
@@ -2216,7 +2200,7 @@ static int ugeth_82xx_filtering_clear_addr_in_hash(ucc_geth_private_t *ugeth,
2216 uccf = ugeth->uccf; 2200 uccf = ugeth->uccf;
2217 2201
2218 p_82xx_addr_filt = 2202 p_82xx_addr_filt =
2219 (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> 2203 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram->
2220 addressfiltering; 2204 addressfiltering;
2221 2205
2222 if (! 2206 if (!
@@ -2256,9 +2240,9 @@ static int ugeth_82xx_filtering_clear_addr_in_hash(ucc_geth_private_t *ugeth,
2256 num = --(*p_counter); 2240 num = --(*p_counter);
2257 for (i = 0; i < num; i++) { 2241 for (i = 0; i < num; i++) {
2258 enet_addr_cont = 2242 enet_addr_cont =
2259 (enet_addr_container_t *) 2243 (struct enet_addr_container *)
2260 ENET_ADDR_CONT_ENTRY(dequeue(p_lh)); 2244 ENET_ADDR_CONT_ENTRY(dequeue(p_lh));
2261 hw_add_addr_in_hash(ugeth, &(enet_addr_cont->address)); 2245 hw_add_addr_in_hash(ugeth, enet_addr_cont->address);
2262 enqueue(p_lh, &enet_addr_cont->node); /* Put it back */ 2246 enqueue(p_lh, &enet_addr_cont->node); /* Put it back */
2263 } 2247 }
2264 2248
@@ -2269,14 +2253,14 @@ static int ugeth_82xx_filtering_clear_addr_in_hash(ucc_geth_private_t *ugeth,
2269} 2253}
2270#endif /* CONFIG_UGETH_FILTERING */ 2254#endif /* CONFIG_UGETH_FILTERING */
2271 2255
2272static int ugeth_82xx_filtering_clear_all_addr_in_hash(ucc_geth_private_t * 2256static int ugeth_82xx_filtering_clear_all_addr_in_hash(struct ucc_geth_private *
2273 ugeth, 2257 ugeth,
2274 enet_addr_type_e 2258 enum enet_addr_type
2275 enet_addr_type) 2259 enet_addr_type)
2276{ 2260{
2277 ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; 2261 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt;
2278 ucc_fast_private_t *uccf; 2262 struct ucc_fast_private *uccf;
2279 comm_dir_e comm_dir; 2263 enum comm_dir comm_dir;
2280 struct list_head *p_lh; 2264 struct list_head *p_lh;
2281 u16 i, num; 2265 u16 i, num;
2282 u32 *addr_h, *addr_l; 2266 u32 *addr_h, *addr_l;
@@ -2285,7 +2269,7 @@ static int ugeth_82xx_filtering_clear_all_addr_in_hash(ucc_geth_private_t *
2285 uccf = ugeth->uccf; 2269 uccf = ugeth->uccf;
2286 2270
2287 p_82xx_addr_filt = 2271 p_82xx_addr_filt =
2288 (ucc_geth_82xx_address_filtering_pram_t *) ugeth->p_rx_glbl_pram-> 2272 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram->
2289 addressfiltering; 2273 addressfiltering;
2290 2274
2291 if (enet_addr_type == ENET_ADDR_TYPE_GROUP) { 2275 if (enet_addr_type == ENET_ADDR_TYPE_GROUP) {
@@ -2331,8 +2315,8 @@ static int ugeth_82xx_filtering_clear_all_addr_in_hash(ucc_geth_private_t *
2331} 2315}
2332 2316
2333#ifdef CONFIG_UGETH_FILTERING 2317#ifdef CONFIG_UGETH_FILTERING
2334static int ugeth_82xx_filtering_add_addr_in_paddr(ucc_geth_private_t *ugeth, 2318static int ugeth_82xx_filtering_add_addr_in_paddr(struct ucc_geth_private *ugeth,
2335 enet_addr_t *p_enet_addr, 2319 struct enet_addr *p_enet_addr,
2336 u8 paddr_num) 2320 u8 paddr_num)
2337{ 2321{
2338 int i; 2322 int i;
@@ -2352,14 +2336,14 @@ static int ugeth_82xx_filtering_add_addr_in_paddr(ucc_geth_private_t *ugeth,
2352} 2336}
2353#endif /* CONFIG_UGETH_FILTERING */ 2337#endif /* CONFIG_UGETH_FILTERING */
2354 2338
2355static int ugeth_82xx_filtering_clear_addr_in_paddr(ucc_geth_private_t *ugeth, 2339static int ugeth_82xx_filtering_clear_addr_in_paddr(struct ucc_geth_private *ugeth,
2356 u8 paddr_num) 2340 u8 paddr_num)
2357{ 2341{
2358 ugeth->indAddrRegUsed[paddr_num] = 0; /* mark this paddr as not used */ 2342 ugeth->indAddrRegUsed[paddr_num] = 0; /* mark this paddr as not used */
2359 return hw_clear_addr_in_paddr(ugeth, paddr_num);/* clear in hardware */ 2343 return hw_clear_addr_in_paddr(ugeth, paddr_num);/* clear in hardware */
2360} 2344}
2361 2345
2362static void ucc_geth_memclean(ucc_geth_private_t *ugeth) 2346static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
2363{ 2347{
2364 u16 i, j; 2348 u16 i, j;
2365 u8 *bd; 2349 u8 *bd;
@@ -2433,8 +2417,8 @@ static void ucc_geth_memclean(ucc_geth_private_t *ugeth)
2433 for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { 2417 for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) {
2434 if (ugeth->tx_skbuff[i][j]) { 2418 if (ugeth->tx_skbuff[i][j]) {
2435 dma_unmap_single(NULL, 2419 dma_unmap_single(NULL,
2436 BD_BUFFER_ARG(bd), 2420 ((qe_bd_t *)bd)->buf,
2437 (BD_STATUS_AND_LENGTH(bd) & 2421 (in_be32((u32 *)bd) &
2438 BD_LENGTH_MASK), 2422 BD_LENGTH_MASK),
2439 DMA_TO_DEVICE); 2423 DMA_TO_DEVICE);
2440 dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); 2424 dev_kfree_skb_any(ugeth->tx_skbuff[i][j]);
@@ -2460,18 +2444,17 @@ static void ucc_geth_memclean(ucc_geth_private_t *ugeth)
2460 bd = ugeth->p_rx_bd_ring[i]; 2444 bd = ugeth->p_rx_bd_ring[i];
2461 for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { 2445 for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) {
2462 if (ugeth->rx_skbuff[i][j]) { 2446 if (ugeth->rx_skbuff[i][j]) {
2463 dma_unmap_single(NULL, BD_BUFFER(bd), 2447 dma_unmap_single(NULL,
2464 ugeth->ug_info-> 2448 ((struct qe_bd *)bd)->buf,
2465 uf_info. 2449 ugeth->ug_info->
2466 max_rx_buf_length + 2450 uf_info.max_rx_buf_length +
2467 UCC_GETH_RX_DATA_BUF_ALIGNMENT, 2451 UCC_GETH_RX_DATA_BUF_ALIGNMENT,
2468 DMA_FROM_DEVICE); 2452 DMA_FROM_DEVICE);
2469 2453 dev_kfree_skb_any(
2470 dev_kfree_skb_any(ugeth-> 2454 ugeth->rx_skbuff[i][j]);
2471 rx_skbuff[i][j]);
2472 ugeth->rx_skbuff[i][j] = NULL; 2455 ugeth->rx_skbuff[i][j] = NULL;
2473 } 2456 }
2474 bd += UCC_GETH_SIZE_OF_BD; 2457 bd += sizeof(struct qe_bd);
2475 } 2458 }
2476 2459
2477 kfree(ugeth->rx_skbuff[i]); 2460 kfree(ugeth->rx_skbuff[i]);
@@ -2496,11 +2479,11 @@ static void ucc_geth_memclean(ucc_geth_private_t *ugeth)
2496 2479
2497static void ucc_geth_set_multi(struct net_device *dev) 2480static void ucc_geth_set_multi(struct net_device *dev)
2498{ 2481{
2499 ucc_geth_private_t *ugeth; 2482 struct ucc_geth_private *ugeth;
2500 struct dev_mc_list *dmi; 2483 struct dev_mc_list *dmi;
2501 ucc_fast_t *uf_regs; 2484 struct ucc_fast *uf_regs;
2502 ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; 2485 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt;
2503 enet_addr_t tempaddr; 2486 u8 tempaddr[6];
2504 u8 *mcptr, *tdptr; 2487 u8 *mcptr, *tdptr;
2505 int i, j; 2488 int i, j;
2506 2489
@@ -2517,7 +2500,7 @@ static void ucc_geth_set_multi(struct net_device *dev)
2517 uf_regs->upsmr &= ~UPSMR_PRO; 2500 uf_regs->upsmr &= ~UPSMR_PRO;
2518 2501
2519 p_82xx_addr_filt = 2502 p_82xx_addr_filt =
2520 (ucc_geth_82xx_address_filtering_pram_t *) ugeth-> 2503 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->
2521 p_rx_glbl_pram->addressfiltering; 2504 p_rx_glbl_pram->addressfiltering;
2522 2505
2523 if (dev->flags & IFF_ALLMULTI) { 2506 if (dev->flags & IFF_ALLMULTI) {
@@ -2546,23 +2529,22 @@ static void ucc_geth_set_multi(struct net_device *dev)
2546 * copy bytes MSB first from dmi_addr. 2529 * copy bytes MSB first from dmi_addr.
2547 */ 2530 */
2548 mcptr = (u8 *) dmi->dmi_addr + 5; 2531 mcptr = (u8 *) dmi->dmi_addr + 5;
2549 tdptr = (u8 *) & tempaddr; 2532 tdptr = (u8 *) tempaddr;
2550 for (j = 0; j < 6; j++) 2533 for (j = 0; j < 6; j++)
2551 *tdptr++ = *mcptr--; 2534 *tdptr++ = *mcptr--;
2552 2535
2553 /* Ask CPM to run CRC and set bit in 2536 /* Ask CPM to run CRC and set bit in
2554 * filter mask. 2537 * filter mask.
2555 */ 2538 */
2556 hw_add_addr_in_hash(ugeth, &tempaddr); 2539 hw_add_addr_in_hash(ugeth, tempaddr);
2557
2558 } 2540 }
2559 } 2541 }
2560 } 2542 }
2561} 2543}
2562 2544
2563static void ucc_geth_stop(ucc_geth_private_t *ugeth) 2545static void ucc_geth_stop(struct ucc_geth_private *ugeth)
2564{ 2546{
2565 ucc_geth_t *ug_regs = ugeth->ug_regs; 2547 struct ucc_geth *ug_regs = ugeth->ug_regs;
2566 u32 tempval; 2548 u32 tempval;
2567 2549
2568 ugeth_vdbg("%s: IN", __FUNCTION__); 2550 ugeth_vdbg("%s: IN", __FUNCTION__);
@@ -2605,15 +2587,15 @@ static void ucc_geth_stop(ucc_geth_private_t *ugeth)
2605 ucc_geth_memclean(ugeth); 2587 ucc_geth_memclean(ugeth);
2606} 2588}
2607 2589
2608static int ucc_geth_startup(ucc_geth_private_t *ugeth) 2590static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2609{ 2591{
2610 ucc_geth_82xx_address_filtering_pram_t *p_82xx_addr_filt; 2592 struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt;
2611 ucc_geth_init_pram_t *p_init_enet_pram; 2593 struct ucc_geth_init_pram *p_init_enet_pram;
2612 ucc_fast_private_t *uccf; 2594 struct ucc_fast_private *uccf;
2613 ucc_geth_info_t *ug_info; 2595 struct ucc_geth_info *ug_info;
2614 ucc_fast_info_t *uf_info; 2596 struct ucc_fast_info *uf_info;
2615 ucc_fast_t *uf_regs; 2597 struct ucc_fast *uf_regs;
2616 ucc_geth_t *ug_regs; 2598 struct ucc_geth *ug_regs;
2617 int ret_val = -EINVAL; 2599 int ret_val = -EINVAL;
2618 u32 remoder = UCC_GETH_REMODER_INIT; 2600 u32 remoder = UCC_GETH_REMODER_INIT;
2619 u32 init_enet_pram_offset, cecr_subblock, command, maccfg1; 2601 u32 init_enet_pram_offset, cecr_subblock, command, maccfg1;
@@ -2788,7 +2770,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
2788 UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP); 2770 UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP);
2789 2771
2790 uf_regs = uccf->uf_regs; 2772 uf_regs = uccf->uf_regs;
2791 ug_regs = (ucc_geth_t *) (uccf->uf_regs); 2773 ug_regs = (struct ucc_geth *) (uccf->uf_regs);
2792 ugeth->ug_regs = ug_regs; 2774 ugeth->ug_regs = ug_regs;
2793 2775
2794 init_default_reg_vals(&uf_regs->upsmr, 2776 init_default_reg_vals(&uf_regs->upsmr,
@@ -2869,10 +2851,10 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
2869 /* Allocate in multiple of 2851 /* Allocate in multiple of
2870 UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT, 2852 UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT,
2871 according to spec */ 2853 according to spec */
2872 length = ((ug_info->bdRingLenTx[j] * UCC_GETH_SIZE_OF_BD) 2854 length = ((ug_info->bdRingLenTx[j] * sizeof(struct qe_bd))
2873 / UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) 2855 / UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT)
2874 * UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT; 2856 * UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT;
2875 if ((ug_info->bdRingLenTx[j] * UCC_GETH_SIZE_OF_BD) % 2857 if ((ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)) %
2876 UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) 2858 UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT)
2877 length += UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT; 2859 length += UCC_GETH_TX_BD_RING_SIZE_MEMORY_ALIGNMENT;
2878 if (uf_info->bd_mem_part == MEM_PART_SYSTEM) { 2860 if (uf_info->bd_mem_part == MEM_PART_SYSTEM) {
@@ -2904,13 +2886,13 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
2904 } 2886 }
2905 /* Zero unused end of bd ring, according to spec */ 2887 /* Zero unused end of bd ring, according to spec */
2906 memset(ugeth->p_tx_bd_ring[j] + 2888 memset(ugeth->p_tx_bd_ring[j] +
2907 ug_info->bdRingLenTx[j] * UCC_GETH_SIZE_OF_BD, 0, 2889 ug_info->bdRingLenTx[j] * sizeof(struct qe_bd), 0,
2908 length - ug_info->bdRingLenTx[j] * UCC_GETH_SIZE_OF_BD); 2890 length - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd));
2909 } 2891 }
2910 2892
2911 /* Allocate Rx bds */ 2893 /* Allocate Rx bds */
2912 for (j = 0; j < ug_info->numQueuesRx; j++) { 2894 for (j = 0; j < ug_info->numQueuesRx; j++) {
2913 length = ug_info->bdRingLenRx[j] * UCC_GETH_SIZE_OF_BD; 2895 length = ug_info->bdRingLenRx[j] * sizeof(struct qe_bd);
2914 if (uf_info->bd_mem_part == MEM_PART_SYSTEM) { 2896 if (uf_info->bd_mem_part == MEM_PART_SYSTEM) {
2915 u32 align = 4; 2897 u32 align = 4;
2916 if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4) 2898 if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4)
@@ -2960,12 +2942,15 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
2960 ugeth->skb_curtx[j] = ugeth->skb_dirtytx[j] = 0; 2942 ugeth->skb_curtx[j] = ugeth->skb_dirtytx[j] = 0;
2961 bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; 2943 bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j];
2962 for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { 2944 for (i = 0; i < ug_info->bdRingLenTx[j]; i++) {
2963 BD_BUFFER_CLEAR(bd); 2945 /* clear bd buffer */
2964 BD_STATUS_AND_LENGTH_SET(bd, 0); 2946 out_be32(&((struct qe_bd *)bd)->buf, 0);
2965 bd += UCC_GETH_SIZE_OF_BD; 2947 /* set bd status and length */
2948 out_be32((u32 *)bd, 0);
2949 bd += sizeof(struct qe_bd);
2966 } 2950 }
2967 bd -= UCC_GETH_SIZE_OF_BD; 2951 bd -= sizeof(struct qe_bd);
2968 BD_STATUS_AND_LENGTH_SET(bd, T_W);/* for last BD set Wrap bit */ 2952 /* set bd status and length */
2953 out_be32((u32 *)bd, T_W); /* for last BD set Wrap bit */
2969 } 2954 }
2970 2955
2971 /* Init Rx bds */ 2956 /* Init Rx bds */
@@ -2989,12 +2974,15 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
2989 ugeth->skb_currx[j] = 0; 2974 ugeth->skb_currx[j] = 0;
2990 bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; 2975 bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j];
2991 for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { 2976 for (i = 0; i < ug_info->bdRingLenRx[j]; i++) {
2992 BD_STATUS_AND_LENGTH_SET(bd, R_I); 2977 /* set bd status and length */
2993 BD_BUFFER_CLEAR(bd); 2978 out_be32((u32 *)bd, R_I);
2994 bd += UCC_GETH_SIZE_OF_BD; 2979 /* clear bd buffer */
2980 out_be32(&((struct qe_bd *)bd)->buf, 0);
2981 bd += sizeof(struct qe_bd);
2995 } 2982 }
2996 bd -= UCC_GETH_SIZE_OF_BD; 2983 bd -= sizeof(struct qe_bd);
2997 BD_STATUS_AND_LENGTH_SET(bd, R_W);/* for last BD set Wrap bit */ 2984 /* set bd status and length */
2985 out_be32((u32 *)bd, R_W); /* for last BD set Wrap bit */
2998 } 2986 }
2999 2987
3000 /* 2988 /*
@@ -3003,7 +2991,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3003 /* Tx global PRAM */ 2991 /* Tx global PRAM */
3004 /* Allocate global tx parameter RAM page */ 2992 /* Allocate global tx parameter RAM page */
3005 ugeth->tx_glbl_pram_offset = 2993 ugeth->tx_glbl_pram_offset =
3006 qe_muram_alloc(sizeof(ucc_geth_tx_global_pram_t), 2994 qe_muram_alloc(sizeof(struct ucc_geth_tx_global_pram),
3007 UCC_GETH_TX_GLOBAL_PRAM_ALIGNMENT); 2995 UCC_GETH_TX_GLOBAL_PRAM_ALIGNMENT);
3008 if (IS_MURAM_ERR(ugeth->tx_glbl_pram_offset)) { 2996 if (IS_MURAM_ERR(ugeth->tx_glbl_pram_offset)) {
3009 ugeth_err 2997 ugeth_err
@@ -3013,10 +3001,10 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3013 return -ENOMEM; 3001 return -ENOMEM;
3014 } 3002 }
3015 ugeth->p_tx_glbl_pram = 3003 ugeth->p_tx_glbl_pram =
3016 (ucc_geth_tx_global_pram_t *) qe_muram_addr(ugeth-> 3004 (struct ucc_geth_tx_global_pram *) qe_muram_addr(ugeth->
3017 tx_glbl_pram_offset); 3005 tx_glbl_pram_offset);
3018 /* Zero out p_tx_glbl_pram */ 3006 /* Zero out p_tx_glbl_pram */
3019 memset(ugeth->p_tx_glbl_pram, 0, sizeof(ucc_geth_tx_global_pram_t)); 3007 memset(ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram));
3020 3008
3021 /* Fill global PRAM */ 3009 /* Fill global PRAM */
3022 3010
@@ -3024,7 +3012,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3024 /* Size varies with number of Tx threads */ 3012 /* Size varies with number of Tx threads */
3025 ugeth->thread_dat_tx_offset = 3013 ugeth->thread_dat_tx_offset =
3026 qe_muram_alloc(numThreadsTxNumerical * 3014 qe_muram_alloc(numThreadsTxNumerical *
3027 sizeof(ucc_geth_thread_data_tx_t) + 3015 sizeof(struct ucc_geth_thread_data_tx) +
3028 32 * (numThreadsTxNumerical == 1), 3016 32 * (numThreadsTxNumerical == 1),
3029 UCC_GETH_THREAD_DATA_ALIGNMENT); 3017 UCC_GETH_THREAD_DATA_ALIGNMENT);
3030 if (IS_MURAM_ERR(ugeth->thread_dat_tx_offset)) { 3018 if (IS_MURAM_ERR(ugeth->thread_dat_tx_offset)) {
@@ -3036,7 +3024,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3036 } 3024 }
3037 3025
3038 ugeth->p_thread_data_tx = 3026 ugeth->p_thread_data_tx =
3039 (ucc_geth_thread_data_tx_t *) qe_muram_addr(ugeth-> 3027 (struct ucc_geth_thread_data_tx *) qe_muram_addr(ugeth->
3040 thread_dat_tx_offset); 3028 thread_dat_tx_offset);
3041 out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); 3029 out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset);
3042 3030
@@ -3053,7 +3041,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3053 /* Size varies with number of Tx queues */ 3041 /* Size varies with number of Tx queues */
3054 ugeth->send_q_mem_reg_offset = 3042 ugeth->send_q_mem_reg_offset =
3055 qe_muram_alloc(ug_info->numQueuesTx * 3043 qe_muram_alloc(ug_info->numQueuesTx *
3056 sizeof(ucc_geth_send_queue_qd_t), 3044 sizeof(struct ucc_geth_send_queue_qd),
3057 UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT); 3045 UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT);
3058 if (IS_MURAM_ERR(ugeth->send_q_mem_reg_offset)) { 3046 if (IS_MURAM_ERR(ugeth->send_q_mem_reg_offset)) {
3059 ugeth_err 3047 ugeth_err
@@ -3064,7 +3052,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3064 } 3052 }
3065 3053
3066 ugeth->p_send_q_mem_reg = 3054 ugeth->p_send_q_mem_reg =
3067 (ucc_geth_send_queue_mem_region_t *) qe_muram_addr(ugeth-> 3055 (struct ucc_geth_send_queue_mem_region *) qe_muram_addr(ugeth->
3068 send_q_mem_reg_offset); 3056 send_q_mem_reg_offset);
3069 out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); 3057 out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset);
3070 3058
@@ -3073,7 +3061,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3073 for (i = 0; i < ug_info->numQueuesTx; i++) { 3061 for (i = 0; i < ug_info->numQueuesTx; i++) {
3074 endOfRing = 3062 endOfRing =
3075 ugeth->p_tx_bd_ring[i] + (ug_info->bdRingLenTx[i] - 3063 ugeth->p_tx_bd_ring[i] + (ug_info->bdRingLenTx[i] -
3076 1) * UCC_GETH_SIZE_OF_BD; 3064 1) * sizeof(struct qe_bd);
3077 if (ugeth->ug_info->uf_info.bd_mem_part == MEM_PART_SYSTEM) { 3065 if (ugeth->ug_info->uf_info.bd_mem_part == MEM_PART_SYSTEM) {
3078 out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base, 3066 out_be32(&ugeth->p_send_q_mem_reg->sqqd[i].bd_ring_base,
3079 (u32) virt_to_phys(ugeth->p_tx_bd_ring[i])); 3067 (u32) virt_to_phys(ugeth->p_tx_bd_ring[i]));
@@ -3096,7 +3084,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3096 if (ug_info->numQueuesTx > 1) { 3084 if (ug_info->numQueuesTx > 1) {
3097 /* scheduler exists only if more than 1 tx queue */ 3085 /* scheduler exists only if more than 1 tx queue */
3098 ugeth->scheduler_offset = 3086 ugeth->scheduler_offset =
3099 qe_muram_alloc(sizeof(ucc_geth_scheduler_t), 3087 qe_muram_alloc(sizeof(struct ucc_geth_scheduler),
3100 UCC_GETH_SCHEDULER_ALIGNMENT); 3088 UCC_GETH_SCHEDULER_ALIGNMENT);
3101 if (IS_MURAM_ERR(ugeth->scheduler_offset)) { 3089 if (IS_MURAM_ERR(ugeth->scheduler_offset)) {
3102 ugeth_err 3090 ugeth_err
@@ -3107,12 +3095,12 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3107 } 3095 }
3108 3096
3109 ugeth->p_scheduler = 3097 ugeth->p_scheduler =
3110 (ucc_geth_scheduler_t *) qe_muram_addr(ugeth-> 3098 (struct ucc_geth_scheduler *) qe_muram_addr(ugeth->
3111 scheduler_offset); 3099 scheduler_offset);
3112 out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, 3100 out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer,
3113 ugeth->scheduler_offset); 3101 ugeth->scheduler_offset);
3114 /* Zero out p_scheduler */ 3102 /* Zero out p_scheduler */
3115 memset(ugeth->p_scheduler, 0, sizeof(ucc_geth_scheduler_t)); 3103 memset(ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler));
3116 3104
3117 /* Set values in scheduler */ 3105 /* Set values in scheduler */
3118 out_be32(&ugeth->p_scheduler->mblinterval, 3106 out_be32(&ugeth->p_scheduler->mblinterval,
@@ -3144,7 +3132,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3144 statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX) { 3132 statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX) {
3145 ugeth->tx_fw_statistics_pram_offset = 3133 ugeth->tx_fw_statistics_pram_offset =
3146 qe_muram_alloc(sizeof 3134 qe_muram_alloc(sizeof
3147 (ucc_geth_tx_firmware_statistics_pram_t), 3135 (struct ucc_geth_tx_firmware_statistics_pram),
3148 UCC_GETH_TX_STATISTICS_ALIGNMENT); 3136 UCC_GETH_TX_STATISTICS_ALIGNMENT);
3149 if (IS_MURAM_ERR(ugeth->tx_fw_statistics_pram_offset)) { 3137 if (IS_MURAM_ERR(ugeth->tx_fw_statistics_pram_offset)) {
3150 ugeth_err 3138 ugeth_err
@@ -3154,11 +3142,11 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3154 return -ENOMEM; 3142 return -ENOMEM;
3155 } 3143 }
3156 ugeth->p_tx_fw_statistics_pram = 3144 ugeth->p_tx_fw_statistics_pram =
3157 (ucc_geth_tx_firmware_statistics_pram_t *) 3145 (struct ucc_geth_tx_firmware_statistics_pram *)
3158 qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); 3146 qe_muram_addr(ugeth->tx_fw_statistics_pram_offset);
3159 /* Zero out p_tx_fw_statistics_pram */ 3147 /* Zero out p_tx_fw_statistics_pram */
3160 memset(ugeth->p_tx_fw_statistics_pram, 3148 memset(ugeth->p_tx_fw_statistics_pram,
3161 0, sizeof(ucc_geth_tx_firmware_statistics_pram_t)); 3149 0, sizeof(struct ucc_geth_tx_firmware_statistics_pram));
3162 } 3150 }
3163 3151
3164 /* temoder */ 3152 /* temoder */
@@ -3183,7 +3171,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3183 /* Rx global PRAM */ 3171 /* Rx global PRAM */
3184 /* Allocate global rx parameter RAM page */ 3172 /* Allocate global rx parameter RAM page */
3185 ugeth->rx_glbl_pram_offset = 3173 ugeth->rx_glbl_pram_offset =
3186 qe_muram_alloc(sizeof(ucc_geth_rx_global_pram_t), 3174 qe_muram_alloc(sizeof(struct ucc_geth_rx_global_pram),
3187 UCC_GETH_RX_GLOBAL_PRAM_ALIGNMENT); 3175 UCC_GETH_RX_GLOBAL_PRAM_ALIGNMENT);
3188 if (IS_MURAM_ERR(ugeth->rx_glbl_pram_offset)) { 3176 if (IS_MURAM_ERR(ugeth->rx_glbl_pram_offset)) {
3189 ugeth_err 3177 ugeth_err
@@ -3193,10 +3181,10 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3193 return -ENOMEM; 3181 return -ENOMEM;
3194 } 3182 }
3195 ugeth->p_rx_glbl_pram = 3183 ugeth->p_rx_glbl_pram =
3196 (ucc_geth_rx_global_pram_t *) qe_muram_addr(ugeth-> 3184 (struct ucc_geth_rx_global_pram *) qe_muram_addr(ugeth->
3197 rx_glbl_pram_offset); 3185 rx_glbl_pram_offset);
3198 /* Zero out p_rx_glbl_pram */ 3186 /* Zero out p_rx_glbl_pram */
3199 memset(ugeth->p_rx_glbl_pram, 0, sizeof(ucc_geth_rx_global_pram_t)); 3187 memset(ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram));
3200 3188
3201 /* Fill global PRAM */ 3189 /* Fill global PRAM */
3202 3190
@@ -3204,7 +3192,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3204 /* Size varies with number of Rx threads */ 3192 /* Size varies with number of Rx threads */
3205 ugeth->thread_dat_rx_offset = 3193 ugeth->thread_dat_rx_offset =
3206 qe_muram_alloc(numThreadsRxNumerical * 3194 qe_muram_alloc(numThreadsRxNumerical *
3207 sizeof(ucc_geth_thread_data_rx_t), 3195 sizeof(struct ucc_geth_thread_data_rx),
3208 UCC_GETH_THREAD_DATA_ALIGNMENT); 3196 UCC_GETH_THREAD_DATA_ALIGNMENT);
3209 if (IS_MURAM_ERR(ugeth->thread_dat_rx_offset)) { 3197 if (IS_MURAM_ERR(ugeth->thread_dat_rx_offset)) {
3210 ugeth_err 3198 ugeth_err
@@ -3215,7 +3203,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3215 } 3203 }
3216 3204
3217 ugeth->p_thread_data_rx = 3205 ugeth->p_thread_data_rx =
3218 (ucc_geth_thread_data_rx_t *) qe_muram_addr(ugeth-> 3206 (struct ucc_geth_thread_data_rx *) qe_muram_addr(ugeth->
3219 thread_dat_rx_offset); 3207 thread_dat_rx_offset);
3220 out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); 3208 out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset);
3221 3209
@@ -3227,7 +3215,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3227 statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX) { 3215 statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX) {
3228 ugeth->rx_fw_statistics_pram_offset = 3216 ugeth->rx_fw_statistics_pram_offset =
3229 qe_muram_alloc(sizeof 3217 qe_muram_alloc(sizeof
3230 (ucc_geth_rx_firmware_statistics_pram_t), 3218 (struct ucc_geth_rx_firmware_statistics_pram),
3231 UCC_GETH_RX_STATISTICS_ALIGNMENT); 3219 UCC_GETH_RX_STATISTICS_ALIGNMENT);
3232 if (IS_MURAM_ERR(ugeth->rx_fw_statistics_pram_offset)) { 3220 if (IS_MURAM_ERR(ugeth->rx_fw_statistics_pram_offset)) {
3233 ugeth_err 3221 ugeth_err
@@ -3237,11 +3225,11 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3237 return -ENOMEM; 3225 return -ENOMEM;
3238 } 3226 }
3239 ugeth->p_rx_fw_statistics_pram = 3227 ugeth->p_rx_fw_statistics_pram =
3240 (ucc_geth_rx_firmware_statistics_pram_t *) 3228 (struct ucc_geth_rx_firmware_statistics_pram *)
3241 qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); 3229 qe_muram_addr(ugeth->rx_fw_statistics_pram_offset);
3242 /* Zero out p_rx_fw_statistics_pram */ 3230 /* Zero out p_rx_fw_statistics_pram */
3243 memset(ugeth->p_rx_fw_statistics_pram, 0, 3231 memset(ugeth->p_rx_fw_statistics_pram, 0,
3244 sizeof(ucc_geth_rx_firmware_statistics_pram_t)); 3232 sizeof(struct ucc_geth_rx_firmware_statistics_pram));
3245 } 3233 }
3246 3234
3247 /* intCoalescingPtr */ 3235 /* intCoalescingPtr */
@@ -3249,7 +3237,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3249 /* Size varies with number of Rx queues */ 3237 /* Size varies with number of Rx queues */
3250 ugeth->rx_irq_coalescing_tbl_offset = 3238 ugeth->rx_irq_coalescing_tbl_offset =
3251 qe_muram_alloc(ug_info->numQueuesRx * 3239 qe_muram_alloc(ug_info->numQueuesRx *
3252 sizeof(ucc_geth_rx_interrupt_coalescing_entry_t), 3240 sizeof(struct ucc_geth_rx_interrupt_coalescing_entry),
3253 UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT); 3241 UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);
3254 if (IS_MURAM_ERR(ugeth->rx_irq_coalescing_tbl_offset)) { 3242 if (IS_MURAM_ERR(ugeth->rx_irq_coalescing_tbl_offset)) {
3255 ugeth_err 3243 ugeth_err
@@ -3260,7 +3248,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3260 } 3248 }
3261 3249
3262 ugeth->p_rx_irq_coalescing_tbl = 3250 ugeth->p_rx_irq_coalescing_tbl =
3263 (ucc_geth_rx_interrupt_coalescing_table_t *) 3251 (struct ucc_geth_rx_interrupt_coalescing_table *)
3264 qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); 3252 qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset);
3265 out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, 3253 out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr,
3266 ugeth->rx_irq_coalescing_tbl_offset); 3254 ugeth->rx_irq_coalescing_tbl_offset);
@@ -3300,7 +3288,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3300 l3qt = 0; 3288 l3qt = 0;
3301 for (i = 0; i < 8; i++) 3289 for (i = 0; i < 8; i++)
3302 l3qt |= (ug_info->l3qt[j + i] << (28 - 4 * i)); 3290 l3qt |= (ug_info->l3qt[j + i] << (28 - 4 * i));
3303 out_be32(&ugeth->p_rx_glbl_pram->l3qt[j], l3qt); 3291 out_be32(&ugeth->p_rx_glbl_pram->l3qt[j/8], l3qt);
3304 } 3292 }
3305 3293
3306 /* vlantype */ 3294 /* vlantype */
@@ -3316,8 +3304,8 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3316 /* Size varies with number of Rx queues */ 3304 /* Size varies with number of Rx queues */
3317 ugeth->rx_bd_qs_tbl_offset = 3305 ugeth->rx_bd_qs_tbl_offset =
3318 qe_muram_alloc(ug_info->numQueuesRx * 3306 qe_muram_alloc(ug_info->numQueuesRx *
3319 (sizeof(ucc_geth_rx_bd_queues_entry_t) + 3307 (sizeof(struct ucc_geth_rx_bd_queues_entry) +
3320 sizeof(ucc_geth_rx_prefetched_bds_t)), 3308 sizeof(struct ucc_geth_rx_prefetched_bds)),
3321 UCC_GETH_RX_BD_QUEUES_ALIGNMENT); 3309 UCC_GETH_RX_BD_QUEUES_ALIGNMENT);
3322 if (IS_MURAM_ERR(ugeth->rx_bd_qs_tbl_offset)) { 3310 if (IS_MURAM_ERR(ugeth->rx_bd_qs_tbl_offset)) {
3323 ugeth_err 3311 ugeth_err
@@ -3328,14 +3316,14 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3328 } 3316 }
3329 3317
3330 ugeth->p_rx_bd_qs_tbl = 3318 ugeth->p_rx_bd_qs_tbl =
3331 (ucc_geth_rx_bd_queues_entry_t *) qe_muram_addr(ugeth-> 3319 (struct ucc_geth_rx_bd_queues_entry *) qe_muram_addr(ugeth->
3332 rx_bd_qs_tbl_offset); 3320 rx_bd_qs_tbl_offset);
3333 out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); 3321 out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset);
3334 /* Zero out p_rx_bd_qs_tbl */ 3322 /* Zero out p_rx_bd_qs_tbl */
3335 memset(ugeth->p_rx_bd_qs_tbl, 3323 memset(ugeth->p_rx_bd_qs_tbl,
3336 0, 3324 0,
3337 ug_info->numQueuesRx * (sizeof(ucc_geth_rx_bd_queues_entry_t) + 3325 ug_info->numQueuesRx * (sizeof(struct ucc_geth_rx_bd_queues_entry) +
3338 sizeof(ucc_geth_rx_prefetched_bds_t))); 3326 sizeof(struct ucc_geth_rx_prefetched_bds)));
3339 3327
3340 /* Setup the table */ 3328 /* Setup the table */
3341 /* Assume BD rings are already established */ 3329 /* Assume BD rings are already established */
@@ -3406,7 +3394,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3406 /* Allocate memory for extended filtering Mode Global 3394 /* Allocate memory for extended filtering Mode Global
3407 Parameters */ 3395 Parameters */
3408 ugeth->exf_glbl_param_offset = 3396 ugeth->exf_glbl_param_offset =
3409 qe_muram_alloc(sizeof(ucc_geth_exf_global_pram_t), 3397 qe_muram_alloc(sizeof(struct ucc_geth_exf_global_pram),
3410 UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT); 3398 UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT);
3411 if (IS_MURAM_ERR(ugeth->exf_glbl_param_offset)) { 3399 if (IS_MURAM_ERR(ugeth->exf_glbl_param_offset)) {
3412 ugeth_err 3400 ugeth_err
@@ -3417,7 +3405,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3417 } 3405 }
3418 3406
3419 ugeth->p_exf_glbl_param = 3407 ugeth->p_exf_glbl_param =
3420 (ucc_geth_exf_global_pram_t *) qe_muram_addr(ugeth-> 3408 (struct ucc_geth_exf_global_pram *) qe_muram_addr(ugeth->
3421 exf_glbl_param_offset); 3409 exf_glbl_param_offset);
3422 out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, 3410 out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam,
3423 ugeth->exf_glbl_param_offset); 3411 ugeth->exf_glbl_param_offset);
@@ -3439,7 +3427,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3439 INIT_LIST_HEAD(&ugeth->ind_hash_q); 3427 INIT_LIST_HEAD(&ugeth->ind_hash_q);
3440 } 3428 }
3441 p_82xx_addr_filt = 3429 p_82xx_addr_filt =
3442 (ucc_geth_82xx_address_filtering_pram_t *) ugeth-> 3430 (struct ucc_geth_82xx_address_filtering_pram *) ugeth->
3443 p_rx_glbl_pram->addressfiltering; 3431 p_rx_glbl_pram->addressfiltering;
3444 3432
3445 ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, 3433 ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth,
@@ -3462,7 +3450,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3462 * allocated resources can be released when the channel is freed. 3450 * allocated resources can be released when the channel is freed.
3463 */ 3451 */
3464 if (!(ugeth->p_init_enet_param_shadow = 3452 if (!(ugeth->p_init_enet_param_shadow =
3465 (ucc_geth_init_pram_t *) kmalloc(sizeof(ucc_geth_init_pram_t), 3453 (struct ucc_geth_init_pram *) kmalloc(sizeof(struct ucc_geth_init_pram),
3466 GFP_KERNEL))) { 3454 GFP_KERNEL))) {
3467 ugeth_err 3455 ugeth_err
3468 ("%s: Can not allocate memory for" 3456 ("%s: Can not allocate memory for"
@@ -3472,7 +3460,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3472 } 3460 }
3473 /* Zero out *p_init_enet_param_shadow */ 3461 /* Zero out *p_init_enet_param_shadow */
3474 memset((char *)ugeth->p_init_enet_param_shadow, 3462 memset((char *)ugeth->p_init_enet_param_shadow,
3475 0, sizeof(ucc_geth_init_pram_t)); 3463 0, sizeof(struct ucc_geth_init_pram));
3476 3464
3477 /* Fill shadow InitEnet command parameter structure */ 3465 /* Fill shadow InitEnet command parameter structure */
3478 3466
@@ -3506,7 +3494,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3506 } 3494 }
3507 ugeth->p_init_enet_param_shadow->largestexternallookupkeysize = 3495 ugeth->p_init_enet_param_shadow->largestexternallookupkeysize =
3508 ug_info->largestexternallookupkeysize; 3496 ug_info->largestexternallookupkeysize;
3509 size = sizeof(ucc_geth_thread_rx_pram_t); 3497 size = sizeof(struct ucc_geth_thread_rx_pram);
3510 if (ug_info->rxExtendedFiltering) { 3498 if (ug_info->rxExtendedFiltering) {
3511 size += THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING; 3499 size += THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING;
3512 if (ug_info->largestexternallookupkeysize == 3500 if (ug_info->largestexternallookupkeysize ==
@@ -3537,7 +3525,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3537 fill_init_enet_entries(ugeth, 3525 fill_init_enet_entries(ugeth,
3538 &(ugeth->p_init_enet_param_shadow-> 3526 &(ugeth->p_init_enet_param_shadow->
3539 txthread[0]), numThreadsTxNumerical, 3527 txthread[0]), numThreadsTxNumerical,
3540 sizeof(ucc_geth_thread_tx_pram_t), 3528 sizeof(struct ucc_geth_thread_tx_pram),
3541 UCC_GETH_THREAD_TX_PRAM_ALIGNMENT, 3529 UCC_GETH_THREAD_TX_PRAM_ALIGNMENT,
3542 ug_info->riscTx, 0)) != 0) { 3530 ug_info->riscTx, 0)) != 0) {
3543 ugeth_err("%s: Can not fill p_init_enet_param_shadow.", 3531 ugeth_err("%s: Can not fill p_init_enet_param_shadow.",
@@ -3557,7 +3545,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3557 } 3545 }
3558 3546
3559 /* Allocate InitEnet command parameter structure */ 3547 /* Allocate InitEnet command parameter structure */
3560 init_enet_pram_offset = qe_muram_alloc(sizeof(ucc_geth_init_pram_t), 4); 3548 init_enet_pram_offset = qe_muram_alloc(sizeof(struct ucc_geth_init_pram), 4);
3561 if (IS_MURAM_ERR(init_enet_pram_offset)) { 3549 if (IS_MURAM_ERR(init_enet_pram_offset)) {
3562 ugeth_err 3550 ugeth_err
3563 ("%s: Can not allocate DPRAM memory for p_init_enet_pram.", 3551 ("%s: Can not allocate DPRAM memory for p_init_enet_pram.",
@@ -3566,7 +3554,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3566 return -ENOMEM; 3554 return -ENOMEM;
3567 } 3555 }
3568 p_init_enet_pram = 3556 p_init_enet_pram =
3569 (ucc_geth_init_pram_t *) qe_muram_addr(init_enet_pram_offset); 3557 (struct ucc_geth_init_pram *) qe_muram_addr(init_enet_pram_offset);
3570 3558
3571 /* Copy shadow InitEnet command parameter structure into PRAM */ 3559 /* Copy shadow InitEnet command parameter structure into PRAM */
3572 p_init_enet_pram->resinit1 = ugeth->p_init_enet_param_shadow->resinit1; 3560 p_init_enet_pram->resinit1 = ugeth->p_init_enet_param_shadow->resinit1;
@@ -3591,7 +3579,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3591 /* Issue QE command */ 3579 /* Issue QE command */
3592 cecr_subblock = 3580 cecr_subblock =
3593 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num); 3581 ucc_fast_get_qe_cr_subblock(ugeth->ug_info->uf_info.ucc_num);
3594 qe_issue_cmd(command, cecr_subblock, (u8) QE_CR_PROTOCOL_ETHERNET, 3582 qe_issue_cmd(command, cecr_subblock, QE_CR_PROTOCOL_ETHERNET,
3595 init_enet_pram_offset); 3583 init_enet_pram_offset);
3596 3584
3597 /* Free InitEnet command parameter */ 3585 /* Free InitEnet command parameter */
@@ -3603,7 +3591,7 @@ static int ucc_geth_startup(ucc_geth_private_t *ugeth)
3603/* returns a net_device_stats structure pointer */ 3591/* returns a net_device_stats structure pointer */
3604static struct net_device_stats *ucc_geth_get_stats(struct net_device *dev) 3592static struct net_device_stats *ucc_geth_get_stats(struct net_device *dev)
3605{ 3593{
3606 ucc_geth_private_t *ugeth = netdev_priv(dev); 3594 struct ucc_geth_private *ugeth = netdev_priv(dev);
3607 3595
3608 return &(ugeth->stats); 3596 return &(ugeth->stats);
3609} 3597}
@@ -3614,7 +3602,7 @@ static struct net_device_stats *ucc_geth_get_stats(struct net_device *dev)
3614 * starting over will fix the problem. */ 3602 * starting over will fix the problem. */
3615static void ucc_geth_timeout(struct net_device *dev) 3603static void ucc_geth_timeout(struct net_device *dev)
3616{ 3604{
3617 ucc_geth_private_t *ugeth = netdev_priv(dev); 3605 struct ucc_geth_private *ugeth = netdev_priv(dev);
3618 3606
3619 ugeth_vdbg("%s: IN", __FUNCTION__); 3607 ugeth_vdbg("%s: IN", __FUNCTION__);
3620 3608
@@ -3634,7 +3622,7 @@ static void ucc_geth_timeout(struct net_device *dev)
3634/* It is pointed to by the dev->hard_start_xmit function pointer */ 3622/* It is pointed to by the dev->hard_start_xmit function pointer */
3635static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) 3623static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3636{ 3624{
3637 ucc_geth_private_t *ugeth = netdev_priv(dev); 3625 struct ucc_geth_private *ugeth = netdev_priv(dev);
3638 u8 *bd; /* BD pointer */ 3626 u8 *bd; /* BD pointer */
3639 u32 bd_status; 3627 u32 bd_status;
3640 u8 txQ = 0; 3628 u8 txQ = 0;
@@ -3647,7 +3635,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3647 3635
3648 /* Start from the next BD that should be filled */ 3636 /* Start from the next BD that should be filled */
3649 bd = ugeth->txBd[txQ]; 3637 bd = ugeth->txBd[txQ];
3650 bd_status = BD_STATUS_AND_LENGTH(bd); 3638 bd_status = in_be32((u32 *)bd);
3651 /* Save the skb pointer so we can free it later */ 3639 /* Save the skb pointer so we can free it later */
3652 ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; 3640 ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb;
3653 3641
@@ -3657,20 +3645,21 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3657 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); 3645 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]);
3658 3646
3659 /* set up the buffer descriptor */ 3647 /* set up the buffer descriptor */
3660 BD_BUFFER_SET(bd, 3648 out_be32(&((struct qe_bd *)bd)->buf,
3661 dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE)); 3649 dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE));
3662 3650
3663 //printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); 3651 /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */
3664 3652
3665 bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; 3653 bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len;
3666 3654
3667 BD_STATUS_AND_LENGTH_SET(bd, bd_status); 3655 /* set bd status and length */
3656 out_be32((u32 *)bd, bd_status);
3668 3657
3669 dev->trans_start = jiffies; 3658 dev->trans_start = jiffies;
3670 3659
3671 /* Move to next BD in the ring */ 3660 /* Move to next BD in the ring */
3672 if (!(bd_status & T_W)) 3661 if (!(bd_status & T_W))
3673 ugeth->txBd[txQ] = bd + UCC_GETH_SIZE_OF_BD; 3662 ugeth->txBd[txQ] = bd + sizeof(struct qe_bd);
3674 else 3663 else
3675 ugeth->txBd[txQ] = ugeth->p_tx_bd_ring[txQ]; 3664 ugeth->txBd[txQ] = ugeth->p_tx_bd_ring[txQ];
3676 3665
@@ -3695,7 +3684,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
3695 return 0; 3684 return 0;
3696} 3685}
3697 3686
3698static int ucc_geth_rx(ucc_geth_private_t *ugeth, u8 rxQ, int rx_work_limit) 3687static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit)
3699{ 3688{
3700 struct sk_buff *skb; 3689 struct sk_buff *skb;
3701 u8 *bd; 3690 u8 *bd;
@@ -3709,11 +3698,11 @@ static int ucc_geth_rx(ucc_geth_private_t *ugeth, u8 rxQ, int rx_work_limit)
3709 /* collect received buffers */ 3698 /* collect received buffers */
3710 bd = ugeth->rxBd[rxQ]; 3699 bd = ugeth->rxBd[rxQ];
3711 3700
3712 bd_status = BD_STATUS_AND_LENGTH(bd); 3701 bd_status = in_be32((u32 *)bd);
3713 3702
3714 /* while there are received buffers and BD is full (~R_E) */ 3703 /* while there are received buffers and BD is full (~R_E) */
3715 while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { 3704 while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) {
3716 bdBuffer = (u8 *) BD_BUFFER(bd); 3705 bdBuffer = (u8 *) in_be32(&((struct qe_bd *)bd)->buf);
3717 length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); 3706 length = (u16) ((bd_status & BD_LENGTH_MASK) - 4);
3718 skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; 3707 skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]];
3719 3708
@@ -3768,9 +3757,9 @@ static int ucc_geth_rx(ucc_geth_private_t *ugeth, u8 rxQ, int rx_work_limit)
3768 if (bd_status & R_W) 3757 if (bd_status & R_W)
3769 bd = ugeth->p_rx_bd_ring[rxQ]; 3758 bd = ugeth->p_rx_bd_ring[rxQ];
3770 else 3759 else
3771 bd += UCC_GETH_SIZE_OF_BD; 3760 bd += sizeof(struct qe_bd);
3772 3761
3773 bd_status = BD_STATUS_AND_LENGTH(bd); 3762 bd_status = in_be32((u32 *)bd);
3774 } 3763 }
3775 3764
3776 ugeth->rxBd[rxQ] = bd; 3765 ugeth->rxBd[rxQ] = bd;
@@ -3781,12 +3770,12 @@ static int ucc_geth_rx(ucc_geth_private_t *ugeth, u8 rxQ, int rx_work_limit)
3781static int ucc_geth_tx(struct net_device *dev, u8 txQ) 3770static int ucc_geth_tx(struct net_device *dev, u8 txQ)
3782{ 3771{
3783 /* Start from the next BD that should be filled */ 3772 /* Start from the next BD that should be filled */
3784 ucc_geth_private_t *ugeth = netdev_priv(dev); 3773 struct ucc_geth_private *ugeth = netdev_priv(dev);
3785 u8 *bd; /* BD pointer */ 3774 u8 *bd; /* BD pointer */
3786 u32 bd_status; 3775 u32 bd_status;
3787 3776
3788 bd = ugeth->confBd[txQ]; 3777 bd = ugeth->confBd[txQ];
3789 bd_status = BD_STATUS_AND_LENGTH(bd); 3778 bd_status = in_be32((u32 *)bd);
3790 3779
3791 /* Normal processing. */ 3780 /* Normal processing. */
3792 while ((bd_status & T_R) == 0) { 3781 while ((bd_status & T_R) == 0) {
@@ -3813,7 +3802,7 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ)
3813 3802
3814 /* Advance the confirmation BD pointer */ 3803 /* Advance the confirmation BD pointer */
3815 if (!(bd_status & T_W)) 3804 if (!(bd_status & T_W))
3816 ugeth->confBd[txQ] += UCC_GETH_SIZE_OF_BD; 3805 ugeth->confBd[txQ] += sizeof(struct qe_bd);
3817 else 3806 else
3818 ugeth->confBd[txQ] = ugeth->p_tx_bd_ring[txQ]; 3807 ugeth->confBd[txQ] = ugeth->p_tx_bd_ring[txQ];
3819 } 3808 }
@@ -3823,7 +3812,7 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ)
3823#ifdef CONFIG_UGETH_NAPI 3812#ifdef CONFIG_UGETH_NAPI
3824static int ucc_geth_poll(struct net_device *dev, int *budget) 3813static int ucc_geth_poll(struct net_device *dev, int *budget)
3825{ 3814{
3826 ucc_geth_private_t *ugeth = netdev_priv(dev); 3815 struct ucc_geth_private *ugeth = netdev_priv(dev);
3827 int howmany; 3816 int howmany;
3828 int rx_work_limit = *budget; 3817 int rx_work_limit = *budget;
3829 u8 rxQ = 0; 3818 u8 rxQ = 0;
@@ -3847,9 +3836,9 @@ static int ucc_geth_poll(struct net_device *dev, int *budget)
3847static irqreturn_t ucc_geth_irq_handler(int irq, void *info) 3836static irqreturn_t ucc_geth_irq_handler(int irq, void *info)
3848{ 3837{
3849 struct net_device *dev = (struct net_device *)info; 3838 struct net_device *dev = (struct net_device *)info;
3850 ucc_geth_private_t *ugeth = netdev_priv(dev); 3839 struct ucc_geth_private *ugeth = netdev_priv(dev);
3851 ucc_fast_private_t *uccf; 3840 struct ucc_fast_private *uccf;
3852 ucc_geth_info_t *ug_info; 3841 struct ucc_geth_info *ug_info;
3853 register u32 ucce = 0; 3842 register u32 ucce = 0;
3854 register u32 bit_mask = UCCE_RXBF_SINGLE_MASK; 3843 register u32 bit_mask = UCCE_RXBF_SINGLE_MASK;
3855 register u32 tx_mask = UCCE_TXBF_SINGLE_MASK; 3844 register u32 tx_mask = UCCE_TXBF_SINGLE_MASK;
@@ -3912,7 +3901,7 @@ static irqreturn_t ucc_geth_irq_handler(int irq, void *info)
3912static irqreturn_t phy_interrupt(int irq, void *dev_id) 3901static irqreturn_t phy_interrupt(int irq, void *dev_id)
3913{ 3902{
3914 struct net_device *dev = (struct net_device *)dev_id; 3903 struct net_device *dev = (struct net_device *)dev_id;
3915 ucc_geth_private_t *ugeth = netdev_priv(dev); 3904 struct ucc_geth_private *ugeth = netdev_priv(dev);
3916 3905
3917 ugeth_vdbg("%s: IN", __FUNCTION__); 3906 ugeth_vdbg("%s: IN", __FUNCTION__);
3918 3907
@@ -3932,8 +3921,8 @@ static irqreturn_t phy_interrupt(int irq, void *dev_id)
3932static void ugeth_phy_change(void *data) 3921static void ugeth_phy_change(void *data)
3933{ 3922{
3934 struct net_device *dev = (struct net_device *)data; 3923 struct net_device *dev = (struct net_device *)data;
3935 ucc_geth_private_t *ugeth = netdev_priv(dev); 3924 struct ucc_geth_private *ugeth = netdev_priv(dev);
3936 ucc_geth_t *ug_regs; 3925 struct ucc_geth *ug_regs;
3937 int result = 0; 3926 int result = 0;
3938 3927
3939 ugeth_vdbg("%s: IN", __FUNCTION__); 3928 ugeth_vdbg("%s: IN", __FUNCTION__);
@@ -3963,7 +3952,7 @@ static void ugeth_phy_change(void *data)
3963static void ugeth_phy_timer(unsigned long data) 3952static void ugeth_phy_timer(unsigned long data)
3964{ 3953{
3965 struct net_device *dev = (struct net_device *)data; 3954 struct net_device *dev = (struct net_device *)data;
3966 ucc_geth_private_t *ugeth = netdev_priv(dev); 3955 struct ucc_geth_private *ugeth = netdev_priv(dev);
3967 3956
3968 schedule_work(&ugeth->tq); 3957 schedule_work(&ugeth->tq);
3969 3958
@@ -3979,7 +3968,7 @@ static void ugeth_phy_timer(unsigned long data)
3979static void ugeth_phy_startup_timer(unsigned long data) 3968static void ugeth_phy_startup_timer(unsigned long data)
3980{ 3969{
3981 struct ugeth_mii_info *mii_info = (struct ugeth_mii_info *)data; 3970 struct ugeth_mii_info *mii_info = (struct ugeth_mii_info *)data;
3982 ucc_geth_private_t *ugeth = netdev_priv(mii_info->dev); 3971 struct ucc_geth_private *ugeth = netdev_priv(mii_info->dev);
3983 static int secondary = UGETH_AN_TIMEOUT; 3972 static int secondary = UGETH_AN_TIMEOUT;
3984 int result; 3973 int result;
3985 3974
@@ -4034,7 +4023,7 @@ static void ugeth_phy_startup_timer(unsigned long data)
4034/* Returns 0 for success. */ 4023/* Returns 0 for success. */
4035static int ucc_geth_open(struct net_device *dev) 4024static int ucc_geth_open(struct net_device *dev)
4036{ 4025{
4037 ucc_geth_private_t *ugeth = netdev_priv(dev); 4026 struct ucc_geth_private *ugeth = netdev_priv(dev);
4038 int err; 4027 int err;
4039 4028
4040 ugeth_vdbg("%s: IN", __FUNCTION__); 4029 ugeth_vdbg("%s: IN", __FUNCTION__);
@@ -4111,7 +4100,7 @@ static int ucc_geth_open(struct net_device *dev)
4111/* Stops the kernel queue, and halts the controller */ 4100/* Stops the kernel queue, and halts the controller */
4112static int ucc_geth_close(struct net_device *dev) 4101static int ucc_geth_close(struct net_device *dev)
4113{ 4102{
4114 ucc_geth_private_t *ugeth = netdev_priv(dev); 4103 struct ucc_geth_private *ugeth = netdev_priv(dev);
4115 4104
4116 ugeth_vdbg("%s: IN", __FUNCTION__); 4105 ugeth_vdbg("%s: IN", __FUNCTION__);
4117 4106
@@ -4130,30 +4119,53 @@ static int ucc_geth_close(struct net_device *dev)
4130 4119
4131const struct ethtool_ops ucc_geth_ethtool_ops = { }; 4120const struct ethtool_ops ucc_geth_ethtool_ops = { };
4132 4121
4133static int ucc_geth_probe(struct device *device) 4122static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *match)
4134{ 4123{
4135 struct platform_device *pdev = to_platform_device(device); 4124 struct device *device = &ofdev->dev;
4136 struct ucc_geth_platform_data *ugeth_pdata; 4125 struct device_node *np = ofdev->node;
4137 struct net_device *dev = NULL; 4126 struct net_device *dev = NULL;
4138 struct ucc_geth_private *ugeth = NULL; 4127 struct ucc_geth_private *ugeth = NULL;
4139 struct ucc_geth_info *ug_info; 4128 struct ucc_geth_info *ug_info;
4140 int err; 4129 struct resource res;
4130 struct device_node *phy;
4131 int err, ucc_num, phy_interface;
4141 static int mii_mng_configured = 0; 4132 static int mii_mng_configured = 0;
4133 const phandle *ph;
4134 const unsigned int *prop;
4142 4135
4143 ugeth_vdbg("%s: IN", __FUNCTION__); 4136 ugeth_vdbg("%s: IN", __FUNCTION__);
4144 4137
4145 ugeth_pdata = (struct ucc_geth_platform_data *)pdev->dev.platform_data; 4138 prop = get_property(np, "device-id", NULL);
4139 ucc_num = *prop - 1;
4140 if ((ucc_num < 0) || (ucc_num > 7))
4141 return -ENODEV;
4142
4143 ug_info = &ugeth_info[ucc_num];
4144 ug_info->uf_info.ucc_num = ucc_num;
4145 prop = get_property(np, "rx-clock", NULL);
4146 ug_info->uf_info.rx_clock = *prop;
4147 prop = get_property(np, "tx-clock", NULL);
4148 ug_info->uf_info.tx_clock = *prop;
4149 err = of_address_to_resource(np, 0, &res);
4150 if (err)
4151 return -EINVAL;
4152
4153 ug_info->uf_info.regs = res.start;
4154 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0);
4155
4156 ph = get_property(np, "phy-handle", NULL);
4157 phy = of_find_node_by_phandle(*ph);
4146 4158
4147 ug_info = &ugeth_info[pdev->id]; 4159 if (phy == NULL)
4148 ug_info->uf_info.ucc_num = pdev->id; 4160 return -ENODEV;
4149 ug_info->uf_info.rx_clock = ugeth_pdata->rx_clock; 4161
4150 ug_info->uf_info.tx_clock = ugeth_pdata->tx_clock; 4162 prop = get_property(phy, "reg", NULL);
4151 ug_info->uf_info.regs = ugeth_pdata->phy_reg_addr; 4163 ug_info->phy_address = *prop;
4152 ug_info->uf_info.irq = platform_get_irq(pdev, 0); 4164 prop = get_property(phy, "interface", NULL);
4153 ug_info->phy_address = ugeth_pdata->phy_id; 4165 ug_info->enet_interface = *prop;
4154 ug_info->enet_interface = ugeth_pdata->phy_interface; 4166 ug_info->phy_interrupt = irq_of_parse_and_map(phy, 0);
4155 ug_info->board_flags = ugeth_pdata->board_flags; 4167 ug_info->board_flags = (ug_info->phy_interrupt == NO_IRQ)?
4156 ug_info->phy_interrupt = ugeth_pdata->phy_interrupt; 4168 0:FSL_UGETH_BRD_HAS_PHY_INTR;
4157 4169
4158 printk(KERN_INFO "ucc_geth: UCC%1d at 0x%8x (irq = %d) \n", 4170 printk(KERN_INFO "ucc_geth: UCC%1d at 0x%8x (irq = %d) \n",
4159 ug_info->uf_info.ucc_num + 1, ug_info->uf_info.regs, 4171 ug_info->uf_info.ucc_num + 1, ug_info->uf_info.regs,
@@ -4161,12 +4173,44 @@ static int ucc_geth_probe(struct device *device)
4161 4173
4162 if (ug_info == NULL) { 4174 if (ug_info == NULL) {
4163 ugeth_err("%s: [%d] Missing additional data!", __FUNCTION__, 4175 ugeth_err("%s: [%d] Missing additional data!", __FUNCTION__,
4164 pdev->id); 4176 ucc_num);
4165 return -ENODEV; 4177 return -ENODEV;
4166 } 4178 }
4167 4179
4180 /* FIXME: Work around for early chip rev. */
4181 /* There's a bug in initial chip rev(s) in the RGMII ac */
4182 /* timing. */
4183 /* The following compensates by writing to the reserved */
4184 /* QE Port Output Hold Registers (CPOH1?). */
4185 prop = get_property(phy, "interface", NULL);
4186 phy_interface = *prop;
4187 if ((phy_interface == ENET_1000_RGMII) ||
4188 (phy_interface == ENET_100_RGMII) ||
4189 (phy_interface == ENET_10_RGMII)) {
4190 struct device_node *soc;
4191 phys_addr_t immrbase = -1;
4192 u32 *tmp_reg;
4193 u32 tmp_val;
4194
4195 soc = of_find_node_by_type(NULL, "soc");
4196 if (soc) {
4197 unsigned int size;
4198 const void *prop = get_property(soc, "reg", &size);
4199 immrbase = of_translate_address(soc, prop);
4200 of_node_put(soc);
4201 };
4202
4203 tmp_reg = (u32 *) ioremap(immrbase + 0x14A8, 0x4);
4204 tmp_val = in_be32(tmp_reg);
4205 if (ucc_num == 1)
4206 out_be32(tmp_reg, tmp_val | 0x00003000);
4207 else if (ucc_num == 2)
4208 out_be32(tmp_reg, tmp_val | 0x0c000000);
4209 iounmap(tmp_reg);
4210 }
4211
4168 if (!mii_mng_configured) { 4212 if (!mii_mng_configured) {
4169 ucc_set_qe_mux_mii_mng(ug_info->uf_info.ucc_num); 4213 ucc_set_qe_mux_mii_mng(ucc_num);
4170 mii_mng_configured = 1; 4214 mii_mng_configured = 1;
4171 } 4215 }
4172 4216
@@ -4213,13 +4257,14 @@ static int ucc_geth_probe(struct device *device)
4213 4257
4214 ugeth->ug_info = ug_info; 4258 ugeth->ug_info = ug_info;
4215 ugeth->dev = dev; 4259 ugeth->dev = dev;
4216 memcpy(dev->dev_addr, ugeth_pdata->mac_addr, 6); 4260 memcpy(dev->dev_addr, get_property(np, "mac-address", NULL), 6);
4217 4261
4218 return 0; 4262 return 0;
4219} 4263}
4220 4264
4221static int ucc_geth_remove(struct device *device) 4265static int ucc_geth_remove(struct of_device* ofdev)
4222{ 4266{
4267 struct device *device = &ofdev->dev;
4223 struct net_device *dev = dev_get_drvdata(device); 4268 struct net_device *dev = dev_get_drvdata(device);
4224 struct ucc_geth_private *ugeth = netdev_priv(dev); 4269 struct ucc_geth_private *ugeth = netdev_priv(dev);
4225 4270
@@ -4230,28 +4275,38 @@ static int ucc_geth_remove(struct device *device)
4230 return 0; 4275 return 0;
4231} 4276}
4232 4277
4233/* Structure for a device driver */ 4278static struct of_device_id ucc_geth_match[] = {
4234static struct device_driver ucc_geth_driver = { 4279 {
4235 .name = DRV_NAME, 4280 .type = "network",
4236 .bus = &platform_bus_type, 4281 .compatible = "ucc_geth",
4237 .probe = ucc_geth_probe, 4282 },
4238 .remove = ucc_geth_remove, 4283 {},
4284};
4285
4286MODULE_DEVICE_TABLE(of, ucc_geth_match);
4287
4288static struct of_platform_driver ucc_geth_driver = {
4289 .name = DRV_NAME,
4290 .match_table = ucc_geth_match,
4291 .probe = ucc_geth_probe,
4292 .remove = ucc_geth_remove,
4239}; 4293};
4240 4294
4241static int __init ucc_geth_init(void) 4295static int __init ucc_geth_init(void)
4242{ 4296{
4243 int i; 4297 int i;
4298
4244 printk(KERN_INFO "ucc_geth: " DRV_DESC "\n"); 4299 printk(KERN_INFO "ucc_geth: " DRV_DESC "\n");
4245 for (i = 0; i < 8; i++) 4300 for (i = 0; i < 8; i++)
4246 memcpy(&(ugeth_info[i]), &ugeth_primary_info, 4301 memcpy(&(ugeth_info[i]), &ugeth_primary_info,
4247 sizeof(ugeth_primary_info)); 4302 sizeof(ugeth_primary_info));
4248 4303
4249 return driver_register(&ucc_geth_driver); 4304 return of_register_driver(&ucc_geth_driver);
4250} 4305}
4251 4306
4252static void __exit ucc_geth_exit(void) 4307static void __exit ucc_geth_exit(void)
4253{ 4308{
4254 driver_unregister(&ucc_geth_driver); 4309 of_unregister_driver(&ucc_geth_driver);
4255} 4310}
4256 4311
4257module_init(ucc_geth_init); 4312module_init(ucc_geth_init);
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 005965f5dd9b..a66561253593 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -36,24 +36,24 @@
36#define ENET_INIT_PARAM_MAX_ENTRIES_RX 9 36#define ENET_INIT_PARAM_MAX_ENTRIES_RX 9
37#define ENET_INIT_PARAM_MAX_ENTRIES_TX 8 37#define ENET_INIT_PARAM_MAX_ENTRIES_TX 8
38 38
39typedef struct ucc_mii_mng { 39struct ucc_mii_mng {
40 u32 miimcfg; /* MII management configuration reg */ 40 u32 miimcfg; /* MII management configuration reg */
41 u32 miimcom; /* MII management command reg */ 41 u32 miimcom; /* MII management command reg */
42 u32 miimadd; /* MII management address reg */ 42 u32 miimadd; /* MII management address reg */
43 u32 miimcon; /* MII management control reg */ 43 u32 miimcon; /* MII management control reg */
44 u32 miimstat; /* MII management status reg */ 44 u32 miimstat; /* MII management status reg */
45 u32 miimind; /* MII management indication reg */ 45 u32 miimind; /* MII management indication reg */
46} __attribute__ ((packed)) ucc_mii_mng_t; 46} __attribute__ ((packed));
47 47
48typedef struct ucc_geth { 48struct ucc_geth {
49 ucc_fast_t uccf; 49 struct ucc_fast uccf;
50 50
51 u32 maccfg1; /* mac configuration reg. 1 */ 51 u32 maccfg1; /* mac configuration reg. 1 */
52 u32 maccfg2; /* mac configuration reg. 2 */ 52 u32 maccfg2; /* mac configuration reg. 2 */
53 u32 ipgifg; /* interframe gap reg. */ 53 u32 ipgifg; /* interframe gap reg. */
54 u32 hafdup; /* half-duplex reg. */ 54 u32 hafdup; /* half-duplex reg. */
55 u8 res1[0x10]; 55 u8 res1[0x10];
56 ucc_mii_mng_t miimng; /* MII management structure */ 56 struct ucc_mii_mng miimng; /* MII management structure */
57 u32 ifctl; /* interface control reg */ 57 u32 ifctl; /* interface control reg */
58 u32 ifstat; /* interface statux reg */ 58 u32 ifstat; /* interface statux reg */
59 u32 macstnaddr1; /* mac station address part 1 reg */ 59 u32 macstnaddr1; /* mac station address part 1 reg */
@@ -111,7 +111,7 @@ typedef struct ucc_geth {
111 u32 scar; /* Statistics carry register */ 111 u32 scar; /* Statistics carry register */
112 u32 scam; /* Statistics caryy mask register */ 112 u32 scam; /* Statistics caryy mask register */
113 u8 res5[0x200 - 0x1c4]; 113 u8 res5[0x200 - 0x1c4];
114} __attribute__ ((packed)) ucc_geth_t; 114} __attribute__ ((packed));
115 115
116/* UCC GETH TEMODR Register */ 116/* UCC GETH TEMODR Register */
117#define TEMODER_TX_RMON_STATISTICS_ENABLE 0x0100 /* enable Tx statistics 117#define TEMODER_TX_RMON_STATISTICS_ENABLE 0x0100 /* enable Tx statistics
@@ -508,39 +508,39 @@ typedef struct ucc_geth {
508/* UCC GETH UDSR (Data Synchronization Register) */ 508/* UCC GETH UDSR (Data Synchronization Register) */
509#define UDSR_MAGIC 0x067E 509#define UDSR_MAGIC 0x067E
510 510
511typedef struct ucc_geth_thread_data_tx { 511struct ucc_geth_thread_data_tx {
512 u8 res0[104]; 512 u8 res0[104];
513} __attribute__ ((packed)) ucc_geth_thread_data_tx_t; 513} __attribute__ ((packed));
514 514
515typedef struct ucc_geth_thread_data_rx { 515struct ucc_geth_thread_data_rx {
516 u8 res0[40]; 516 u8 res0[40];
517} __attribute__ ((packed)) ucc_geth_thread_data_rx_t; 517} __attribute__ ((packed));
518 518
519/* Send Queue Queue-Descriptor */ 519/* Send Queue Queue-Descriptor */
520typedef struct ucc_geth_send_queue_qd { 520struct ucc_geth_send_queue_qd {
521 u32 bd_ring_base; /* pointer to BD ring base address */ 521 u32 bd_ring_base; /* pointer to BD ring base address */
522 u8 res0[0x8]; 522 u8 res0[0x8];
523 u32 last_bd_completed_address;/* initialize to last entry in BD ring */ 523 u32 last_bd_completed_address;/* initialize to last entry in BD ring */
524 u8 res1[0x30]; 524 u8 res1[0x30];
525} __attribute__ ((packed)) ucc_geth_send_queue_qd_t; 525} __attribute__ ((packed));
526 526
527typedef struct ucc_geth_send_queue_mem_region { 527struct ucc_geth_send_queue_mem_region {
528 ucc_geth_send_queue_qd_t sqqd[NUM_TX_QUEUES]; 528 struct ucc_geth_send_queue_qd sqqd[NUM_TX_QUEUES];
529} __attribute__ ((packed)) ucc_geth_send_queue_mem_region_t; 529} __attribute__ ((packed));
530 530
531typedef struct ucc_geth_thread_tx_pram { 531struct ucc_geth_thread_tx_pram {
532 u8 res0[64]; 532 u8 res0[64];
533} __attribute__ ((packed)) ucc_geth_thread_tx_pram_t; 533} __attribute__ ((packed));
534 534
535typedef struct ucc_geth_thread_rx_pram { 535struct ucc_geth_thread_rx_pram {
536 u8 res0[128]; 536 u8 res0[128];
537} __attribute__ ((packed)) ucc_geth_thread_rx_pram_t; 537} __attribute__ ((packed));
538 538
539#define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING 64 539#define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING 64
540#define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8 64 540#define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_8 64
541#define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_16 96 541#define THREAD_RX_PRAM_ADDITIONAL_FOR_EXTENDED_FILTERING_16 96
542 542
543typedef struct ucc_geth_scheduler { 543struct ucc_geth_scheduler {
544 u16 cpucount0; /* CPU packet counter */ 544 u16 cpucount0; /* CPU packet counter */
545 u16 cpucount1; /* CPU packet counter */ 545 u16 cpucount1; /* CPU packet counter */
546 u16 cecount0; /* QE packet counter */ 546 u16 cecount0; /* QE packet counter */
@@ -574,9 +574,9 @@ typedef struct ucc_geth_scheduler {
574 /**< weight factor for queues */ 574 /**< weight factor for queues */
575 u32 minw; /* temporary variable handled by QE */ 575 u32 minw; /* temporary variable handled by QE */
576 u8 res1[0x70 - 0x64]; 576 u8 res1[0x70 - 0x64];
577} __attribute__ ((packed)) ucc_geth_scheduler_t; 577} __attribute__ ((packed));
578 578
579typedef struct ucc_geth_tx_firmware_statistics_pram { 579struct ucc_geth_tx_firmware_statistics_pram {
580 u32 sicoltx; /* single collision */ 580 u32 sicoltx; /* single collision */
581 u32 mulcoltx; /* multiple collision */ 581 u32 mulcoltx; /* multiple collision */
582 u32 latecoltxfr; /* late collision */ 582 u32 latecoltxfr; /* late collision */
@@ -596,9 +596,9 @@ typedef struct ucc_geth_tx_firmware_statistics_pram {
596 and 1518 octets */ 596 and 1518 octets */
597 u32 txpktsjumbo; /* total packets (including bad) between 1024 597 u32 txpktsjumbo; /* total packets (including bad) between 1024
598 and MAXLength octets */ 598 and MAXLength octets */
599} __attribute__ ((packed)) ucc_geth_tx_firmware_statistics_pram_t; 599} __attribute__ ((packed));
600 600
601typedef struct ucc_geth_rx_firmware_statistics_pram { 601struct ucc_geth_rx_firmware_statistics_pram {
602 u32 frrxfcser; /* frames with crc error */ 602 u32 frrxfcser; /* frames with crc error */
603 u32 fraligner; /* frames with alignment error */ 603 u32 fraligner; /* frames with alignment error */
604 u32 inrangelenrxer; /* in range length error */ 604 u32 inrangelenrxer; /* in range length error */
@@ -630,33 +630,33 @@ typedef struct ucc_geth_rx_firmware_statistics_pram {
630 replaced */ 630 replaced */
631 u32 insertvlan; /* total frames that had their VLAN tag 631 u32 insertvlan; /* total frames that had their VLAN tag
632 inserted */ 632 inserted */
633} __attribute__ ((packed)) ucc_geth_rx_firmware_statistics_pram_t; 633} __attribute__ ((packed));
634 634
635typedef struct ucc_geth_rx_interrupt_coalescing_entry { 635struct ucc_geth_rx_interrupt_coalescing_entry {
636 u32 interruptcoalescingmaxvalue; /* interrupt coalescing max 636 u32 interruptcoalescingmaxvalue; /* interrupt coalescing max
637 value */ 637 value */
638 u32 interruptcoalescingcounter; /* interrupt coalescing counter, 638 u32 interruptcoalescingcounter; /* interrupt coalescing counter,
639 initialize to 639 initialize to
640 interruptcoalescingmaxvalue */ 640 interruptcoalescingmaxvalue */
641} __attribute__ ((packed)) ucc_geth_rx_interrupt_coalescing_entry_t; 641} __attribute__ ((packed));
642 642
643typedef struct ucc_geth_rx_interrupt_coalescing_table { 643struct ucc_geth_rx_interrupt_coalescing_table {
644 ucc_geth_rx_interrupt_coalescing_entry_t coalescingentry[NUM_RX_QUEUES]; 644 struct ucc_geth_rx_interrupt_coalescing_entry coalescingentry[NUM_RX_QUEUES];
645 /**< interrupt coalescing entry */ 645 /**< interrupt coalescing entry */
646} __attribute__ ((packed)) ucc_geth_rx_interrupt_coalescing_table_t; 646} __attribute__ ((packed));
647 647
648typedef struct ucc_geth_rx_prefetched_bds { 648struct ucc_geth_rx_prefetched_bds {
649 qe_bd_t bd[NUM_BDS_IN_PREFETCHED_BDS]; /* prefetched bd */ 649 struct qe_bd bd[NUM_BDS_IN_PREFETCHED_BDS]; /* prefetched bd */
650} __attribute__ ((packed)) ucc_geth_rx_prefetched_bds_t; 650} __attribute__ ((packed));
651 651
652typedef struct ucc_geth_rx_bd_queues_entry { 652struct ucc_geth_rx_bd_queues_entry {
653 u32 bdbaseptr; /* BD base pointer */ 653 u32 bdbaseptr; /* BD base pointer */
654 u32 bdptr; /* BD pointer */ 654 u32 bdptr; /* BD pointer */
655 u32 externalbdbaseptr; /* external BD base pointer */ 655 u32 externalbdbaseptr; /* external BD base pointer */
656 u32 externalbdptr; /* external BD pointer */ 656 u32 externalbdptr; /* external BD pointer */
657} __attribute__ ((packed)) ucc_geth_rx_bd_queues_entry_t; 657} __attribute__ ((packed));
658 658
659typedef struct ucc_geth_tx_global_pram { 659struct ucc_geth_tx_global_pram {
660 u16 temoder; 660 u16 temoder;
661 u8 res0[0x38 - 0x02]; 661 u8 res0[0x38 - 0x02];
662 u32 sqptr; /* a base pointer to send queue memory region */ 662 u32 sqptr; /* a base pointer to send queue memory region */
@@ -670,15 +670,15 @@ typedef struct ucc_geth_tx_global_pram {
670 u32 tqptr; /* a base pointer to the Tx Queues Memory 670 u32 tqptr; /* a base pointer to the Tx Queues Memory
671 Region */ 671 Region */
672 u8 res2[0x80 - 0x74]; 672 u8 res2[0x80 - 0x74];
673} __attribute__ ((packed)) ucc_geth_tx_global_pram_t; 673} __attribute__ ((packed));
674 674
675/* structure representing Extended Filtering Global Parameters in PRAM */ 675/* structure representing Extended Filtering Global Parameters in PRAM */
676typedef struct ucc_geth_exf_global_pram { 676struct ucc_geth_exf_global_pram {
677 u32 l2pcdptr; /* individual address filter, high */ 677 u32 l2pcdptr; /* individual address filter, high */
678 u8 res0[0x10 - 0x04]; 678 u8 res0[0x10 - 0x04];
679} __attribute__ ((packed)) ucc_geth_exf_global_pram_t; 679} __attribute__ ((packed));
680 680
681typedef struct ucc_geth_rx_global_pram { 681struct ucc_geth_rx_global_pram {
682 u32 remoder; /* ethernet mode reg. */ 682 u32 remoder; /* ethernet mode reg. */
683 u32 rqptr; /* base pointer to the Rx Queues Memory Region*/ 683 u32 rqptr; /* base pointer to the Rx Queues Memory Region*/
684 u32 res0[0x1]; 684 u32 res0[0x1];
@@ -710,12 +710,12 @@ typedef struct ucc_geth_rx_global_pram {
710 u32 exfGlobalParam; /* base address for extended filtering global 710 u32 exfGlobalParam; /* base address for extended filtering global
711 parameters */ 711 parameters */
712 u8 res6[0x100 - 0xC4]; /* Initialize to zero */ 712 u8 res6[0x100 - 0xC4]; /* Initialize to zero */
713} __attribute__ ((packed)) ucc_geth_rx_global_pram_t; 713} __attribute__ ((packed));
714 714
715#define GRACEFUL_STOP_ACKNOWLEDGE_RX 0x01 715#define GRACEFUL_STOP_ACKNOWLEDGE_RX 0x01
716 716
717/* structure representing InitEnet command */ 717/* structure representing InitEnet command */
718typedef struct ucc_geth_init_pram { 718struct ucc_geth_init_pram {
719 u8 resinit1; 719 u8 resinit1;
720 u8 resinit2; 720 u8 resinit2;
721 u8 resinit3; 721 u8 resinit3;
@@ -729,7 +729,7 @@ typedef struct ucc_geth_init_pram {
729 u32 txglobal; /* tx global */ 729 u32 txglobal; /* tx global */
730 u32 txthread[ENET_INIT_PARAM_MAX_ENTRIES_TX]; /* tx threads */ 730 u32 txthread[ENET_INIT_PARAM_MAX_ENTRIES_TX]; /* tx threads */
731 u8 res3[0x1]; 731 u8 res3[0x1];
732} __attribute__ ((packed)) ucc_geth_init_pram_t; 732} __attribute__ ((packed));
733 733
734#define ENET_INIT_PARAM_RGF_SHIFT (32 - 4) 734#define ENET_INIT_PARAM_RGF_SHIFT (32 - 4)
735#define ENET_INIT_PARAM_TGF_SHIFT (32 - 8) 735#define ENET_INIT_PARAM_TGF_SHIFT (32 - 8)
@@ -746,27 +746,27 @@ typedef struct ucc_geth_init_pram {
746#define ENET_INIT_PARAM_MAGIC_RES_INIT5 0x0400 746#define ENET_INIT_PARAM_MAGIC_RES_INIT5 0x0400
747 747
748/* structure representing 82xx Address Filtering Enet Address in PRAM */ 748/* structure representing 82xx Address Filtering Enet Address in PRAM */
749typedef struct ucc_geth_82xx_enet_address { 749struct ucc_geth_82xx_enet_address {
750 u8 res1[0x2]; 750 u8 res1[0x2];
751 u16 h; /* address (MSB) */ 751 u16 h; /* address (MSB) */
752 u16 m; /* address */ 752 u16 m; /* address */
753 u16 l; /* address (LSB) */ 753 u16 l; /* address (LSB) */
754} __attribute__ ((packed)) ucc_geth_82xx_enet_address_t; 754} __attribute__ ((packed));
755 755
756/* structure representing 82xx Address Filtering PRAM */ 756/* structure representing 82xx Address Filtering PRAM */
757typedef struct ucc_geth_82xx_address_filtering_pram { 757struct ucc_geth_82xx_address_filtering_pram {
758 u32 iaddr_h; /* individual address filter, high */ 758 u32 iaddr_h; /* individual address filter, high */
759 u32 iaddr_l; /* individual address filter, low */ 759 u32 iaddr_l; /* individual address filter, low */
760 u32 gaddr_h; /* group address filter, high */ 760 u32 gaddr_h; /* group address filter, high */
761 u32 gaddr_l; /* group address filter, low */ 761 u32 gaddr_l; /* group address filter, low */
762 ucc_geth_82xx_enet_address_t taddr; 762 struct ucc_geth_82xx_enet_address taddr;
763 ucc_geth_82xx_enet_address_t paddr[NUM_OF_PADDRS]; 763 struct ucc_geth_82xx_enet_address paddr[NUM_OF_PADDRS];
764 u8 res0[0x40 - 0x38]; 764 u8 res0[0x40 - 0x38];
765} __attribute__ ((packed)) ucc_geth_82xx_address_filtering_pram_t; 765} __attribute__ ((packed));
766 766
767/* GETH Tx firmware statistics structure, used when calling 767/* GETH Tx firmware statistics structure, used when calling
768 UCC_GETH_GetStatistics. */ 768 UCC_GETH_GetStatistics. */
769typedef struct ucc_geth_tx_firmware_statistics { 769struct ucc_geth_tx_firmware_statistics {
770 u32 sicoltx; /* single collision */ 770 u32 sicoltx; /* single collision */
771 u32 mulcoltx; /* multiple collision */ 771 u32 mulcoltx; /* multiple collision */
772 u32 latecoltxfr; /* late collision */ 772 u32 latecoltxfr; /* late collision */
@@ -786,11 +786,11 @@ typedef struct ucc_geth_tx_firmware_statistics {
786 and 1518 octets */ 786 and 1518 octets */
787 u32 txpktsjumbo; /* total packets (including bad) between 1024 787 u32 txpktsjumbo; /* total packets (including bad) between 1024
788 and MAXLength octets */ 788 and MAXLength octets */
789} __attribute__ ((packed)) ucc_geth_tx_firmware_statistics_t; 789} __attribute__ ((packed));
790 790
791/* GETH Rx firmware statistics structure, used when calling 791/* GETH Rx firmware statistics structure, used when calling
792 UCC_GETH_GetStatistics. */ 792 UCC_GETH_GetStatistics. */
793typedef struct ucc_geth_rx_firmware_statistics { 793struct ucc_geth_rx_firmware_statistics {
794 u32 frrxfcser; /* frames with crc error */ 794 u32 frrxfcser; /* frames with crc error */
795 u32 fraligner; /* frames with alignment error */ 795 u32 fraligner; /* frames with alignment error */
796 u32 inrangelenrxer; /* in range length error */ 796 u32 inrangelenrxer; /* in range length error */
@@ -822,11 +822,11 @@ typedef struct ucc_geth_rx_firmware_statistics {
822 replaced */ 822 replaced */
823 u32 insertvlan; /* total frames that had their VLAN tag 823 u32 insertvlan; /* total frames that had their VLAN tag
824 inserted */ 824 inserted */
825} __attribute__ ((packed)) ucc_geth_rx_firmware_statistics_t; 825} __attribute__ ((packed));
826 826
827/* GETH hardware statistics structure, used when calling 827/* GETH hardware statistics structure, used when calling
828 UCC_GETH_GetStatistics. */ 828 UCC_GETH_GetStatistics. */
829typedef struct ucc_geth_hardware_statistics { 829struct ucc_geth_hardware_statistics {
830 u32 tx64; /* Total number of frames (including bad 830 u32 tx64; /* Total number of frames (including bad
831 frames) transmitted that were exactly of the 831 frames) transmitted that were exactly of the
832 minimal length (64 for un tagged, 68 for 832 minimal length (64 for un tagged, 68 for
@@ -871,7 +871,7 @@ typedef struct ucc_geth_hardware_statistics {
871 u32 rbca; /* Total number of frames received succesfully 871 u32 rbca; /* Total number of frames received succesfully
872 that had destination address equal to the 872 that had destination address equal to the
873 broadcast address */ 873 broadcast address */
874} __attribute__ ((packed)) ucc_geth_hardware_statistics_t; 874} __attribute__ ((packed));
875 875
876/* UCC GETH Tx errors returned via TxConf callback */ 876/* UCC GETH Tx errors returned via TxConf callback */
877#define TX_ERRORS_DEF 0x0200 877#define TX_ERRORS_DEF 0x0200
@@ -1013,21 +1013,21 @@ typedef struct ucc_geth_hardware_statistics {
1013 (MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_112) 1013 (MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_112)
1014 1014
1015/* Ethernet speed */ 1015/* Ethernet speed */
1016typedef enum enet_speed { 1016enum enet_speed {
1017 ENET_SPEED_10BT, /* 10 Base T */ 1017 ENET_SPEED_10BT, /* 10 Base T */
1018 ENET_SPEED_100BT, /* 100 Base T */ 1018 ENET_SPEED_100BT, /* 100 Base T */
1019 ENET_SPEED_1000BT /* 1000 Base T */ 1019 ENET_SPEED_1000BT /* 1000 Base T */
1020} enet_speed_e; 1020};
1021 1021
1022/* Ethernet Address Type. */ 1022/* Ethernet Address Type. */
1023typedef enum enet_addr_type { 1023enum enet_addr_type {
1024 ENET_ADDR_TYPE_INDIVIDUAL, 1024 ENET_ADDR_TYPE_INDIVIDUAL,
1025 ENET_ADDR_TYPE_GROUP, 1025 ENET_ADDR_TYPE_GROUP,
1026 ENET_ADDR_TYPE_BROADCAST 1026 ENET_ADDR_TYPE_BROADCAST
1027} enet_addr_type_e; 1027};
1028 1028
1029/* TBI / MII Set Register */ 1029/* TBI / MII Set Register */
1030typedef enum enet_tbi_mii_reg { 1030enum enet_tbi_mii_reg {
1031 ENET_TBI_MII_CR = 0x00, /* Control (CR ) */ 1031 ENET_TBI_MII_CR = 0x00, /* Control (CR ) */
1032 ENET_TBI_MII_SR = 0x01, /* Status (SR ) */ 1032 ENET_TBI_MII_SR = 0x01, /* Status (SR ) */
1033 ENET_TBI_MII_ANA = 0x04, /* AN advertisement (ANA ) */ 1033 ENET_TBI_MII_ANA = 0x04, /* AN advertisement (ANA ) */
@@ -1040,10 +1040,10 @@ typedef enum enet_tbi_mii_reg {
1040 ENET_TBI_MII_EXST = 0x0F, /* Extended status (EXST ) */ 1040 ENET_TBI_MII_EXST = 0x0F, /* Extended status (EXST ) */
1041 ENET_TBI_MII_JD = 0x10, /* Jitter diagnostics (JD ) */ 1041 ENET_TBI_MII_JD = 0x10, /* Jitter diagnostics (JD ) */
1042 ENET_TBI_MII_TBICON = 0x11 /* TBI control (TBICON ) */ 1042 ENET_TBI_MII_TBICON = 0x11 /* TBI control (TBICON ) */
1043} enet_tbi_mii_reg_e; 1043};
1044 1044
1045/* UCC GETH 82xx Ethernet Address Recognition Location */ 1045/* UCC GETH 82xx Ethernet Address Recognition Location */
1046typedef enum ucc_geth_enet_address_recognition_location { 1046enum ucc_geth_enet_address_recognition_location {
1047 UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_STATION_ADDRESS,/* station 1047 UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_STATION_ADDRESS,/* station
1048 address */ 1048 address */
1049 UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_PADDR_FIRST, /* additional 1049 UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_PADDR_FIRST, /* additional
@@ -1065,10 +1065,10 @@ typedef enum ucc_geth_enet_address_recognition_location {
1065 UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_GROUP_HASH, /* group hash */ 1065 UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_GROUP_HASH, /* group hash */
1066 UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_INDIVIDUAL_HASH /* individual 1066 UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_INDIVIDUAL_HASH /* individual
1067 hash */ 1067 hash */
1068} ucc_geth_enet_address_recognition_location_e; 1068};
1069 1069
1070/* UCC GETH vlan operation tagged */ 1070/* UCC GETH vlan operation tagged */
1071typedef enum ucc_geth_vlan_operation_tagged { 1071enum ucc_geth_vlan_operation_tagged {
1072 UCC_GETH_VLAN_OPERATION_TAGGED_NOP = 0x0, /* Tagged - nop */ 1072 UCC_GETH_VLAN_OPERATION_TAGGED_NOP = 0x0, /* Tagged - nop */
1073 UCC_GETH_VLAN_OPERATION_TAGGED_REPLACE_VID_PORTION_OF_Q_TAG 1073 UCC_GETH_VLAN_OPERATION_TAGGED_REPLACE_VID_PORTION_OF_Q_TAG
1074 = 0x1, /* Tagged - replace vid portion of q tag */ 1074 = 0x1, /* Tagged - replace vid portion of q tag */
@@ -1076,18 +1076,18 @@ typedef enum ucc_geth_vlan_operation_tagged {
1076 = 0x2, /* Tagged - if vid0 replace vid with default value */ 1076 = 0x2, /* Tagged - if vid0 replace vid with default value */
1077 UCC_GETH_VLAN_OPERATION_TAGGED_EXTRACT_Q_TAG_FROM_FRAME 1077 UCC_GETH_VLAN_OPERATION_TAGGED_EXTRACT_Q_TAG_FROM_FRAME
1078 = 0x3 /* Tagged - extract q tag from frame */ 1078 = 0x3 /* Tagged - extract q tag from frame */
1079} ucc_geth_vlan_operation_tagged_e; 1079};
1080 1080
1081/* UCC GETH vlan operation non-tagged */ 1081/* UCC GETH vlan operation non-tagged */
1082typedef enum ucc_geth_vlan_operation_non_tagged { 1082enum ucc_geth_vlan_operation_non_tagged {
1083 UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP = 0x0, /* Non tagged - nop */ 1083 UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP = 0x0, /* Non tagged - nop */
1084 UCC_GETH_VLAN_OPERATION_NON_TAGGED_Q_TAG_INSERT = 0x1 /* Non tagged - 1084 UCC_GETH_VLAN_OPERATION_NON_TAGGED_Q_TAG_INSERT = 0x1 /* Non tagged -
1085 q tag insert 1085 q tag insert
1086 */ 1086 */
1087} ucc_geth_vlan_operation_non_tagged_e; 1087};
1088 1088
1089/* UCC GETH Rx Quality of Service Mode */ 1089/* UCC GETH Rx Quality of Service Mode */
1090typedef enum ucc_geth_qos_mode { 1090enum ucc_geth_qos_mode {
1091 UCC_GETH_QOS_MODE_DEFAULT = 0x0, /* default queue */ 1091 UCC_GETH_QOS_MODE_DEFAULT = 0x0, /* default queue */
1092 UCC_GETH_QOS_MODE_QUEUE_NUM_FROM_L2_CRITERIA = 0x1, /* queue 1092 UCC_GETH_QOS_MODE_QUEUE_NUM_FROM_L2_CRITERIA = 0x1, /* queue
1093 determined 1093 determined
@@ -1097,11 +1097,11 @@ typedef enum ucc_geth_qos_mode {
1097 determined 1097 determined
1098 by L3 1098 by L3
1099 criteria */ 1099 criteria */
1100} ucc_geth_qos_mode_e; 1100};
1101 1101
1102/* UCC GETH Statistics Gathering Mode - These are bit flags, 'or' them together 1102/* UCC GETH Statistics Gathering Mode - These are bit flags, 'or' them together
1103 for combined functionality */ 1103 for combined functionality */
1104typedef enum ucc_geth_statistics_gathering_mode { 1104enum ucc_geth_statistics_gathering_mode {
1105 UCC_GETH_STATISTICS_GATHERING_MODE_NONE = 0x00000000, /* No 1105 UCC_GETH_STATISTICS_GATHERING_MODE_NONE = 0x00000000, /* No
1106 statistics 1106 statistics
1107 gathering */ 1107 gathering */
@@ -1122,10 +1122,10 @@ typedef enum ucc_geth_statistics_gathering_mode {
1122 statistics 1122 statistics
1123 gathering 1123 gathering
1124 */ 1124 */
1125} ucc_geth_statistics_gathering_mode_e; 1125};
1126 1126
1127/* UCC GETH Pad and CRC Mode - Note, Padding without CRC is not possible */ 1127/* UCC GETH Pad and CRC Mode - Note, Padding without CRC is not possible */
1128typedef enum ucc_geth_maccfg2_pad_and_crc_mode { 1128enum ucc_geth_maccfg2_pad_and_crc_mode {
1129 UCC_GETH_PAD_AND_CRC_MODE_NONE 1129 UCC_GETH_PAD_AND_CRC_MODE_NONE
1130 = MACCFG2_PAD_AND_CRC_MODE_NONE, /* Neither Padding 1130 = MACCFG2_PAD_AND_CRC_MODE_NONE, /* Neither Padding
1131 short frames 1131 short frames
@@ -1135,61 +1135,59 @@ typedef enum ucc_geth_maccfg2_pad_and_crc_mode {
1135 CRC only */ 1135 CRC only */
1136 UCC_GETH_PAD_AND_CRC_MODE_PAD_AND_CRC = 1136 UCC_GETH_PAD_AND_CRC_MODE_PAD_AND_CRC =
1137 MACCFG2_PAD_AND_CRC_MODE_PAD_AND_CRC 1137 MACCFG2_PAD_AND_CRC_MODE_PAD_AND_CRC
1138} ucc_geth_maccfg2_pad_and_crc_mode_e; 1138};
1139 1139
1140/* UCC GETH upsmr Flow Control Mode */ 1140/* UCC GETH upsmr Flow Control Mode */
1141typedef enum ucc_geth_flow_control_mode { 1141enum ucc_geth_flow_control_mode {
1142 UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_NONE = 0x00000000, /* No automatic 1142 UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_NONE = 0x00000000, /* No automatic
1143 flow control 1143 flow control
1144 */ 1144 */
1145 UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_PAUSE_WHEN_EMERGENCY 1145 UPSMR_AUTOMATIC_FLOW_CONTROL_MODE_PAUSE_WHEN_EMERGENCY
1146 = 0x00004000 /* Send pause frame when RxFIFO reaches its 1146 = 0x00004000 /* Send pause frame when RxFIFO reaches its
1147 emergency threshold */ 1147 emergency threshold */
1148} ucc_geth_flow_control_mode_e; 1148};
1149 1149
1150/* UCC GETH number of threads */ 1150/* UCC GETH number of threads */
1151typedef enum ucc_geth_num_of_threads { 1151enum ucc_geth_num_of_threads {
1152 UCC_GETH_NUM_OF_THREADS_1 = 0x1, /* 1 */ 1152 UCC_GETH_NUM_OF_THREADS_1 = 0x1, /* 1 */
1153 UCC_GETH_NUM_OF_THREADS_2 = 0x2, /* 2 */ 1153 UCC_GETH_NUM_OF_THREADS_2 = 0x2, /* 2 */
1154 UCC_GETH_NUM_OF_THREADS_4 = 0x0, /* 4 */ 1154 UCC_GETH_NUM_OF_THREADS_4 = 0x0, /* 4 */
1155 UCC_GETH_NUM_OF_THREADS_6 = 0x3, /* 6 */ 1155 UCC_GETH_NUM_OF_THREADS_6 = 0x3, /* 6 */
1156 UCC_GETH_NUM_OF_THREADS_8 = 0x4 /* 8 */ 1156 UCC_GETH_NUM_OF_THREADS_8 = 0x4 /* 8 */
1157} ucc_geth_num_of_threads_e; 1157};
1158 1158
1159/* UCC GETH number of station addresses */ 1159/* UCC GETH number of station addresses */
1160typedef enum ucc_geth_num_of_station_addresses { 1160enum ucc_geth_num_of_station_addresses {
1161 UCC_GETH_NUM_OF_STATION_ADDRESSES_1, /* 1 */ 1161 UCC_GETH_NUM_OF_STATION_ADDRESSES_1, /* 1 */
1162 UCC_GETH_NUM_OF_STATION_ADDRESSES_5 /* 5 */ 1162 UCC_GETH_NUM_OF_STATION_ADDRESSES_5 /* 5 */
1163} ucc_geth_num_of_station_addresses_e; 1163};
1164
1165typedef u8 enet_addr_t[ENET_NUM_OCTETS_PER_ADDRESS];
1166 1164
1167/* UCC GETH 82xx Ethernet Address Container */ 1165/* UCC GETH 82xx Ethernet Address Container */
1168typedef struct enet_addr_container { 1166struct enet_addr_container {
1169 enet_addr_t address; /* ethernet address */ 1167 u8 address[ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */
1170 ucc_geth_enet_address_recognition_location_e location; /* location in 1168 enum ucc_geth_enet_address_recognition_location location; /* location in
1171 82xx address 1169 82xx address
1172 recognition 1170 recognition
1173 hardware */ 1171 hardware */
1174 struct list_head node; 1172 struct list_head node;
1175} enet_addr_container_t; 1173};
1176 1174
1177#define ENET_ADDR_CONT_ENTRY(ptr) list_entry(ptr, enet_addr_container_t, node) 1175#define ENET_ADDR_CONT_ENTRY(ptr) list_entry(ptr, struct enet_addr_container, node)
1178 1176
1179/* UCC GETH Termination Action Descriptor (TAD) structure. */ 1177/* UCC GETH Termination Action Descriptor (TAD) structure. */
1180typedef struct ucc_geth_tad_params { 1178struct ucc_geth_tad_params {
1181 int rx_non_dynamic_extended_features_mode; 1179 int rx_non_dynamic_extended_features_mode;
1182 int reject_frame; 1180 int reject_frame;
1183 ucc_geth_vlan_operation_tagged_e vtag_op; 1181 enum ucc_geth_vlan_operation_tagged vtag_op;
1184 ucc_geth_vlan_operation_non_tagged_e vnontag_op; 1182 enum ucc_geth_vlan_operation_non_tagged vnontag_op;
1185 ucc_geth_qos_mode_e rqos; 1183 enum ucc_geth_qos_mode rqos;
1186 u8 vpri; 1184 u8 vpri;
1187 u16 vid; 1185 u16 vid;
1188} ucc_geth_tad_params_t; 1186};
1189 1187
1190/* GETH protocol initialization structure */ 1188/* GETH protocol initialization structure */
1191typedef struct ucc_geth_info { 1189struct ucc_geth_info {
1192 ucc_fast_info_t uf_info; 1190 struct ucc_fast_info uf_info;
1193 u8 numQueuesTx; 1191 u8 numQueuesTx;
1194 u8 numQueuesRx; 1192 u8 numQueuesRx;
1195 int ipCheckSumCheck; 1193 int ipCheckSumCheck;
@@ -1251,51 +1249,51 @@ typedef struct ucc_geth_info {
1251 u8 iphoffset[TX_IP_OFFSET_ENTRY_MAX]; 1249 u8 iphoffset[TX_IP_OFFSET_ENTRY_MAX];
1252 u16 bdRingLenTx[NUM_TX_QUEUES]; 1250 u16 bdRingLenTx[NUM_TX_QUEUES];
1253 u16 bdRingLenRx[NUM_RX_QUEUES]; 1251 u16 bdRingLenRx[NUM_RX_QUEUES];
1254 enet_interface_e enet_interface; 1252 enum enet_interface enet_interface;
1255 ucc_geth_num_of_station_addresses_e numStationAddresses; 1253 enum ucc_geth_num_of_station_addresses numStationAddresses;
1256 qe_fltr_largest_external_tbl_lookup_key_size_e 1254 enum qe_fltr_largest_external_tbl_lookup_key_size
1257 largestexternallookupkeysize; 1255 largestexternallookupkeysize;
1258 ucc_geth_statistics_gathering_mode_e statisticsMode; 1256 enum ucc_geth_statistics_gathering_mode statisticsMode;
1259 ucc_geth_vlan_operation_tagged_e vlanOperationTagged; 1257 enum ucc_geth_vlan_operation_tagged vlanOperationTagged;
1260 ucc_geth_vlan_operation_non_tagged_e vlanOperationNonTagged; 1258 enum ucc_geth_vlan_operation_non_tagged vlanOperationNonTagged;
1261 ucc_geth_qos_mode_e rxQoSMode; 1259 enum ucc_geth_qos_mode rxQoSMode;
1262 ucc_geth_flow_control_mode_e aufc; 1260 enum ucc_geth_flow_control_mode aufc;
1263 ucc_geth_maccfg2_pad_and_crc_mode_e padAndCrc; 1261 enum ucc_geth_maccfg2_pad_and_crc_mode padAndCrc;
1264 ucc_geth_num_of_threads_e numThreadsTx; 1262 enum ucc_geth_num_of_threads numThreadsTx;
1265 ucc_geth_num_of_threads_e numThreadsRx; 1263 enum ucc_geth_num_of_threads numThreadsRx;
1266 qe_risc_allocation_e riscTx; 1264 enum qe_risc_allocation riscTx;
1267 qe_risc_allocation_e riscRx; 1265 enum qe_risc_allocation riscRx;
1268} ucc_geth_info_t; 1266};
1269 1267
1270/* structure representing UCC GETH */ 1268/* structure representing UCC GETH */
1271typedef struct ucc_geth_private { 1269struct ucc_geth_private {
1272 ucc_geth_info_t *ug_info; 1270 struct ucc_geth_info *ug_info;
1273 ucc_fast_private_t *uccf; 1271 struct ucc_fast_private *uccf;
1274 struct net_device *dev; 1272 struct net_device *dev;
1275 struct net_device_stats stats; /* linux network statistics */ 1273 struct net_device_stats stats; /* linux network statistics */
1276 ucc_geth_t *ug_regs; 1274 struct ucc_geth *ug_regs;
1277 ucc_geth_init_pram_t *p_init_enet_param_shadow; 1275 struct ucc_geth_init_pram *p_init_enet_param_shadow;
1278 ucc_geth_exf_global_pram_t *p_exf_glbl_param; 1276 struct ucc_geth_exf_global_pram *p_exf_glbl_param;
1279 u32 exf_glbl_param_offset; 1277 u32 exf_glbl_param_offset;
1280 ucc_geth_rx_global_pram_t *p_rx_glbl_pram; 1278 struct ucc_geth_rx_global_pram *p_rx_glbl_pram;
1281 u32 rx_glbl_pram_offset; 1279 u32 rx_glbl_pram_offset;
1282 ucc_geth_tx_global_pram_t *p_tx_glbl_pram; 1280 struct ucc_geth_tx_global_pram *p_tx_glbl_pram;
1283 u32 tx_glbl_pram_offset; 1281 u32 tx_glbl_pram_offset;
1284 ucc_geth_send_queue_mem_region_t *p_send_q_mem_reg; 1282 struct ucc_geth_send_queue_mem_region *p_send_q_mem_reg;
1285 u32 send_q_mem_reg_offset; 1283 u32 send_q_mem_reg_offset;
1286 ucc_geth_thread_data_tx_t *p_thread_data_tx; 1284 struct ucc_geth_thread_data_tx *p_thread_data_tx;
1287 u32 thread_dat_tx_offset; 1285 u32 thread_dat_tx_offset;
1288 ucc_geth_thread_data_rx_t *p_thread_data_rx; 1286 struct ucc_geth_thread_data_rx *p_thread_data_rx;
1289 u32 thread_dat_rx_offset; 1287 u32 thread_dat_rx_offset;
1290 ucc_geth_scheduler_t *p_scheduler; 1288 struct ucc_geth_scheduler *p_scheduler;
1291 u32 scheduler_offset; 1289 u32 scheduler_offset;
1292 ucc_geth_tx_firmware_statistics_pram_t *p_tx_fw_statistics_pram; 1290 struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram;
1293 u32 tx_fw_statistics_pram_offset; 1291 u32 tx_fw_statistics_pram_offset;
1294 ucc_geth_rx_firmware_statistics_pram_t *p_rx_fw_statistics_pram; 1292 struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram;
1295 u32 rx_fw_statistics_pram_offset; 1293 u32 rx_fw_statistics_pram_offset;
1296 ucc_geth_rx_interrupt_coalescing_table_t *p_rx_irq_coalescing_tbl; 1294 struct ucc_geth_rx_interrupt_coalescing_table *p_rx_irq_coalescing_tbl;
1297 u32 rx_irq_coalescing_tbl_offset; 1295 u32 rx_irq_coalescing_tbl_offset;
1298 ucc_geth_rx_bd_queues_entry_t *p_rx_bd_qs_tbl; 1296 struct ucc_geth_rx_bd_queues_entry *p_rx_bd_qs_tbl;
1299 u32 rx_bd_qs_tbl_offset; 1297 u32 rx_bd_qs_tbl_offset;
1300 u8 *p_tx_bd_ring[NUM_TX_QUEUES]; 1298 u8 *p_tx_bd_ring[NUM_TX_QUEUES];
1301 u32 tx_bd_ring_offset[NUM_TX_QUEUES]; 1299 u32 tx_bd_ring_offset[NUM_TX_QUEUES];
@@ -1308,7 +1306,7 @@ typedef struct ucc_geth_private {
1308 u16 cpucount[NUM_TX_QUEUES]; 1306 u16 cpucount[NUM_TX_QUEUES];
1309 volatile u16 *p_cpucount[NUM_TX_QUEUES]; 1307 volatile u16 *p_cpucount[NUM_TX_QUEUES];
1310 int indAddrRegUsed[NUM_OF_PADDRS]; 1308 int indAddrRegUsed[NUM_OF_PADDRS];
1311 enet_addr_t paddr[NUM_OF_PADDRS]; 1309 u8 paddr[NUM_OF_PADDRS][ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */
1312 u8 numGroupAddrInHash; 1310 u8 numGroupAddrInHash;
1313 u8 numIndAddrInHash; 1311 u8 numIndAddrInHash;
1314 u8 numIndAddrInReg; 1312 u8 numIndAddrInReg;
@@ -1334,6 +1332,6 @@ typedef struct ucc_geth_private {
1334 int oldspeed; 1332 int oldspeed;
1335 int oldduplex; 1333 int oldduplex;
1336 int oldlink; 1334 int oldlink;
1337} ucc_geth_private_t; 1335};
1338 1336
1339#endif /* __UCC_GETH_H__ */ 1337#endif /* __UCC_GETH_H__ */
diff --git a/drivers/net/ucc_geth_phy.c b/drivers/net/ucc_geth_phy.c
index 67260eb3188a..5360ec05eaa3 100644
--- a/drivers/net/ucc_geth_phy.c
+++ b/drivers/net/ucc_geth_phy.c
@@ -42,7 +42,6 @@
42 42
43#include "ucc_geth.h" 43#include "ucc_geth.h"
44#include "ucc_geth_phy.h" 44#include "ucc_geth_phy.h"
45#include <platforms/83xx/mpc8360e_pb.h>
46 45
47#define ugphy_printk(level, format, arg...) \ 46#define ugphy_printk(level, format, arg...) \
48 printk(level format "\n", ## arg) 47 printk(level format "\n", ## arg)
@@ -72,16 +71,14 @@ static int genmii_read_status(struct ugeth_mii_info *mii_info);
72u16 phy_read(struct ugeth_mii_info *mii_info, u16 regnum); 71u16 phy_read(struct ugeth_mii_info *mii_info, u16 regnum);
73void phy_write(struct ugeth_mii_info *mii_info, u16 regnum, u16 val); 72void phy_write(struct ugeth_mii_info *mii_info, u16 regnum, u16 val);
74 73
75static u8 *bcsr_regs = NULL;
76
77/* Write value to the PHY for this device to the register at regnum, */ 74/* Write value to the PHY for this device to the register at regnum, */
78/* waiting until the write is done before it returns. All PHY */ 75/* waiting until the write is done before it returns. All PHY */
79/* configuration has to be done through the TSEC1 MIIM regs */ 76/* configuration has to be done through the TSEC1 MIIM regs */
80void write_phy_reg(struct net_device *dev, int mii_id, int regnum, int value) 77void write_phy_reg(struct net_device *dev, int mii_id, int regnum, int value)
81{ 78{
82 ucc_geth_private_t *ugeth = netdev_priv(dev); 79 struct ucc_geth_private *ugeth = netdev_priv(dev);
83 ucc_mii_mng_t *mii_regs; 80 struct ucc_mii_mng *mii_regs;
84 enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum; 81 enum enet_tbi_mii_reg mii_reg = (enum enet_tbi_mii_reg) regnum;
85 u32 tmp_reg; 82 u32 tmp_reg;
86 83
87 ugphy_vdbg("%s: IN", __FUNCTION__); 84 ugphy_vdbg("%s: IN", __FUNCTION__);
@@ -116,9 +113,9 @@ void write_phy_reg(struct net_device *dev, int mii_id, int regnum, int value)
116/* configuration has to be done through the TSEC1 MIIM regs */ 113/* configuration has to be done through the TSEC1 MIIM regs */
117int read_phy_reg(struct net_device *dev, int mii_id, int regnum) 114int read_phy_reg(struct net_device *dev, int mii_id, int regnum)
118{ 115{
119 ucc_geth_private_t *ugeth = netdev_priv(dev); 116 struct ucc_geth_private *ugeth = netdev_priv(dev);
120 ucc_mii_mng_t *mii_regs; 117 struct ucc_mii_mng *mii_regs;
121 enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum; 118 enum enet_tbi_mii_reg mii_reg = (enum enet_tbi_mii_reg) regnum;
122 u32 tmp_reg; 119 u32 tmp_reg;
123 u16 value; 120 u16 value;
124 121
@@ -634,11 +631,6 @@ static void dm9161_close(struct ugeth_mii_info *mii_info)
634 631
635static int dm9161_ack_interrupt(struct ugeth_mii_info *mii_info) 632static int dm9161_ack_interrupt(struct ugeth_mii_info *mii_info)
636{ 633{
637/* FIXME: This lines are for BUG fixing in the mpc8325.
638Remove this from here when it's fixed */
639 if (bcsr_regs == NULL)
640 bcsr_regs = (u8 *) ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
641 bcsr_regs[14] |= 0x40;
642 ugphy_vdbg("%s: IN", __FUNCTION__); 634 ugphy_vdbg("%s: IN", __FUNCTION__);
643 635
644 /* Clear the interrupts by reading the reg */ 636 /* Clear the interrupts by reading the reg */
@@ -650,12 +642,6 @@ Remove this from here when it's fixed */
650 642
651static int dm9161_config_intr(struct ugeth_mii_info *mii_info) 643static int dm9161_config_intr(struct ugeth_mii_info *mii_info)
652{ 644{
653/* FIXME: This lines are for BUG fixing in the mpc8325.
654Remove this from here when it's fixed */
655 if (bcsr_regs == NULL) {
656 bcsr_regs = (u8 *) ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
657 bcsr_regs[14] &= ~0x40;
658 }
659 ugphy_vdbg("%s: IN", __FUNCTION__); 645 ugphy_vdbg("%s: IN", __FUNCTION__);
660 646
661 if (mii_info->interrupts == MII_INTERRUPT_ENABLED) 647 if (mii_info->interrupts == MII_INTERRUPT_ENABLED)
diff --git a/drivers/net/ucc_geth_phy.h b/drivers/net/ucc_geth_phy.h
index 2f98b8f1bb0a..f5740783670f 100644
--- a/drivers/net/ucc_geth_phy.h
+++ b/drivers/net/ucc_geth_phy.h
@@ -126,7 +126,7 @@ struct ugeth_mii_info {
126 /* And management functions */ 126 /* And management functions */
127 struct phy_info *phyinfo; 127 struct phy_info *phyinfo;
128 128
129 ucc_mii_mng_t *mii_regs; 129 struct ucc_mii_mng *mii_regs;
130 130
131 /* forced speed & duplex (no autoneg) 131 /* forced speed & duplex (no autoneg)
132 * partner speed & duplex & pause (autoneg) 132 * partner speed & duplex & pause (autoneg)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-17 21:21:55 -0500