3 files changed, 12 insertions, 4 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index a20df9bf8ab0..71fdbd4f4ac6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1749,6 +1749,13 @@ M:	Nicolas Ferre <nicolas.ferre@atmel.com>
 S:      Supported
 F:      drivers/spi/spi-atmel.*
 
+ATMEL SSC DRIVER
+M:      Bo Shen <voice.shen@atmel.com>
+L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:      Supported
+F:      drivers/misc/atmel-ssc.c
+F:      include/linux/atmel-ssc.h
+
 ATMEL Timer Counter (TC) AND CLOCKSOURCE DRIVERS
 M:      Nicolas Ferre <nicolas.ferre@atmel.com>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index d68b3c4862bc..51416c7d0625 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -122,9 +122,10 @@
                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
                                         clocks = <&main>;
                                         reg = <1>;
-                                        atmel,clk-input-range = <1000000 5000000>;
+                                        atmel,clk-input-range = <1000000 32000000>;
                                         #atmel,pll-clk-output-range-cells = <4>;
-                                        atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
+                                        atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+                                                                <190000000 240000000 2 1>;
                                 };
 
                                 mck: masterck {
diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c
index 3611806c9cfd..3cb36693343a 100644
--- a/drivers/power/reset/at91-reset.c
+++ b/drivers/power/reset/at91-reset.c
@@ -100,11 +100,11 @@ static void at91sam9g45_restart(enum reboot_mode mode, const char *cmd)
                 /* Disable SDRAM0 accesses */
                 "1:     str     %3, [%0, #" __stringify(AT91_DDRSDRC_RTR) "]\n\t"
                 /* Power down SDRAM0 */
-                "       str     %4, [%0, #" __stringify(AT91_DDRSDRC_RTR) "]\n\t"
+                "       str     %4, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
                 /* Disable SDRAM1 accesses */
                 "       strne   %3, [%1, #" __stringify(AT91_DDRSDRC_RTR) "]\n\t"
                 /* Power down SDRAM1 */
-                "       strne   %4, [%1, #" __stringify(AT91_DDRSDRC_RTR) "]\n\t"
+                "       strne   %4, [%1, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
                 /* Reset CPU */
                 "       str     %5, [%2, #" __stringify(AT91_RSTC_CR) "]\n\t"