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-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c23
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c21
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h3
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c4
4 files changed, 25 insertions, 26 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 408d6b053744..a8eda963f2bd 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -63,13 +63,11 @@ static enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
63 struct drm_encoder *encoder = &intel_encoder->base; 63 struct drm_encoder *encoder = &intel_encoder->base;
64 int type = intel_encoder->type; 64 int type = intel_encoder->type;
65 65
66 if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) { 66 if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP ||
67 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 67 type == INTEL_OUTPUT_HDMI) {
68 return intel_dp->port; 68 struct intel_digital_port *intel_dig_port =
69 69 enc_to_dig_port(encoder);
70 } else if (type == INTEL_OUTPUT_HDMI) { 70 return intel_dig_port->port;
71 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
72 return intel_hdmi->ddi_port;
73 71
74 } else if (type == INTEL_OUTPUT_ANALOG) { 72 } else if (type == INTEL_OUTPUT_ANALOG) {
75 return PORT_E; 73 return PORT_E;
@@ -925,11 +923,13 @@ void intel_ddi_enable_pipe_func(struct drm_crtc *crtc)
925 struct drm_i915_private *dev_priv = crtc->dev->dev_private; 923 struct drm_i915_private *dev_priv = crtc->dev->dev_private;
926 enum pipe pipe = intel_crtc->pipe; 924 enum pipe pipe = intel_crtc->pipe;
927 enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; 925 enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;
926 enum port port = intel_ddi_get_encoder_port(intel_encoder);
928 int type = intel_encoder->type; 927 int type = intel_encoder->type;
929 uint32_t temp; 928 uint32_t temp;
930 929
931 /* Enable TRANS_DDI_FUNC_CTL for the pipe to work in HDMI mode */ 930 /* Enable TRANS_DDI_FUNC_CTL for the pipe to work in HDMI mode */
932 temp = TRANS_DDI_FUNC_ENABLE; 931 temp = TRANS_DDI_FUNC_ENABLE;
932 temp |= TRANS_DDI_SELECT_PORT(port);
933 933
934 switch (intel_crtc->bpp) { 934 switch (intel_crtc->bpp) {
935 case 18: 935 case 18:
@@ -979,18 +979,14 @@ void intel_ddi_enable_pipe_func(struct drm_crtc *crtc)
979 else 979 else
980 temp |= TRANS_DDI_MODE_SELECT_DVI; 980 temp |= TRANS_DDI_MODE_SELECT_DVI;
981 981
982 temp |= TRANS_DDI_SELECT_PORT(intel_hdmi->ddi_port);
983
984 } else if (type == INTEL_OUTPUT_ANALOG) { 982 } else if (type == INTEL_OUTPUT_ANALOG) {
985 temp |= TRANS_DDI_MODE_SELECT_FDI; 983 temp |= TRANS_DDI_MODE_SELECT_FDI;
986 temp |= TRANS_DDI_SELECT_PORT(PORT_E);
987 984
988 } else if (type == INTEL_OUTPUT_DISPLAYPORT || 985 } else if (type == INTEL_OUTPUT_DISPLAYPORT ||
989 type == INTEL_OUTPUT_EDP) { 986 type == INTEL_OUTPUT_EDP) {
990 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 987 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
991 988
992 temp |= TRANS_DDI_MODE_SELECT_DP_SST; 989 temp |= TRANS_DDI_MODE_SELECT_DP_SST;
993 temp |= TRANS_DDI_SELECT_PORT(intel_dp->port);
994 990
995 switch (intel_dp->lane_count) { 991 switch (intel_dp->lane_count) {
996 case 1: 992 case 1:
@@ -1297,9 +1293,10 @@ void intel_ddi_pll_init(struct drm_device *dev)
1297 1293
1298void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder) 1294void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder)
1299{ 1295{
1300 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1296 struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
1297 struct intel_dp *intel_dp = &intel_dig_port->dp;
1301 struct drm_i915_private *dev_priv = encoder->dev->dev_private; 1298 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
1302 enum port port = intel_dp->port; 1299 enum port port = intel_dig_port->port;
1303 bool wait; 1300 bool wait;
1304 uint32_t val; 1301 uint32_t val;
1305 1302
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 4b5bf5795dac..3aa27b189bb8 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -336,7 +336,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
336 uint8_t *recv, int recv_size) 336 uint8_t *recv, int recv_size)
337{ 337{
338 uint32_t output_reg = intel_dp->output_reg; 338 uint32_t output_reg = intel_dp->output_reg;
339 struct drm_device *dev = intel_dp_to_dev(intel_dp); 339 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
340 struct drm_device *dev = intel_dig_port->base.base.dev;
340 struct drm_i915_private *dev_priv = dev->dev_private; 341 struct drm_i915_private *dev_priv = dev->dev_private;
341 uint32_t ch_ctl = output_reg + 0x10; 342 uint32_t ch_ctl = output_reg + 0x10;
342 uint32_t ch_data = ch_ctl + 4; 343 uint32_t ch_data = ch_ctl + 4;
@@ -347,7 +348,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
347 int try, precharge; 348 int try, precharge;
348 349
349 if (IS_HASWELL(dev)) { 350 if (IS_HASWELL(dev)) {
350 switch (intel_dp->port) { 351 switch (intel_dig_port->port) {
351 case PORT_A: 352 case PORT_A:
352 ch_ctl = DPA_AUX_CH_CTL; 353 ch_ctl = DPA_AUX_CH_CTL;
353 ch_data = DPA_AUX_CH_DATA1; 354 ch_data = DPA_AUX_CH_DATA1;
@@ -1677,13 +1678,15 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
1677 uint32_t dp_reg_value, 1678 uint32_t dp_reg_value,
1678 uint8_t dp_train_pat) 1679 uint8_t dp_train_pat)
1679{ 1680{
1680 struct drm_device *dev = intel_dp_to_dev(intel_dp); 1681 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
1682 struct drm_device *dev = intel_dig_port->base.base.dev;
1681 struct drm_i915_private *dev_priv = dev->dev_private; 1683 struct drm_i915_private *dev_priv = dev->dev_private;
1684 enum port port = intel_dig_port->port;
1682 int ret; 1685 int ret;
1683 uint32_t temp; 1686 uint32_t temp;
1684 1687
1685 if (IS_HASWELL(dev)) { 1688 if (IS_HASWELL(dev)) {
1686 temp = I915_READ(DP_TP_CTL(intel_dp->port)); 1689 temp = I915_READ(DP_TP_CTL(port));
1687 1690
1688 if (dp_train_pat & DP_LINK_SCRAMBLING_DISABLE) 1691 if (dp_train_pat & DP_LINK_SCRAMBLING_DISABLE)
1689 temp |= DP_TP_CTL_SCRAMBLE_DISABLE; 1692 temp |= DP_TP_CTL_SCRAMBLE_DISABLE;
@@ -1694,9 +1697,9 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
1694 switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) { 1697 switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) {
1695 case DP_TRAINING_PATTERN_DISABLE: 1698 case DP_TRAINING_PATTERN_DISABLE:
1696 temp |= DP_TP_CTL_LINK_TRAIN_IDLE; 1699 temp |= DP_TP_CTL_LINK_TRAIN_IDLE;
1697 I915_WRITE(DP_TP_CTL(intel_dp->port), temp); 1700 I915_WRITE(DP_TP_CTL(port), temp);
1698 1701
1699 if (wait_for((I915_READ(DP_TP_STATUS(intel_dp->port)) & 1702 if (wait_for((I915_READ(DP_TP_STATUS(port)) &
1700 DP_TP_STATUS_IDLE_DONE), 1)) 1703 DP_TP_STATUS_IDLE_DONE), 1))
1701 DRM_ERROR("Timed out waiting for DP idle patterns\n"); 1704 DRM_ERROR("Timed out waiting for DP idle patterns\n");
1702 1705
@@ -1714,7 +1717,7 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
1714 temp |= DP_TP_CTL_LINK_TRAIN_PAT3; 1717 temp |= DP_TP_CTL_LINK_TRAIN_PAT3;
1715 break; 1718 break;
1716 } 1719 }
1717 I915_WRITE(DP_TP_CTL(intel_dp->port), temp); 1720 I915_WRITE(DP_TP_CTL(port), temp);
1718 1721
1719 } else if (HAS_PCH_CPT(dev) && 1722 } else if (HAS_PCH_CPT(dev) &&
1720 (IS_GEN7(dev) || !is_cpu_edp(intel_dp))) { 1723 (IS_GEN7(dev) || !is_cpu_edp(intel_dp))) {
@@ -2697,7 +2700,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
2697 struct drm_device *dev = intel_encoder->base.dev; 2700 struct drm_device *dev = intel_encoder->base.dev;
2698 struct drm_i915_private *dev_priv = dev->dev_private; 2701 struct drm_i915_private *dev_priv = dev->dev_private;
2699 struct drm_display_mode *fixed_mode = NULL; 2702 struct drm_display_mode *fixed_mode = NULL;
2700 enum port port = intel_dp->port; 2703 enum port port = intel_dig_port->port;
2701 const char *name = NULL; 2704 const char *name = NULL;
2702 int type; 2705 int type;
2703 2706
@@ -2883,7 +2886,7 @@ intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
2883 intel_encoder->get_hw_state = intel_dp_get_hw_state; 2886 intel_encoder->get_hw_state = intel_dp_get_hw_state;
2884 } 2887 }
2885 2888
2886 intel_dig_port->dp.port = port; 2889 intel_dig_port->port = port;
2887 intel_dig_port->dp.output_reg = output_reg; 2890 intel_dig_port->dp.output_reg = output_reg;
2888 2891
2889 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 2892 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 79aa0448370c..cb223594a293 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -333,7 +333,6 @@ struct dip_infoframe {
333struct intel_hdmi { 333struct intel_hdmi {
334 u32 sdvox_reg; 334 u32 sdvox_reg;
335 int ddc_bus; 335 int ddc_bus;
336 int ddi_port;
337 uint32_t color_range; 336 uint32_t color_range;
338 bool has_hdmi_sink; 337 bool has_hdmi_sink;
339 bool has_audio; 338 bool has_audio;
@@ -353,7 +352,6 @@ struct intel_dp {
353 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]; 352 uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE];
354 bool has_audio; 353 bool has_audio;
355 enum hdmi_force_audio force_audio; 354 enum hdmi_force_audio force_audio;
356 enum port port;
357 uint32_t color_range; 355 uint32_t color_range;
358 uint8_t link_bw; 356 uint8_t link_bw;
359 uint8_t lane_count; 357 uint8_t lane_count;
@@ -375,6 +373,7 @@ struct intel_dp {
375 373
376struct intel_digital_port { 374struct intel_digital_port {
377 struct intel_encoder base; 375 struct intel_encoder base;
376 enum port port;
378 struct intel_dp dp; 377 struct intel_dp dp;
379 struct intel_hdmi hdmi; 378 struct intel_hdmi hdmi;
380}; 379};
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index c0aadc1436ce..3c42caab8d23 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -971,7 +971,7 @@ static void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
971 struct intel_encoder *intel_encoder = &intel_dig_port->base; 971 struct intel_encoder *intel_encoder = &intel_dig_port->base;
972 struct drm_device *dev = intel_encoder->base.dev; 972 struct drm_device *dev = intel_encoder->base.dev;
973 struct drm_i915_private *dev_priv = dev->dev_private; 973 struct drm_i915_private *dev_priv = dev->dev_private;
974 enum port port = intel_hdmi->ddi_port; 974 enum port port = intel_dig_port->port;
975 975
976 drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, 976 drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
977 DRM_MODE_CONNECTOR_HDMIA); 977 DRM_MODE_CONNECTOR_HDMIA);
@@ -1076,7 +1076,7 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg, enum port port)
1076 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 1076 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1077 intel_encoder->cloneable = false; 1077 intel_encoder->cloneable = false;
1078 1078
1079 intel_dig_port->hdmi.ddi_port = port; 1079 intel_dig_port->port = port;
1080 intel_dig_port->hdmi.sdvox_reg = sdvox_reg; 1080 intel_dig_port->hdmi.sdvox_reg = sdvox_reg;
1081 intel_dig_port->dp.output_reg = 0; 1081 intel_dig_port->dp.output_reg = 0;
1082 1082