diff options
-rw-r--r-- | MAINTAINERS | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_i2c.c | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/mgag200/mgag200_mode.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/core/object.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/include/subdev/therm.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/therm/base.c | 18 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/therm/ic.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c | 67 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/therm/priv.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/therm/temp.c | 30 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_pm.c | 44 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_display.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 33 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_benchmark.c | 21 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 1 | ||||
-rw-r--r-- | include/drm/drm_pciids.h | 13 |
19 files changed, 204 insertions, 91 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index fb89be1281c6..ce424d7520f5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -2623,7 +2623,7 @@ F: include/uapi/drm/ | |||
2623 | 2623 | ||
2624 | INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets) | 2624 | INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets) |
2625 | M: Daniel Vetter <daniel.vetter@ffwll.ch> | 2625 | M: Daniel Vetter <daniel.vetter@ffwll.ch> |
2626 | L: intel-gfx@lists.freedesktop.org (subscribers-only) | 2626 | L: intel-gfx@lists.freedesktop.org |
2627 | L: dri-devel@lists.freedesktop.org | 2627 | L: dri-devel@lists.freedesktop.org |
2628 | T: git git://people.freedesktop.org/~danvet/drm-intel | 2628 | T: git git://people.freedesktop.org/~danvet/drm-intel |
2629 | S: Supported | 2629 | S: Supported |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index aae31489c893..7299ea45dd03 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -103,7 +103,7 @@ static const char *cache_level_str(int type) | |||
103 | static void | 103 | static void |
104 | describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) | 104 | describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) |
105 | { | 105 | { |
106 | seq_printf(m, "%p: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s", | 106 | seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s", |
107 | &obj->base, | 107 | &obj->base, |
108 | get_pin_flag(obj), | 108 | get_pin_flag(obj), |
109 | get_tiling_flag(obj), | 109 | get_tiling_flag(obj), |
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 2f2daebd0eef..3b11ab0fbc96 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
@@ -732,6 +732,8 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec, | |||
732 | int count) | 732 | int count) |
733 | { | 733 | { |
734 | int i; | 734 | int i; |
735 | int relocs_total = 0; | ||
736 | int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry); | ||
735 | 737 | ||
736 | for (i = 0; i < count; i++) { | 738 | for (i = 0; i < count; i++) { |
737 | char __user *ptr = (char __user *)(uintptr_t)exec[i].relocs_ptr; | 739 | char __user *ptr = (char __user *)(uintptr_t)exec[i].relocs_ptr; |
@@ -740,10 +742,13 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec, | |||
740 | if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS) | 742 | if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS) |
741 | return -EINVAL; | 743 | return -EINVAL; |
742 | 744 | ||
743 | /* First check for malicious input causing overflow */ | 745 | /* First check for malicious input causing overflow in |
744 | if (exec[i].relocation_count > | 746 | * the worst case where we need to allocate the entire |
745 | INT_MAX / sizeof(struct drm_i915_gem_relocation_entry)) | 747 | * relocation tree as a single array. |
748 | */ | ||
749 | if (exec[i].relocation_count > relocs_max - relocs_total) | ||
746 | return -EINVAL; | 750 | return -EINVAL; |
751 | relocs_total += exec[i].relocation_count; | ||
747 | 752 | ||
748 | length = exec[i].relocation_count * | 753 | length = exec[i].relocation_count * |
749 | sizeof(struct drm_i915_gem_relocation_entry); | 754 | sizeof(struct drm_i915_gem_relocation_entry); |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6f728e5ee793..d7d4afe01341 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -820,6 +820,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
820 | struct intel_link_m_n m_n; | 820 | struct intel_link_m_n m_n; |
821 | int pipe = intel_crtc->pipe; | 821 | int pipe = intel_crtc->pipe; |
822 | enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; | 822 | enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; |
823 | int target_clock; | ||
823 | 824 | ||
824 | /* | 825 | /* |
825 | * Find the lane count in the intel_encoder private | 826 | * Find the lane count in the intel_encoder private |
@@ -835,13 +836,22 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
835 | } | 836 | } |
836 | } | 837 | } |
837 | 838 | ||
839 | target_clock = mode->clock; | ||
840 | for_each_encoder_on_crtc(dev, crtc, intel_encoder) { | ||
841 | if (intel_encoder->type == INTEL_OUTPUT_EDP) { | ||
842 | target_clock = intel_edp_target_clock(intel_encoder, | ||
843 | mode); | ||
844 | break; | ||
845 | } | ||
846 | } | ||
847 | |||
838 | /* | 848 | /* |
839 | * Compute the GMCH and Link ratios. The '3' here is | 849 | * Compute the GMCH and Link ratios. The '3' here is |
840 | * the number of bytes_per_pixel post-LUT, which we always | 850 | * the number of bytes_per_pixel post-LUT, which we always |
841 | * set up for 8-bits of R/G/B, or 3 bytes total. | 851 | * set up for 8-bits of R/G/B, or 3 bytes total. |
842 | */ | 852 | */ |
843 | intel_link_compute_m_n(intel_crtc->bpp, lane_count, | 853 | intel_link_compute_m_n(intel_crtc->bpp, lane_count, |
844 | mode->clock, adjusted_mode->clock, &m_n); | 854 | target_clock, adjusted_mode->clock, &m_n); |
845 | 855 | ||
846 | if (IS_HASWELL(dev)) { | 856 | if (IS_HASWELL(dev)) { |
847 | I915_WRITE(PIPE_DATA_M1(cpu_transcoder), | 857 | I915_WRITE(PIPE_DATA_M1(cpu_transcoder), |
@@ -1930,7 +1940,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) | |||
1930 | for (i = 0; i < intel_dp->lane_count; i++) | 1940 | for (i = 0; i < intel_dp->lane_count; i++) |
1931 | if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) | 1941 | if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) |
1932 | break; | 1942 | break; |
1933 | if (i == intel_dp->lane_count && voltage_tries == 5) { | 1943 | if (i == intel_dp->lane_count) { |
1934 | ++loop_tries; | 1944 | ++loop_tries; |
1935 | if (loop_tries == 5) { | 1945 | if (loop_tries == 5) { |
1936 | DRM_DEBUG_KMS("too many full retries, give up\n"); | 1946 | DRM_DEBUG_KMS("too many full retries, give up\n"); |
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index acf8aec9ada7..ef4744e1bf0b 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c | |||
@@ -203,7 +203,13 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin) | |||
203 | algo->data = bus; | 203 | algo->data = bus; |
204 | } | 204 | } |
205 | 205 | ||
206 | #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 4) | 206 | /* |
207 | * gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI | ||
208 | * mode. This results in spurious interrupt warnings if the legacy irq no. is | ||
209 | * shared with another device. The kernel then disables that interrupt source | ||
210 | * and so prevents the other device from working properly. | ||
211 | */ | ||
212 | #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) | ||
207 | static int | 213 | static int |
208 | gmbus_wait_hw_status(struct drm_i915_private *dev_priv, | 214 | gmbus_wait_hw_status(struct drm_i915_private *dev_priv, |
209 | u32 gmbus2_status, | 215 | u32 gmbus2_status, |
@@ -214,6 +220,9 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv, | |||
214 | u32 gmbus2 = 0; | 220 | u32 gmbus2 = 0; |
215 | DEFINE_WAIT(wait); | 221 | DEFINE_WAIT(wait); |
216 | 222 | ||
223 | if (!HAS_GMBUS_IRQ(dev_priv->dev)) | ||
224 | gmbus4_irq_en = 0; | ||
225 | |||
217 | /* Important: The hw handles only the first bit, so set only one! Since | 226 | /* Important: The hw handles only the first bit, so set only one! Since |
218 | * we also need to check for NAKs besides the hw ready/idle signal, we | 227 | * we also need to check for NAKs besides the hw ready/idle signal, we |
219 | * need to wake up periodically and check that ourselves. */ | 228 | * need to wake up periodically and check that ourselves. */ |
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index a274b9906ef8..fe22bb780e1d 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c | |||
@@ -382,19 +382,19 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) | |||
382 | m = n = p = 0; | 382 | m = n = p = 0; |
383 | vcomax = 800000; | 383 | vcomax = 800000; |
384 | vcomin = 400000; | 384 | vcomin = 400000; |
385 | pllreffreq = 3333; | 385 | pllreffreq = 33333; |
386 | 386 | ||
387 | delta = 0xffffffff; | 387 | delta = 0xffffffff; |
388 | permitteddelta = clock * 5 / 1000; | 388 | permitteddelta = clock * 5 / 1000; |
389 | 389 | ||
390 | for (testp = 16; testp > 0; testp--) { | 390 | for (testp = 16; testp > 0; testp >>= 1) { |
391 | if (clock * testp > vcomax) | 391 | if (clock * testp > vcomax) |
392 | continue; | 392 | continue; |
393 | if (clock * testp < vcomin) | 393 | if (clock * testp < vcomin) |
394 | continue; | 394 | continue; |
395 | 395 | ||
396 | for (testm = 1; testm < 33; testm++) { | 396 | for (testm = 1; testm < 33; testm++) { |
397 | for (testn = 1; testn < 257; testn++) { | 397 | for (testn = 17; testn < 257; testn++) { |
398 | computed = (pllreffreq * testn) / | 398 | computed = (pllreffreq * testn) / |
399 | (testm * testp); | 399 | (testm * testp); |
400 | if (computed > clock) | 400 | if (computed > clock) |
@@ -404,11 +404,11 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) | |||
404 | if (tmpdelta < delta) { | 404 | if (tmpdelta < delta) { |
405 | delta = tmpdelta; | 405 | delta = tmpdelta; |
406 | n = testn - 1; | 406 | n = testn - 1; |
407 | m = (testm - 1) | ((n >> 1) & 0x80); | 407 | m = (testm - 1); |
408 | p = testp - 1; | 408 | p = testp - 1; |
409 | } | 409 | } |
410 | if ((clock * testp) >= 600000) | 410 | if ((clock * testp) >= 600000) |
411 | p |= 80; | 411 | p |= 0x80; |
412 | } | 412 | } |
413 | } | 413 | } |
414 | } | 414 | } |
diff --git a/drivers/gpu/drm/nouveau/core/core/object.c b/drivers/gpu/drm/nouveau/core/core/object.c index 0daab62ea14c..3b2e7b6304d3 100644 --- a/drivers/gpu/drm/nouveau/core/core/object.c +++ b/drivers/gpu/drm/nouveau/core/core/object.c | |||
@@ -278,7 +278,6 @@ nouveau_object_del(struct nouveau_object *client, u32 _parent, u32 _handle) | |||
278 | struct nouveau_object *parent = NULL; | 278 | struct nouveau_object *parent = NULL; |
279 | struct nouveau_object *namedb = NULL; | 279 | struct nouveau_object *namedb = NULL; |
280 | struct nouveau_handle *handle = NULL; | 280 | struct nouveau_handle *handle = NULL; |
281 | int ret = -EINVAL; | ||
282 | 281 | ||
283 | parent = nouveau_handle_ref(client, _parent); | 282 | parent = nouveau_handle_ref(client, _parent); |
284 | if (!parent) | 283 | if (!parent) |
@@ -295,7 +294,7 @@ nouveau_object_del(struct nouveau_object *client, u32 _parent, u32 _handle) | |||
295 | } | 294 | } |
296 | 295 | ||
297 | nouveau_object_ref(NULL, &parent); | 296 | nouveau_object_ref(NULL, &parent); |
298 | return ret; | 297 | return handle ? 0 : -EINVAL; |
299 | } | 298 | } |
300 | 299 | ||
301 | int | 300 | int |
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/therm.h b/drivers/gpu/drm/nouveau/core/include/subdev/therm.h index 6b17b614629f..0b20fc0d19c1 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/therm.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/therm.h | |||
@@ -4,7 +4,7 @@ | |||
4 | #include <core/device.h> | 4 | #include <core/device.h> |
5 | #include <core/subdev.h> | 5 | #include <core/subdev.h> |
6 | 6 | ||
7 | enum nouveau_therm_mode { | 7 | enum nouveau_therm_fan_mode { |
8 | NOUVEAU_THERM_CTRL_NONE = 0, | 8 | NOUVEAU_THERM_CTRL_NONE = 0, |
9 | NOUVEAU_THERM_CTRL_MANUAL = 1, | 9 | NOUVEAU_THERM_CTRL_MANUAL = 1, |
10 | NOUVEAU_THERM_CTRL_AUTO = 2, | 10 | NOUVEAU_THERM_CTRL_AUTO = 2, |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/base.c b/drivers/gpu/drm/nouveau/core/subdev/therm/base.c index f794dc89a3b2..a00a5a76e2d6 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/base.c | |||
@@ -134,7 +134,7 @@ nouveau_therm_alarm(struct nouveau_alarm *alarm) | |||
134 | } | 134 | } |
135 | 135 | ||
136 | int | 136 | int |
137 | nouveau_therm_mode(struct nouveau_therm *therm, int mode) | 137 | nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode) |
138 | { | 138 | { |
139 | struct nouveau_therm_priv *priv = (void *)therm; | 139 | struct nouveau_therm_priv *priv = (void *)therm; |
140 | struct nouveau_device *device = nv_device(therm); | 140 | struct nouveau_device *device = nv_device(therm); |
@@ -149,10 +149,15 @@ nouveau_therm_mode(struct nouveau_therm *therm, int mode) | |||
149 | (mode != NOUVEAU_THERM_CTRL_NONE && device->card_type >= NV_C0)) | 149 | (mode != NOUVEAU_THERM_CTRL_NONE && device->card_type >= NV_C0)) |
150 | return -EINVAL; | 150 | return -EINVAL; |
151 | 151 | ||
152 | /* do not allow automatic fan management if the thermal sensor is | ||
153 | * not available */ | ||
154 | if (priv->mode == 2 && therm->temp_get(therm) < 0) | ||
155 | return -EINVAL; | ||
156 | |||
152 | if (priv->mode == mode) | 157 | if (priv->mode == mode) |
153 | return 0; | 158 | return 0; |
154 | 159 | ||
155 | nv_info(therm, "Thermal management: %s\n", name[mode]); | 160 | nv_info(therm, "fan management: %s\n", name[mode]); |
156 | nouveau_therm_update(therm, mode); | 161 | nouveau_therm_update(therm, mode); |
157 | return 0; | 162 | return 0; |
158 | } | 163 | } |
@@ -213,7 +218,7 @@ nouveau_therm_attr_set(struct nouveau_therm *therm, | |||
213 | priv->fan->bios.max_duty = value; | 218 | priv->fan->bios.max_duty = value; |
214 | return 0; | 219 | return 0; |
215 | case NOUVEAU_THERM_ATTR_FAN_MODE: | 220 | case NOUVEAU_THERM_ATTR_FAN_MODE: |
216 | return nouveau_therm_mode(therm, value); | 221 | return nouveau_therm_fan_mode(therm, value); |
217 | case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST: | 222 | case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST: |
218 | priv->bios_sensor.thrs_fan_boost.temp = value; | 223 | priv->bios_sensor.thrs_fan_boost.temp = value; |
219 | priv->sensor.program_alarms(therm); | 224 | priv->sensor.program_alarms(therm); |
@@ -263,7 +268,7 @@ _nouveau_therm_init(struct nouveau_object *object) | |||
263 | return ret; | 268 | return ret; |
264 | 269 | ||
265 | if (priv->suspend >= 0) | 270 | if (priv->suspend >= 0) |
266 | nouveau_therm_mode(therm, priv->mode); | 271 | nouveau_therm_fan_mode(therm, priv->mode); |
267 | priv->sensor.program_alarms(therm); | 272 | priv->sensor.program_alarms(therm); |
268 | return 0; | 273 | return 0; |
269 | } | 274 | } |
@@ -313,11 +318,12 @@ nouveau_therm_create_(struct nouveau_object *parent, | |||
313 | int | 318 | int |
314 | nouveau_therm_preinit(struct nouveau_therm *therm) | 319 | nouveau_therm_preinit(struct nouveau_therm *therm) |
315 | { | 320 | { |
316 | nouveau_therm_ic_ctor(therm); | ||
317 | nouveau_therm_sensor_ctor(therm); | 321 | nouveau_therm_sensor_ctor(therm); |
322 | nouveau_therm_ic_ctor(therm); | ||
318 | nouveau_therm_fan_ctor(therm); | 323 | nouveau_therm_fan_ctor(therm); |
319 | 324 | ||
320 | nouveau_therm_mode(therm, NOUVEAU_THERM_CTRL_NONE); | 325 | nouveau_therm_fan_mode(therm, NOUVEAU_THERM_CTRL_NONE); |
326 | nouveau_therm_sensor_preinit(therm); | ||
321 | return 0; | 327 | return 0; |
322 | } | 328 | } |
323 | 329 | ||
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c b/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c index e24090bac195..8b3adec5fbb1 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c | |||
@@ -32,6 +32,7 @@ probe_monitoring_device(struct nouveau_i2c_port *i2c, | |||
32 | struct i2c_board_info *info) | 32 | struct i2c_board_info *info) |
33 | { | 33 | { |
34 | struct nouveau_therm_priv *priv = (void *)nouveau_therm(i2c); | 34 | struct nouveau_therm_priv *priv = (void *)nouveau_therm(i2c); |
35 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | ||
35 | struct i2c_client *client; | 36 | struct i2c_client *client; |
36 | 37 | ||
37 | request_module("%s%s", I2C_MODULE_PREFIX, info->type); | 38 | request_module("%s%s", I2C_MODULE_PREFIX, info->type); |
@@ -46,8 +47,9 @@ probe_monitoring_device(struct nouveau_i2c_port *i2c, | |||
46 | } | 47 | } |
47 | 48 | ||
48 | nv_info(priv, | 49 | nv_info(priv, |
49 | "Found an %s at address 0x%x (controlled by lm_sensors)\n", | 50 | "Found an %s at address 0x%x (controlled by lm_sensors, " |
50 | info->type, info->addr); | 51 | "temp offset %+i C)\n", |
52 | info->type, info->addr, sensor->offset_constant); | ||
51 | priv->ic = client; | 53 | priv->ic = client; |
52 | 54 | ||
53 | return true; | 55 | return true; |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c b/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c index 0f5363edb964..a70d1b7e397b 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c | |||
@@ -29,54 +29,83 @@ struct nv40_therm_priv { | |||
29 | struct nouveau_therm_priv base; | 29 | struct nouveau_therm_priv base; |
30 | }; | 30 | }; |
31 | 31 | ||
32 | enum nv40_sensor_style { INVALID_STYLE = -1, OLD_STYLE = 0, NEW_STYLE = 1 }; | ||
33 | |||
34 | static enum nv40_sensor_style | ||
35 | nv40_sensor_style(struct nouveau_therm *therm) | ||
36 | { | ||
37 | struct nouveau_device *device = nv_device(therm); | ||
38 | |||
39 | switch (device->chipset) { | ||
40 | case 0x43: | ||
41 | case 0x44: | ||
42 | case 0x4a: | ||
43 | case 0x47: | ||
44 | return OLD_STYLE; | ||
45 | |||
46 | case 0x46: | ||
47 | case 0x49: | ||
48 | case 0x4b: | ||
49 | case 0x4e: | ||
50 | case 0x4c: | ||
51 | case 0x67: | ||
52 | case 0x68: | ||
53 | case 0x63: | ||
54 | return NEW_STYLE; | ||
55 | default: | ||
56 | return INVALID_STYLE; | ||
57 | } | ||
58 | } | ||
59 | |||
32 | static int | 60 | static int |
33 | nv40_sensor_setup(struct nouveau_therm *therm) | 61 | nv40_sensor_setup(struct nouveau_therm *therm) |
34 | { | 62 | { |
35 | struct nouveau_device *device = nv_device(therm); | 63 | enum nv40_sensor_style style = nv40_sensor_style(therm); |
36 | 64 | ||
37 | /* enable ADC readout and disable the ALARM threshold */ | 65 | /* enable ADC readout and disable the ALARM threshold */ |
38 | if (device->chipset >= 0x46) { | 66 | if (style == NEW_STYLE) { |
39 | nv_mask(therm, 0x15b8, 0x80000000, 0); | 67 | nv_mask(therm, 0x15b8, 0x80000000, 0); |
40 | nv_wr32(therm, 0x15b0, 0x80003fff); | 68 | nv_wr32(therm, 0x15b0, 0x80003fff); |
41 | mdelay(10); /* wait for the temperature to stabilize */ | 69 | mdelay(20); /* wait for the temperature to stabilize */ |
42 | return nv_rd32(therm, 0x15b4) & 0x3fff; | 70 | return nv_rd32(therm, 0x15b4) & 0x3fff; |
43 | } else { | 71 | } else if (style == OLD_STYLE) { |
44 | nv_wr32(therm, 0x15b0, 0xff); | 72 | nv_wr32(therm, 0x15b0, 0xff); |
73 | mdelay(20); /* wait for the temperature to stabilize */ | ||
45 | return nv_rd32(therm, 0x15b4) & 0xff; | 74 | return nv_rd32(therm, 0x15b4) & 0xff; |
46 | } | 75 | } else |
76 | return -ENODEV; | ||
47 | } | 77 | } |
48 | 78 | ||
49 | static int | 79 | static int |
50 | nv40_temp_get(struct nouveau_therm *therm) | 80 | nv40_temp_get(struct nouveau_therm *therm) |
51 | { | 81 | { |
52 | struct nouveau_therm_priv *priv = (void *)therm; | 82 | struct nouveau_therm_priv *priv = (void *)therm; |
53 | struct nouveau_device *device = nv_device(therm); | ||
54 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 83 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
84 | enum nv40_sensor_style style = nv40_sensor_style(therm); | ||
55 | int core_temp; | 85 | int core_temp; |
56 | 86 | ||
57 | if (device->chipset >= 0x46) { | 87 | if (style == NEW_STYLE) { |
58 | nv_wr32(therm, 0x15b0, 0x80003fff); | 88 | nv_wr32(therm, 0x15b0, 0x80003fff); |
59 | core_temp = nv_rd32(therm, 0x15b4) & 0x3fff; | 89 | core_temp = nv_rd32(therm, 0x15b4) & 0x3fff; |
60 | } else { | 90 | } else if (style == OLD_STYLE) { |
61 | nv_wr32(therm, 0x15b0, 0xff); | 91 | nv_wr32(therm, 0x15b0, 0xff); |
62 | core_temp = nv_rd32(therm, 0x15b4) & 0xff; | 92 | core_temp = nv_rd32(therm, 0x15b4) & 0xff; |
63 | } | 93 | } else |
64 | 94 | return -ENODEV; | |
65 | /* Setup the sensor if the temperature is 0 */ | ||
66 | if (core_temp == 0) | ||
67 | core_temp = nv40_sensor_setup(therm); | ||
68 | 95 | ||
69 | if (sensor->slope_div == 0) | 96 | /* if the slope or the offset is unset, do no use the sensor */ |
70 | sensor->slope_div = 1; | 97 | if (!sensor->slope_div || !sensor->slope_mult || |
71 | if (sensor->offset_den == 0) | 98 | !sensor->offset_num || !sensor->offset_den) |
72 | sensor->offset_den = 1; | 99 | return -ENODEV; |
73 | if (sensor->slope_mult < 1) | ||
74 | sensor->slope_mult = 1; | ||
75 | 100 | ||
76 | core_temp = core_temp * sensor->slope_mult / sensor->slope_div; | 101 | core_temp = core_temp * sensor->slope_mult / sensor->slope_div; |
77 | core_temp = core_temp + sensor->offset_num / sensor->offset_den; | 102 | core_temp = core_temp + sensor->offset_num / sensor->offset_den; |
78 | core_temp = core_temp + sensor->offset_constant - 8; | 103 | core_temp = core_temp + sensor->offset_constant - 8; |
79 | 104 | ||
105 | /* reserve negative temperatures for errors */ | ||
106 | if (core_temp < 0) | ||
107 | core_temp = 0; | ||
108 | |||
80 | return core_temp; | 109 | return core_temp; |
81 | } | 110 | } |
82 | 111 | ||
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/priv.h b/drivers/gpu/drm/nouveau/core/subdev/therm/priv.h index 06b98706b3fc..438d9824b774 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/priv.h +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/priv.h | |||
@@ -102,7 +102,7 @@ struct nouveau_therm_priv { | |||
102 | struct i2c_client *ic; | 102 | struct i2c_client *ic; |
103 | }; | 103 | }; |
104 | 104 | ||
105 | int nouveau_therm_mode(struct nouveau_therm *therm, int mode); | 105 | int nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode); |
106 | int nouveau_therm_attr_get(struct nouveau_therm *therm, | 106 | int nouveau_therm_attr_get(struct nouveau_therm *therm, |
107 | enum nouveau_therm_attr_type type); | 107 | enum nouveau_therm_attr_type type); |
108 | int nouveau_therm_attr_set(struct nouveau_therm *therm, | 108 | int nouveau_therm_attr_set(struct nouveau_therm *therm, |
@@ -122,6 +122,7 @@ int nouveau_therm_fan_sense(struct nouveau_therm *therm); | |||
122 | 122 | ||
123 | int nouveau_therm_preinit(struct nouveau_therm *); | 123 | int nouveau_therm_preinit(struct nouveau_therm *); |
124 | 124 | ||
125 | void nouveau_therm_sensor_preinit(struct nouveau_therm *); | ||
125 | void nouveau_therm_sensor_set_threshold_state(struct nouveau_therm *therm, | 126 | void nouveau_therm_sensor_set_threshold_state(struct nouveau_therm *therm, |
126 | enum nouveau_therm_thrs thrs, | 127 | enum nouveau_therm_thrs thrs, |
127 | enum nouveau_therm_thrs_state st); | 128 | enum nouveau_therm_thrs_state st); |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c b/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c index b37624af8297..470f6a47b656 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c | |||
@@ -34,10 +34,6 @@ nouveau_therm_temp_set_defaults(struct nouveau_therm *therm) | |||
34 | { | 34 | { |
35 | struct nouveau_therm_priv *priv = (void *)therm; | 35 | struct nouveau_therm_priv *priv = (void *)therm; |
36 | 36 | ||
37 | priv->bios_sensor.slope_mult = 1; | ||
38 | priv->bios_sensor.slope_div = 1; | ||
39 | priv->bios_sensor.offset_num = 0; | ||
40 | priv->bios_sensor.offset_den = 1; | ||
41 | priv->bios_sensor.offset_constant = 0; | 37 | priv->bios_sensor.offset_constant = 0; |
42 | 38 | ||
43 | priv->bios_sensor.thrs_fan_boost.temp = 90; | 39 | priv->bios_sensor.thrs_fan_boost.temp = 90; |
@@ -60,11 +56,6 @@ nouveau_therm_temp_safety_checks(struct nouveau_therm *therm) | |||
60 | struct nouveau_therm_priv *priv = (void *)therm; | 56 | struct nouveau_therm_priv *priv = (void *)therm; |
61 | struct nvbios_therm_sensor *s = &priv->bios_sensor; | 57 | struct nvbios_therm_sensor *s = &priv->bios_sensor; |
62 | 58 | ||
63 | if (!priv->bios_sensor.slope_div) | ||
64 | priv->bios_sensor.slope_div = 1; | ||
65 | if (!priv->bios_sensor.offset_den) | ||
66 | priv->bios_sensor.offset_den = 1; | ||
67 | |||
68 | /* enforce a minimum hysteresis on thresholds */ | 59 | /* enforce a minimum hysteresis on thresholds */ |
69 | s->thrs_fan_boost.hysteresis = max_t(u8, s->thrs_fan_boost.hysteresis, 2); | 60 | s->thrs_fan_boost.hysteresis = max_t(u8, s->thrs_fan_boost.hysteresis, 2); |
70 | s->thrs_down_clock.hysteresis = max_t(u8, s->thrs_down_clock.hysteresis, 2); | 61 | s->thrs_down_clock.hysteresis = max_t(u8, s->thrs_down_clock.hysteresis, 2); |
@@ -106,16 +97,16 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, | |||
106 | const char *thresolds[] = { | 97 | const char *thresolds[] = { |
107 | "fanboost", "downclock", "critical", "shutdown" | 98 | "fanboost", "downclock", "critical", "shutdown" |
108 | }; | 99 | }; |
109 | uint8_t temperature = therm->temp_get(therm); | 100 | int temperature = therm->temp_get(therm); |
110 | 101 | ||
111 | if (thrs < 0 || thrs > 3) | 102 | if (thrs < 0 || thrs > 3) |
112 | return; | 103 | return; |
113 | 104 | ||
114 | if (dir == NOUVEAU_THERM_THRS_FALLING) | 105 | if (dir == NOUVEAU_THERM_THRS_FALLING) |
115 | nv_info(therm, "temperature (%u C) went below the '%s' threshold\n", | 106 | nv_info(therm, "temperature (%i C) went below the '%s' threshold\n", |
116 | temperature, thresolds[thrs]); | 107 | temperature, thresolds[thrs]); |
117 | else | 108 | else |
118 | nv_info(therm, "temperature (%u C) hit the '%s' threshold\n", | 109 | nv_info(therm, "temperature (%i C) hit the '%s' threshold\n", |
119 | temperature, thresolds[thrs]); | 110 | temperature, thresolds[thrs]); |
120 | 111 | ||
121 | active = (dir == NOUVEAU_THERM_THRS_RISING); | 112 | active = (dir == NOUVEAU_THERM_THRS_RISING); |
@@ -123,7 +114,7 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, | |||
123 | case NOUVEAU_THERM_THRS_FANBOOST: | 114 | case NOUVEAU_THERM_THRS_FANBOOST: |
124 | if (active) { | 115 | if (active) { |
125 | nouveau_therm_fan_set(therm, true, 100); | 116 | nouveau_therm_fan_set(therm, true, 100); |
126 | nouveau_therm_mode(therm, NOUVEAU_THERM_CTRL_AUTO); | 117 | nouveau_therm_fan_mode(therm, NOUVEAU_THERM_CTRL_AUTO); |
127 | } | 118 | } |
128 | break; | 119 | break; |
129 | case NOUVEAU_THERM_THRS_DOWNCLOCK: | 120 | case NOUVEAU_THERM_THRS_DOWNCLOCK: |
@@ -202,7 +193,7 @@ alarm_timer_callback(struct nouveau_alarm *alarm) | |||
202 | NOUVEAU_THERM_THRS_SHUTDOWN); | 193 | NOUVEAU_THERM_THRS_SHUTDOWN); |
203 | 194 | ||
204 | /* schedule the next poll in one second */ | 195 | /* schedule the next poll in one second */ |
205 | if (list_empty(&alarm->head)) | 196 | if (therm->temp_get(therm) >= 0 && list_empty(&alarm->head)) |
206 | ptimer->alarm(ptimer, 1000 * 1000 * 1000, alarm); | 197 | ptimer->alarm(ptimer, 1000 * 1000 * 1000, alarm); |
207 | 198 | ||
208 | spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags); | 199 | spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags); |
@@ -225,6 +216,17 @@ nouveau_therm_program_alarms_polling(struct nouveau_therm *therm) | |||
225 | alarm_timer_callback(&priv->sensor.therm_poll_alarm); | 216 | alarm_timer_callback(&priv->sensor.therm_poll_alarm); |
226 | } | 217 | } |
227 | 218 | ||
219 | void | ||
220 | nouveau_therm_sensor_preinit(struct nouveau_therm *therm) | ||
221 | { | ||
222 | const char *sensor_avail = "yes"; | ||
223 | |||
224 | if (therm->temp_get(therm) < 0) | ||
225 | sensor_avail = "no"; | ||
226 | |||
227 | nv_info(therm, "internal sensor: %s\n", sensor_avail); | ||
228 | } | ||
229 | |||
228 | int | 230 | int |
229 | nouveau_therm_sensor_ctor(struct nouveau_therm *therm) | 231 | nouveau_therm_sensor_ctor(struct nouveau_therm *therm) |
230 | { | 232 | { |
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.c b/drivers/gpu/drm/nouveau/nouveau_pm.c index bb54098c6d97..936b442a6ab7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_pm.c +++ b/drivers/gpu/drm/nouveau/nouveau_pm.c | |||
@@ -402,8 +402,12 @@ nouveau_hwmon_show_temp(struct device *d, struct device_attribute *a, char *buf) | |||
402 | struct drm_device *dev = dev_get_drvdata(d); | 402 | struct drm_device *dev = dev_get_drvdata(d); |
403 | struct nouveau_drm *drm = nouveau_drm(dev); | 403 | struct nouveau_drm *drm = nouveau_drm(dev); |
404 | struct nouveau_therm *therm = nouveau_therm(drm->device); | 404 | struct nouveau_therm *therm = nouveau_therm(drm->device); |
405 | int temp = therm->temp_get(therm); | ||
405 | 406 | ||
406 | return snprintf(buf, PAGE_SIZE, "%d\n", therm->temp_get(therm) * 1000); | 407 | if (temp < 0) |
408 | return temp; | ||
409 | |||
410 | return snprintf(buf, PAGE_SIZE, "%d\n", temp * 1000); | ||
407 | } | 411 | } |
408 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, nouveau_hwmon_show_temp, | 412 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, nouveau_hwmon_show_temp, |
409 | NULL, 0); | 413 | NULL, 0); |
@@ -871,7 +875,12 @@ static SENSOR_DEVICE_ATTR(pwm1_max, S_IRUGO | S_IWUSR, | |||
871 | nouveau_hwmon_get_pwm1_max, | 875 | nouveau_hwmon_get_pwm1_max, |
872 | nouveau_hwmon_set_pwm1_max, 0); | 876 | nouveau_hwmon_set_pwm1_max, 0); |
873 | 877 | ||
874 | static struct attribute *hwmon_attributes[] = { | 878 | static struct attribute *hwmon_default_attributes[] = { |
879 | &sensor_dev_attr_name.dev_attr.attr, | ||
880 | &sensor_dev_attr_update_rate.dev_attr.attr, | ||
881 | NULL | ||
882 | }; | ||
883 | static struct attribute *hwmon_temp_attributes[] = { | ||
875 | &sensor_dev_attr_temp1_input.dev_attr.attr, | 884 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
876 | &sensor_dev_attr_temp1_auto_point1_pwm.dev_attr.attr, | 885 | &sensor_dev_attr_temp1_auto_point1_pwm.dev_attr.attr, |
877 | &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr, | 886 | &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr, |
@@ -882,8 +891,6 @@ static struct attribute *hwmon_attributes[] = { | |||
882 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | 891 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, |
883 | &sensor_dev_attr_temp1_emergency.dev_attr.attr, | 892 | &sensor_dev_attr_temp1_emergency.dev_attr.attr, |
884 | &sensor_dev_attr_temp1_emergency_hyst.dev_attr.attr, | 893 | &sensor_dev_attr_temp1_emergency_hyst.dev_attr.attr, |
885 | &sensor_dev_attr_name.dev_attr.attr, | ||
886 | &sensor_dev_attr_update_rate.dev_attr.attr, | ||
887 | NULL | 894 | NULL |
888 | }; | 895 | }; |
889 | static struct attribute *hwmon_fan_rpm_attributes[] = { | 896 | static struct attribute *hwmon_fan_rpm_attributes[] = { |
@@ -898,8 +905,11 @@ static struct attribute *hwmon_pwm_fan_attributes[] = { | |||
898 | NULL | 905 | NULL |
899 | }; | 906 | }; |
900 | 907 | ||
901 | static const struct attribute_group hwmon_attrgroup = { | 908 | static const struct attribute_group hwmon_default_attrgroup = { |
902 | .attrs = hwmon_attributes, | 909 | .attrs = hwmon_default_attributes, |
910 | }; | ||
911 | static const struct attribute_group hwmon_temp_attrgroup = { | ||
912 | .attrs = hwmon_temp_attributes, | ||
903 | }; | 913 | }; |
904 | static const struct attribute_group hwmon_fan_rpm_attrgroup = { | 914 | static const struct attribute_group hwmon_fan_rpm_attrgroup = { |
905 | .attrs = hwmon_fan_rpm_attributes, | 915 | .attrs = hwmon_fan_rpm_attributes, |
@@ -931,13 +941,22 @@ nouveau_hwmon_init(struct drm_device *dev) | |||
931 | } | 941 | } |
932 | dev_set_drvdata(hwmon_dev, dev); | 942 | dev_set_drvdata(hwmon_dev, dev); |
933 | 943 | ||
934 | /* default sysfs entries */ | 944 | /* set the default attributes */ |
935 | ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_attrgroup); | 945 | ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_default_attrgroup); |
936 | if (ret) { | 946 | if (ret) { |
937 | if (ret) | 947 | if (ret) |
938 | goto error; | 948 | goto error; |
939 | } | 949 | } |
940 | 950 | ||
951 | /* if the card has a working thermal sensor */ | ||
952 | if (therm->temp_get(therm) >= 0) { | ||
953 | ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_temp_attrgroup); | ||
954 | if (ret) { | ||
955 | if (ret) | ||
956 | goto error; | ||
957 | } | ||
958 | } | ||
959 | |||
941 | /* if the card has a pwm fan */ | 960 | /* if the card has a pwm fan */ |
942 | /*XXX: incorrect, need better detection for this, some boards have | 961 | /*XXX: incorrect, need better detection for this, some boards have |
943 | * the gpio entries for pwm fan control even when there's no | 962 | * the gpio entries for pwm fan control even when there's no |
@@ -979,11 +998,10 @@ nouveau_hwmon_fini(struct drm_device *dev) | |||
979 | struct nouveau_pm *pm = nouveau_pm(dev); | 998 | struct nouveau_pm *pm = nouveau_pm(dev); |
980 | 999 | ||
981 | if (pm->hwmon) { | 1000 | if (pm->hwmon) { |
982 | sysfs_remove_group(&pm->hwmon->kobj, &hwmon_attrgroup); | 1001 | sysfs_remove_group(&pm->hwmon->kobj, &hwmon_default_attrgroup); |
983 | sysfs_remove_group(&pm->hwmon->kobj, | 1002 | sysfs_remove_group(&pm->hwmon->kobj, &hwmon_temp_attrgroup); |
984 | &hwmon_pwm_fan_attrgroup); | 1003 | sysfs_remove_group(&pm->hwmon->kobj, &hwmon_pwm_fan_attrgroup); |
985 | sysfs_remove_group(&pm->hwmon->kobj, | 1004 | sysfs_remove_group(&pm->hwmon->kobj, &hwmon_fan_rpm_attrgroup); |
986 | &hwmon_fan_rpm_attrgroup); | ||
987 | 1005 | ||
988 | hwmon_device_unregister(pm->hwmon); | 1006 | hwmon_device_unregister(pm->hwmon); |
989 | } | 1007 | } |
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index 2db57990f65c..7f0e6c3f37d1 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c | |||
@@ -524,6 +524,8 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |||
524 | swap_interval <<= 4; | 524 | swap_interval <<= 4; |
525 | if (swap_interval == 0) | 525 | if (swap_interval == 0) |
526 | swap_interval |= 0x100; | 526 | swap_interval |= 0x100; |
527 | if (chan == NULL) | ||
528 | evo_sync(crtc->dev); | ||
527 | 529 | ||
528 | push = evo_wait(sync, 128); | 530 | push = evo_wait(sync, 128); |
529 | if (unlikely(push == NULL)) | 531 | if (unlikely(push == NULL)) |
@@ -586,8 +588,6 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |||
586 | sync->addr ^= 0x10; | 588 | sync->addr ^= 0x10; |
587 | sync->data++; | 589 | sync->data++; |
588 | FIRE_RING (chan); | 590 | FIRE_RING (chan); |
589 | } else { | ||
590 | evo_sync(crtc->dev); | ||
591 | } | 591 | } |
592 | 592 | ||
593 | /* queue the flip */ | 593 | /* queue the flip */ |
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index d4c633e12863..27769e724b6d 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -468,13 +468,19 @@ static void cayman_gpu_init(struct radeon_device *rdev) | |||
468 | (rdev->pdev->device == 0x9907) || | 468 | (rdev->pdev->device == 0x9907) || |
469 | (rdev->pdev->device == 0x9908) || | 469 | (rdev->pdev->device == 0x9908) || |
470 | (rdev->pdev->device == 0x9909) || | 470 | (rdev->pdev->device == 0x9909) || |
471 | (rdev->pdev->device == 0x990B) || | ||
472 | (rdev->pdev->device == 0x990C) || | ||
473 | (rdev->pdev->device == 0x990F) || | ||
471 | (rdev->pdev->device == 0x9910) || | 474 | (rdev->pdev->device == 0x9910) || |
472 | (rdev->pdev->device == 0x9917)) { | 475 | (rdev->pdev->device == 0x9917) || |
476 | (rdev->pdev->device == 0x9999)) { | ||
473 | rdev->config.cayman.max_simds_per_se = 6; | 477 | rdev->config.cayman.max_simds_per_se = 6; |
474 | rdev->config.cayman.max_backends_per_se = 2; | 478 | rdev->config.cayman.max_backends_per_se = 2; |
475 | } else if ((rdev->pdev->device == 0x9903) || | 479 | } else if ((rdev->pdev->device == 0x9903) || |
476 | (rdev->pdev->device == 0x9904) || | 480 | (rdev->pdev->device == 0x9904) || |
477 | (rdev->pdev->device == 0x990A) || | 481 | (rdev->pdev->device == 0x990A) || |
482 | (rdev->pdev->device == 0x990D) || | ||
483 | (rdev->pdev->device == 0x990E) || | ||
478 | (rdev->pdev->device == 0x9913) || | 484 | (rdev->pdev->device == 0x9913) || |
479 | (rdev->pdev->device == 0x9918)) { | 485 | (rdev->pdev->device == 0x9918)) { |
480 | rdev->config.cayman.max_simds_per_se = 4; | 486 | rdev->config.cayman.max_simds_per_se = 4; |
@@ -483,6 +489,9 @@ static void cayman_gpu_init(struct radeon_device *rdev) | |||
483 | (rdev->pdev->device == 0x9990) || | 489 | (rdev->pdev->device == 0x9990) || |
484 | (rdev->pdev->device == 0x9991) || | 490 | (rdev->pdev->device == 0x9991) || |
485 | (rdev->pdev->device == 0x9994) || | 491 | (rdev->pdev->device == 0x9994) || |
492 | (rdev->pdev->device == 0x9995) || | ||
493 | (rdev->pdev->device == 0x9996) || | ||
494 | (rdev->pdev->device == 0x999A) || | ||
486 | (rdev->pdev->device == 0x99A0)) { | 495 | (rdev->pdev->device == 0x99A0)) { |
487 | rdev->config.cayman.max_simds_per_se = 3; | 496 | rdev->config.cayman.max_simds_per_se = 3; |
488 | rdev->config.cayman.max_backends_per_se = 1; | 497 | rdev->config.cayman.max_backends_per_se = 1; |
@@ -616,11 +625,22 @@ static void cayman_gpu_init(struct radeon_device *rdev) | |||
616 | WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); | 625 | WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); |
617 | WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); | 626 | WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); |
618 | 627 | ||
619 | tmp = gb_addr_config & NUM_PIPES_MASK; | 628 | if ((rdev->config.cayman.max_backends_per_se == 1) && |
620 | tmp = r6xx_remap_render_backend(rdev, tmp, | 629 | (rdev->flags & RADEON_IS_IGP)) { |
621 | rdev->config.cayman.max_backends_per_se * | 630 | if ((disabled_rb_mask & 3) == 1) { |
622 | rdev->config.cayman.max_shader_engines, | 631 | /* RB0 disabled, RB1 enabled */ |
623 | CAYMAN_MAX_BACKENDS, disabled_rb_mask); | 632 | tmp = 0x11111111; |
633 | } else { | ||
634 | /* RB1 disabled, RB0 enabled */ | ||
635 | tmp = 0x00000000; | ||
636 | } | ||
637 | } else { | ||
638 | tmp = gb_addr_config & NUM_PIPES_MASK; | ||
639 | tmp = r6xx_remap_render_backend(rdev, tmp, | ||
640 | rdev->config.cayman.max_backends_per_se * | ||
641 | rdev->config.cayman.max_shader_engines, | ||
642 | CAYMAN_MAX_BACKENDS, disabled_rb_mask); | ||
643 | } | ||
624 | WREG32(GB_BACKEND_MAP, tmp); | 644 | WREG32(GB_BACKEND_MAP, tmp); |
625 | 645 | ||
626 | cgts_tcc_disable = 0xffff0000; | 646 | cgts_tcc_disable = 0xffff0000; |
@@ -1771,6 +1791,7 @@ int cayman_resume(struct radeon_device *rdev) | |||
1771 | int cayman_suspend(struct radeon_device *rdev) | 1791 | int cayman_suspend(struct radeon_device *rdev) |
1772 | { | 1792 | { |
1773 | r600_audio_fini(rdev); | 1793 | r600_audio_fini(rdev); |
1794 | radeon_vm_manager_fini(rdev); | ||
1774 | cayman_cp_enable(rdev, false); | 1795 | cayman_cp_enable(rdev, false); |
1775 | cayman_dma_stop(rdev); | 1796 | cayman_dma_stop(rdev); |
1776 | evergreen_irq_suspend(rdev); | 1797 | evergreen_irq_suspend(rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c index bedda9caadd9..6e05a2e75a46 100644 --- a/drivers/gpu/drm/radeon/radeon_benchmark.c +++ b/drivers/gpu/drm/radeon/radeon_benchmark.c | |||
@@ -122,10 +122,7 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, | |||
122 | goto out_cleanup; | 122 | goto out_cleanup; |
123 | } | 123 | } |
124 | 124 | ||
125 | /* r100 doesn't have dma engine so skip the test */ | 125 | if (rdev->asic->copy.dma) { |
126 | /* also, VRAM-to-VRAM test doesn't make much sense for DMA */ | ||
127 | /* skip it as well if domains are the same */ | ||
128 | if ((rdev->asic->copy.dma) && (sdomain != ddomain)) { | ||
129 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, | 126 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
130 | RADEON_BENCHMARK_COPY_DMA, n); | 127 | RADEON_BENCHMARK_COPY_DMA, n); |
131 | if (time < 0) | 128 | if (time < 0) |
@@ -135,13 +132,15 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, | |||
135 | sdomain, ddomain, "dma"); | 132 | sdomain, ddomain, "dma"); |
136 | } | 133 | } |
137 | 134 | ||
138 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, | 135 | if (rdev->asic->copy.blit) { |
139 | RADEON_BENCHMARK_COPY_BLIT, n); | 136 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
140 | if (time < 0) | 137 | RADEON_BENCHMARK_COPY_BLIT, n); |
141 | goto out_cleanup; | 138 | if (time < 0) |
142 | if (time > 0) | 139 | goto out_cleanup; |
143 | radeon_benchmark_log_results(n, size, time, | 140 | if (time > 0) |
144 | sdomain, ddomain, "blit"); | 141 | radeon_benchmark_log_results(n, size, time, |
142 | sdomain, ddomain, "blit"); | ||
143 | } | ||
145 | 144 | ||
146 | out_cleanup: | 145 | out_cleanup: |
147 | if (sobj) { | 146 | if (sobj) { |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 9128120da044..bafbe3216952 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -4469,6 +4469,7 @@ int si_resume(struct radeon_device *rdev) | |||
4469 | 4469 | ||
4470 | int si_suspend(struct radeon_device *rdev) | 4470 | int si_suspend(struct radeon_device *rdev) |
4471 | { | 4471 | { |
4472 | radeon_vm_manager_fini(rdev); | ||
4472 | si_cp_enable(rdev, false); | 4473 | si_cp_enable(rdev, false); |
4473 | cayman_dma_stop(rdev); | 4474 | cayman_dma_stop(rdev); |
4474 | si_irq_suspend(rdev); | 4475 | si_irq_suspend(rdev); |
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h index a386b0b654cc..918e8fe2f5e9 100644 --- a/include/drm/drm_pciids.h +++ b/include/drm/drm_pciids.h | |||
@@ -581,7 +581,11 @@ | |||
581 | {0x1002, 0x9908, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 581 | {0x1002, 0x9908, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
582 | {0x1002, 0x9909, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 582 | {0x1002, 0x9909, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
583 | {0x1002, 0x990A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 583 | {0x1002, 0x990A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
584 | {0x1002, 0x990F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 584 | {0x1002, 0x990B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
585 | {0x1002, 0x990C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
586 | {0x1002, 0x990D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
587 | {0x1002, 0x990E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
588 | {0x1002, 0x990F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
585 | {0x1002, 0x9910, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 589 | {0x1002, 0x9910, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
586 | {0x1002, 0x9913, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 590 | {0x1002, 0x9913, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
587 | {0x1002, 0x9917, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 591 | {0x1002, 0x9917, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
@@ -592,6 +596,13 @@ | |||
592 | {0x1002, 0x9992, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 596 | {0x1002, 0x9992, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
593 | {0x1002, 0x9993, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 597 | {0x1002, 0x9993, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
594 | {0x1002, 0x9994, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 598 | {0x1002, 0x9994, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
599 | {0x1002, 0x9995, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
600 | {0x1002, 0x9996, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
601 | {0x1002, 0x9997, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
602 | {0x1002, 0x9998, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
603 | {0x1002, 0x9999, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
604 | {0x1002, 0x999A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
605 | {0x1002, 0x999B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | ||
595 | {0x1002, 0x99A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 606 | {0x1002, 0x99A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
596 | {0x1002, 0x99A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 607 | {0x1002, 0x99A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
597 | {0x1002, 0x99A4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | 608 | {0x1002, 0x99A4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |