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-rw-r--r--arch/arm/boot/dts/spear1340.dtsi19
-rw-r--r--arch/arm/boot/dts/spear13xx.dtsi38
-rw-r--r--arch/arm/mach-spear13xx/include/mach/spear.h2
-rw-r--r--arch/arm/mach-spear13xx/spear1310.c5
-rw-r--r--arch/arm/mach-spear13xx/spear1340.c33
-rw-r--r--arch/arm/mach-spear13xx/spear13xx.c55
6 files changed, 80 insertions, 72 deletions
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index b2d41b7502bd..34da11aa6795 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -88,25 +88,6 @@
88 status = "disabled"; 88 status = "disabled";
89 }; 89 };
90 90
91 dma@ea800000 {
92 slave_info {
93 uart1_tx {
94 bus_id = "uart1_tx";
95 cfg_hi = <0x6000>; /* 0xC << 11 */
96 cfg_lo = <0>;
97 src_master = <0>;
98 dst_master = <1>;
99 };
100 uart1_tx {
101 bus_id = "uart1_tx";
102 cfg_hi = <0x680>; /* 0xD << 7 */
103 cfg_lo = <0>;
104 src_master = <1>;
105 dst_master = <0>;
106 };
107 };
108 };
109
110 spi1: spi@5d400000 { 91 spi1: spi@5d400000 {
111 compatible = "arm,pl022", "arm,primecell"; 92 compatible = "arm,pl022", "arm,primecell";
112 reg = <0x5d400000 0x1000>; 93 reg = <0x5d400000 0x1000>;
diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi
index 585f64157ea4..b4ca60f4eb42 100644
--- a/arch/arm/boot/dts/spear13xx.dtsi
+++ b/arch/arm/boot/dts/spear13xx.dtsi
@@ -105,37 +105,6 @@
105 reg = <0xea800000 0x1000>; 105 reg = <0xea800000 0x1000>;
106 interrupts = <0 19 0x4>; 106 interrupts = <0 19 0x4>;
107 status = "disabled"; 107 status = "disabled";
108
109 nr_channels = <8>;
110 chan_allocation_order = <1>;
111 chan_priority = <1>;
112 block_size = <0xfff>;
113 nr_masters = <2>;
114 data_width = <3 3 0 0>;
115
116 slave_info {
117 ssp0_tx {
118 bus_id = "ssp0_tx";
119 cfg_hi = <0x2000>; /* 0x4 << 11 */
120 cfg_lo = <0>;
121 src_master = <0>;
122 dst_master = <0>;
123 };
124 ssp0_rx {
125 bus_id = "ssp0_rx";
126 cfg_hi = <0x280>; /* 0x5 << 7 */
127 cfg_lo = <0>;
128 src_master = <0>;
129 dst_master = <0>;
130 };
131 cf {
132 bus_id = "cf";
133 cfg_hi = <0>;
134 cfg_lo = <0>;
135 src_master = <0>;
136 dst_master = <0>;
137 };
138 };
139 }; 108 };
140 109
141 dma@eb000000 { 110 dma@eb000000 {
@@ -143,13 +112,6 @@
143 reg = <0xeb000000 0x1000>; 112 reg = <0xeb000000 0x1000>;
144 interrupts = <0 59 0x4>; 113 interrupts = <0 59 0x4>;
145 status = "disabled"; 114 status = "disabled";
146
147 nr_channels = <8>;
148 chan_allocation_order = <1>;
149 chan_priority = <1>;
150 block_size = <0xfff>;
151 nr_masters = <2>;
152 data_width = <3 3 0 0>;
153 }; 115 };
154 116
155 fsmc: flash@b0000000 { 117 fsmc: flash@b0000000 {
diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h
index 972a151df34c..7cfa6818865a 100644
--- a/arch/arm/mach-spear13xx/include/mach/spear.h
+++ b/arch/arm/mach-spear13xx/include/mach/spear.h
@@ -43,6 +43,8 @@
43#define VA_L2CC_BASE IOMEM(UL(0xFB000000)) 43#define VA_L2CC_BASE IOMEM(UL(0xFB000000))
44 44
45/* others */ 45/* others */
46#define DMAC0_BASE UL(0xEA800000)
47#define DMAC1_BASE UL(0xEB000000)
46#define MCIF_CF_BASE UL(0xB2800000) 48#define MCIF_CF_BASE UL(0xB2800000)
47 49
48/* Debug uart for linux, will be used for debug and uncompress messages */ 50/* Debug uart for linux, will be used for debug and uncompress messages */
diff --git a/arch/arm/mach-spear13xx/spear1310.c b/arch/arm/mach-spear13xx/spear1310.c
index ec72c47c0e08..02f4724bb0d4 100644
--- a/arch/arm/mach-spear13xx/spear1310.c
+++ b/arch/arm/mach-spear13xx/spear1310.c
@@ -36,7 +36,7 @@
36static struct arasan_cf_pdata cf_pdata = { 36static struct arasan_cf_pdata cf_pdata = {
37 .cf_if_clk = CF_IF_CLK_166M, 37 .cf_if_clk = CF_IF_CLK_166M,
38 .quirk = CF_BROKEN_UDMA, 38 .quirk = CF_BROKEN_UDMA,
39 .dma_priv = "cf", 39 .dma_priv = &cf_dma_priv,
40}; 40};
41 41
42/* ssp device registration */ 42/* ssp device registration */
@@ -47,7 +47,10 @@ static struct pl022_ssp_controller ssp1_plat_data = {
47/* Add SPEAr1310 auxdata to pass platform data */ 47/* Add SPEAr1310 auxdata to pass platform data */
48static struct of_dev_auxdata spear1310_auxdata_lookup[] __initdata = { 48static struct of_dev_auxdata spear1310_auxdata_lookup[] __initdata = {
49 OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &cf_pdata), 49 OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &cf_pdata),
50 OF_DEV_AUXDATA("snps,dma-spear1340", DMAC0_BASE, NULL, &dmac_plat_data),
51 OF_DEV_AUXDATA("snps,dma-spear1340", DMAC1_BASE, NULL, &dmac_plat_data),
50 OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &pl022_plat_data), 52 OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &pl022_plat_data),
53
51 OF_DEV_AUXDATA("arm,pl022", SPEAR1310_SSP1_BASE, NULL, &ssp1_plat_data), 54 OF_DEV_AUXDATA("arm,pl022", SPEAR1310_SSP1_BASE, NULL, &ssp1_plat_data),
52 {} 55 {}
53}; 56};
diff --git a/arch/arm/mach-spear13xx/spear1340.c b/arch/arm/mach-spear13xx/spear1340.c
index 69c8f72a9ca2..081014fb314a 100644
--- a/arch/arm/mach-spear13xx/spear1340.c
+++ b/arch/arm/mach-spear13xx/spear1340.c
@@ -18,9 +18,9 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/dw_dmac.h> 19#include <linux/dw_dmac.h>
20#include <linux/of_platform.h> 20#include <linux/of_platform.h>
21#include <linux/pata_arasan_cf_data.h>
22#include <asm/hardware/gic.h> 21#include <asm/hardware/gic.h>
23#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
23#include <mach/dma.h>
24#include <mach/generic.h> 24#include <mach/generic.h>
25#include <mach/spear.h> 25#include <mach/spear.h>
26 26
@@ -78,16 +78,26 @@
78 (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \ 78 (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \
79 SPEAR1340_MIPHY_PLL_RATIO_TOP(25)) 79 SPEAR1340_MIPHY_PLL_RATIO_TOP(25))
80 80
81static struct amba_pl011_data uart1_data = { 81static struct dw_dma_slave uart1_dma_param[] = {
82 .dma_filter = dw_dma_generic_filter, 82 {
83 .dma_tx_param = "uart1_tx", 83 /* Tx */
84 .dma_rx_param = "uart1_rx", 84 .cfg_hi = DWC_CFGH_DST_PER(SPEAR1340_DMA_REQ_UART1_TX),
85 .cfg_lo = 0,
86 .src_master = DMA_MASTER_MEMORY,
87 .dst_master = SPEAR1340_DMA_MASTER_UART1,
88 }, {
89 /* Rx */
90 .cfg_hi = DWC_CFGH_SRC_PER(SPEAR1340_DMA_REQ_UART1_RX),
91 .cfg_lo = 0,
92 .src_master = SPEAR1340_DMA_MASTER_UART1,
93 .dst_master = DMA_MASTER_MEMORY,
94 }
85}; 95};
86 96
87static struct arasan_cf_pdata cf_pdata = { 97static struct amba_pl011_data uart1_data = {
88 .cf_if_clk = CF_IF_CLK_166M, 98 .dma_filter = dw_dma_filter,
89 .quirk = CF_BROKEN_UDMA, 99 .dma_tx_param = &uart1_dma_param[0],
90 .dma_priv = "cf", 100 .dma_rx_param = &uart1_dma_param[1],
91}; 101};
92 102
93/* SATA device registration */ 103/* SATA device registration */
@@ -148,8 +158,11 @@ static struct ahci_platform_data sata_pdata = {
148 158
149/* Add SPEAr1340 auxdata to pass platform data */ 159/* Add SPEAr1340 auxdata to pass platform data */
150static struct of_dev_auxdata spear1340_auxdata_lookup[] __initdata = { 160static struct of_dev_auxdata spear1340_auxdata_lookup[] __initdata = {
151 OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &cf_pdata), 161 OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &cf_dma_priv),
162 OF_DEV_AUXDATA("snps,dma-spear1340", DMAC0_BASE, NULL, &dmac_plat_data),
163 OF_DEV_AUXDATA("snps,dma-spear1340", DMAC1_BASE, NULL, &dmac_plat_data),
152 OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &pl022_plat_data), 164 OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &pl022_plat_data),
165
153 OF_DEV_AUXDATA("snps,spear-ahci", SPEAR1340_SATA_BASE, NULL, 166 OF_DEV_AUXDATA("snps,spear-ahci", SPEAR1340_SATA_BASE, NULL,
154 &sata_pdata), 167 &sata_pdata),
155 OF_DEV_AUXDATA("arm,pl011", SPEAR1340_UART1_BASE, NULL, &uart1_data), 168 OF_DEV_AUXDATA("arm,pl011", SPEAR1340_UART1_BASE, NULL, &uart1_data),
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index b074db8b109c..c4af775a8451 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -22,16 +22,63 @@
22#include <asm/hardware/gic.h> 22#include <asm/hardware/gic.h>
23#include <asm/mach/map.h> 23#include <asm/mach/map.h>
24#include <asm/smp_twd.h> 24#include <asm/smp_twd.h>
25#include <mach/dma.h>
25#include <mach/generic.h> 26#include <mach/generic.h>
26#include <mach/spear.h> 27#include <mach/spear.h>
27 28
29/* common dw_dma filter routine to be used by peripherals */
30bool dw_dma_filter(struct dma_chan *chan, void *slave)
31{
32 struct dw_dma_slave *dws = (struct dw_dma_slave *)slave;
33
34 if (chan->device->dev == dws->dma_dev) {
35 chan->private = slave;
36 return true;
37 } else {
38 return false;
39 }
40}
41
28/* ssp device registration */ 42/* ssp device registration */
43static struct dw_dma_slave ssp_dma_param[] = {
44 {
45 /* Tx */
46 .cfg_hi = DWC_CFGH_DST_PER(DMA_REQ_SSP0_TX),
47 .cfg_lo = 0,
48 .src_master = DMA_MASTER_MEMORY,
49 .dst_master = DMA_MASTER_SSP0,
50 }, {
51 /* Rx */
52 .cfg_hi = DWC_CFGH_SRC_PER(DMA_REQ_SSP0_RX),
53 .cfg_lo = 0,
54 .src_master = DMA_MASTER_SSP0,
55 .dst_master = DMA_MASTER_MEMORY,
56 }
57};
58
29struct pl022_ssp_controller pl022_plat_data = { 59struct pl022_ssp_controller pl022_plat_data = {
30 .enable_dma = 1, 60 .enable_dma = 1,
31 .dma_filter = dw_dma_generic_filter, 61 .dma_filter = dw_dma_filter,
32 .dma_rx_param = "ssp0_rx", 62 .dma_rx_param = &ssp_dma_param[1],
33 .dma_tx_param = "ssp0_tx", 63 .dma_tx_param = &ssp_dma_param[0],
34 .num_chipselect = 3, 64};
65
66/* CF device registration */
67struct dw_dma_slave cf_dma_priv = {
68 .cfg_hi = 0,
69 .cfg_lo = 0,
70 .src_master = 0,
71 .dst_master = 0,
72};
73
74/* dmac device registeration */
75struct dw_dma_platform_data dmac_plat_data = {
76 .nr_channels = 8,
77 .chan_allocation_order = CHAN_ALLOCATION_DESCENDING,
78 .chan_priority = CHAN_PRIORITY_DESCENDING,
79 .block_size = 4095U,
80 .nr_masters = 2,
81 .data_width = { 3, 3, 0, 0 },
35}; 82};
36 83
37void __init spear13xx_l2x0_init(void) 84void __init spear13xx_l2x0_init(void)
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-03 11:43:08 -0500