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-rw-r--r--Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt57
-rw-r--r--arch/arm/mach-vt8500/Kconfig1
-rw-r--r--drivers/pinctrl/Kconfig1
-rw-r--r--drivers/pinctrl/Makefile1
-rw-r--r--drivers/pinctrl/vt8500/Kconfig52
-rw-r--r--drivers/pinctrl/vt8500/Makefile8
-rw-r--r--drivers/pinctrl/vt8500/pinctrl-vt8500.c501
-rw-r--r--drivers/pinctrl/vt8500/pinctrl-wm8505.c532
-rw-r--r--drivers/pinctrl/vt8500/pinctrl-wm8650.c370
-rw-r--r--drivers/pinctrl/vt8500/pinctrl-wm8750.c409
-rw-r--r--drivers/pinctrl/vt8500/pinctrl-wm8850.c388
-rw-r--r--drivers/pinctrl/vt8500/pinctrl-wmt.c632
-rw-r--r--drivers/pinctrl/vt8500/pinctrl-wmt.h79
13 files changed, 3031 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt
new file mode 100644
index 000000000000..b3aa90f0ce44
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-vt8500.txt
@@ -0,0 +1,57 @@
1VIA VT8500 and Wondermedia WM8xxx-series pinmux/gpio controller
2
3These SoCs contain a combined Pinmux/GPIO module. Each pin may operate as
4either a GPIO in, GPIO out or as an alternate function (I2C, SPI etc).
5
6Required properties:
7- compatible: "via,vt8500-pinctrl", "wm,wm8505-pinctrl", "wm,wm8650-pinctrl",
8 "wm8750-pinctrl" or "wm,wm8850-pinctrl"
9- reg: Should contain the physical address of the module's registers.
10- interrupt-controller: Marks the device node as an interrupt controller.
11- #interrupt-cells: Should be two.
12- gpio-controller: Marks the device node as a GPIO controller.
13- #gpio-cells : Should be two. The first cell is the pin number and the
14 second cell is used to specify optional parameters.
15 bit 0 - active low
16
17Please refer to ../gpio/gpio.txt for a general description of GPIO bindings.
18
19Please refer to pinctrl-bindings.txt in this directory for details of the
20common pinctrl bindings used by client devices, including the meaning of the
21phrase "pin configuration node".
22
23Each pin configuration node lists the pin(s) to which it applies, and one or
24more of the mux functions to select on those pin(s), and pull-up/down
25configuration. Each subnode only affects those parameters that are explicitly
26listed. In other words, a subnode that lists only a mux function implies no
27information about any pull configuration. Similarly, a subnode that lists only
28a pull parameter implies no information about the mux function.
29
30Required subnode-properties:
31- wm,pins: An array of cells. Each cell contains the ID of a pin.
32
33Optional subnode-properties:
34- wm,function: Integer, containing the function to mux to the pin(s):
35 0: GPIO in
36 1: GPIO out
37 2: alternate
38
39- wm,pull: Integer, representing the pull-down/up to apply to the pin(s):
40 0: none
41 1: down
42 2: up
43
44Each of wm,function and wm,pull may contain either a single value which
45will be applied to all pins in wm,pins, or one value for each entry in
46wm,pins.
47
48Example:
49
50 pinctrl: pinctrl {
51 compatible = "wm,wm8505-pinctrl";
52 reg = <0xD8110000 0x10000>;
53 interrupt-controller;
54 #interrupt-cells = <2>;
55 gpio-controller;
56 #gpio-cells = <2>;
57 };
diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig
index e3e94b2fa145..9b252934b206 100644
--- a/arch/arm/mach-vt8500/Kconfig
+++ b/arch/arm/mach-vt8500/Kconfig
@@ -7,6 +7,7 @@ config ARCH_VT8500
7 select GENERIC_CLOCKEVENTS 7 select GENERIC_CLOCKEVENTS
8 select HAVE_CLK 8 select HAVE_CLK
9 select VT8500_TIMER 9 select VT8500_TIMER
10 select PINCTRL
10 help 11 help
11 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 12 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
12 13
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 34f51d2d90d2..35e94009829b 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -229,6 +229,7 @@ config PINCTRL_EXYNOS5440
229source "drivers/pinctrl/mvebu/Kconfig" 229source "drivers/pinctrl/mvebu/Kconfig"
230source "drivers/pinctrl/sh-pfc/Kconfig" 230source "drivers/pinctrl/sh-pfc/Kconfig"
231source "drivers/pinctrl/spear/Kconfig" 231source "drivers/pinctrl/spear/Kconfig"
232source "drivers/pinctrl/vt8500/Kconfig"
232 233
233config PINCTRL_XWAY 234config PINCTRL_XWAY
234 bool 235 bool
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index f82cc5baf767..a5a52c83c13a 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -52,3 +52,4 @@ obj-$(CONFIG_PLAT_ORION) += mvebu/
52obj-$(CONFIG_ARCH_SHMOBILE) += sh-pfc/ 52obj-$(CONFIG_ARCH_SHMOBILE) += sh-pfc/
53obj-$(CONFIG_SUPERH) += sh-pfc/ 53obj-$(CONFIG_SUPERH) += sh-pfc/
54obj-$(CONFIG_PLAT_SPEAR) += spear/ 54obj-$(CONFIG_PLAT_SPEAR) += spear/
55obj-$(CONFIG_ARCH_VT8500) += vt8500/
diff --git a/drivers/pinctrl/vt8500/Kconfig b/drivers/pinctrl/vt8500/Kconfig
new file mode 100644
index 000000000000..55724a73d94a
--- /dev/null
+++ b/drivers/pinctrl/vt8500/Kconfig
@@ -0,0 +1,52 @@
1#
2# VIA/Wondermedia PINCTRL drivers
3#
4
5if ARCH_VT8500
6
7config PINCTRL_WMT
8 bool
9 select PINMUX
10 select GENERIC_PINCONF
11
12config PINCTRL_VT8500
13 bool "VIA VT8500 pin controller driver"
14 depends on ARCH_WM8505
15 select PINCTRL_WMT
16 help
17 Say yes here to support the gpio/pin control module on
18 VIA VT8500 SoCs.
19
20config PINCTRL_WM8505
21 bool "Wondermedia WM8505 pin controller driver"
22 depends on ARCH_WM8505
23 select PINCTRL_WMT
24 help
25 Say yes here to support the gpio/pin control module on
26 Wondermedia WM8505 SoCs.
27
28config PINCTRL_WM8650
29 bool "Wondermedia WM8650 pin controller driver"
30 depends on ARCH_WM8505
31 select PINCTRL_WMT
32 help
33 Say yes here to support the gpio/pin control module on
34 Wondermedia WM8650 SoCs.
35
36config PINCTRL_WM8750
37 bool "Wondermedia WM8750 pin controller driver"
38 depends on ARCH_WM8750
39 select PINCTRL_WMT
40 help
41 Say yes here to support the gpio/pin control module on
42 Wondermedia WM8750 SoCs.
43
44config PINCTRL_WM8850
45 bool "Wondermedia WM8850 pin controller driver"
46 depends on ARCH_WM8850
47 select PINCTRL_WMT
48 help
49 Say yes here to support the gpio/pin control module on
50 Wondermedia WM8850 SoCs.
51
52endif
diff --git a/drivers/pinctrl/vt8500/Makefile b/drivers/pinctrl/vt8500/Makefile
new file mode 100644
index 000000000000..24ec45dd0d80
--- /dev/null
+++ b/drivers/pinctrl/vt8500/Makefile
@@ -0,0 +1,8 @@
1# VIA/Wondermedia pinctrl support
2
3obj-$(CONFIG_PINCTRL_WMT) += pinctrl-wmt.o
4obj-$(CONFIG_PINCTRL_VT8500) += pinctrl-vt8500.o
5obj-$(CONFIG_PINCTRL_WM8505) += pinctrl-wm8505.o
6obj-$(CONFIG_PINCTRL_WM8650) += pinctrl-wm8650.o
7obj-$(CONFIG_PINCTRL_WM8750) += pinctrl-wm8750.o
8obj-$(CONFIG_PINCTRL_WM8850) += pinctrl-wm8850.o
diff --git a/drivers/pinctrl/vt8500/pinctrl-vt8500.c b/drivers/pinctrl/vt8500/pinctrl-vt8500.c
new file mode 100644
index 000000000000..f2fe9f85cfa6
--- /dev/null
+++ b/drivers/pinctrl/vt8500/pinctrl-vt8500.c
@@ -0,0 +1,501 @@
1/*
2 * Pinctrl data for VIA VT8500 SoC
3 *
4 * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21
22#include "pinctrl-wmt.h"
23
24/*
25 * Describe the register offsets within the GPIO memory space
26 * The dedicated external GPIO's should always be listed in bank 0
27 * so they are exported in the 0..31 range which is what users
28 * expect.
29 *
30 * Do not reorder these banks as it will change the pin numbering
31 */
32static const struct wmt_pinctrl_bank_registers vt8500_banks[] = {
33 WMT_PINCTRL_BANK(NO_REG, 0x3C, 0x5C, 0x7C, NO_REG, NO_REG), /* 0 */
34 WMT_PINCTRL_BANK(0x00, 0x20, 0x40, 0x60, NO_REG, NO_REG), /* 1 */
35 WMT_PINCTRL_BANK(0x04, 0x24, 0x44, 0x64, NO_REG, NO_REG), /* 2 */
36 WMT_PINCTRL_BANK(0x08, 0x28, 0x48, 0x68, NO_REG, NO_REG), /* 3 */
37 WMT_PINCTRL_BANK(0x0C, 0x2C, 0x4C, 0x6C, NO_REG, NO_REG), /* 4 */
38 WMT_PINCTRL_BANK(0x10, 0x30, 0x50, 0x70, NO_REG, NO_REG), /* 5 */
39 WMT_PINCTRL_BANK(0x14, 0x34, 0x54, 0x74, NO_REG, NO_REG), /* 6 */
40};
41
42/* Please keep sorted by bank/bit */
43#define WMT_PIN_EXTGPIO0 WMT_PIN(0, 0)
44#define WMT_PIN_EXTGPIO1 WMT_PIN(0, 1)
45#define WMT_PIN_EXTGPIO2 WMT_PIN(0, 2)
46#define WMT_PIN_EXTGPIO3 WMT_PIN(0, 3)
47#define WMT_PIN_EXTGPIO4 WMT_PIN(0, 4)
48#define WMT_PIN_EXTGPIO5 WMT_PIN(0, 5)
49#define WMT_PIN_EXTGPIO6 WMT_PIN(0, 6)
50#define WMT_PIN_EXTGPIO7 WMT_PIN(0, 7)
51#define WMT_PIN_EXTGPIO8 WMT_PIN(0, 8)
52#define WMT_PIN_UART0RTS WMT_PIN(1, 0)
53#define WMT_PIN_UART0TXD WMT_PIN(1, 1)
54#define WMT_PIN_UART0CTS WMT_PIN(1, 2)
55#define WMT_PIN_UART0RXD WMT_PIN(1, 3)
56#define WMT_PIN_UART1RTS WMT_PIN(1, 4)
57#define WMT_PIN_UART1TXD WMT_PIN(1, 5)
58#define WMT_PIN_UART1CTS WMT_PIN(1, 6)
59#define WMT_PIN_UART1RXD WMT_PIN(1, 7)
60#define WMT_PIN_SPI0CLK WMT_PIN(1, 8)
61#define WMT_PIN_SPI0SS WMT_PIN(1, 9)
62#define WMT_PIN_SPI0MISO WMT_PIN(1, 10)
63#define WMT_PIN_SPI0MOSI WMT_PIN(1, 11)
64#define WMT_PIN_SPI1CLK WMT_PIN(1, 12)
65#define WMT_PIN_SPI1SS WMT_PIN(1, 13)
66#define WMT_PIN_SPI1MISO WMT_PIN(1, 14)
67#define WMT_PIN_SPI1MOSI WMT_PIN(1, 15)
68#define WMT_PIN_SPI2CLK WMT_PIN(1, 16)
69#define WMT_PIN_SPI2SS WMT_PIN(1, 17)
70#define WMT_PIN_SPI2MISO WMT_PIN(1, 18)
71#define WMT_PIN_SPI2MOSI WMT_PIN(1, 19)
72#define WMT_PIN_SDDATA0 WMT_PIN(2, 0)
73#define WMT_PIN_SDDATA1 WMT_PIN(2, 1)
74#define WMT_PIN_SDDATA2 WMT_PIN(2, 2)
75#define WMT_PIN_SDDATA3 WMT_PIN(2, 3)
76#define WMT_PIN_MMCDATA0 WMT_PIN(2, 4)
77#define WMT_PIN_MMCDATA1 WMT_PIN(2, 5)
78#define WMT_PIN_MMCDATA2 WMT_PIN(2, 6)
79#define WMT_PIN_MMCDATA3 WMT_PIN(2, 7)
80#define WMT_PIN_SDCLK WMT_PIN(2, 8)
81#define WMT_PIN_SDWP WMT_PIN(2, 9)
82#define WMT_PIN_SDCMD WMT_PIN(2, 10)
83#define WMT_PIN_MSDATA0 WMT_PIN(2, 16)
84#define WMT_PIN_MSDATA1 WMT_PIN(2, 17)
85#define WMT_PIN_MSDATA2 WMT_PIN(2, 18)
86#define WMT_PIN_MSDATA3 WMT_PIN(2, 19)
87#define WMT_PIN_MSCLK WMT_PIN(2, 20)
88#define WMT_PIN_MSBS WMT_PIN(2, 21)
89#define WMT_PIN_MSINS WMT_PIN(2, 22)
90#define WMT_PIN_I2C0SCL WMT_PIN(2, 24)
91#define WMT_PIN_I2C0SDA WMT_PIN(2, 25)
92#define WMT_PIN_I2C1SCL WMT_PIN(2, 26)
93#define WMT_PIN_I2C1SDA WMT_PIN(2, 27)
94#define WMT_PIN_MII0RXD0 WMT_PIN(3, 0)
95#define WMT_PIN_MII0RXD1 WMT_PIN(3, 1)
96#define WMT_PIN_MII0RXD2 WMT_PIN(3, 2)
97#define WMT_PIN_MII0RXD3 WMT_PIN(3, 3)
98#define WMT_PIN_MII0RXCLK WMT_PIN(3, 4)
99#define WMT_PIN_MII0RXDV WMT_PIN(3, 5)
100#define WMT_PIN_MII0RXERR WMT_PIN(3, 6)
101#define WMT_PIN_MII0PHYRST WMT_PIN(3, 7)
102#define WMT_PIN_MII0TXD0 WMT_PIN(3, 8)
103#define WMT_PIN_MII0TXD1 WMT_PIN(3, 9)
104#define WMT_PIN_MII0TXD2 WMT_PIN(3, 10)
105#define WMT_PIN_MII0TXD3 WMT_PIN(3, 11)
106#define WMT_PIN_MII0TXCLK WMT_PIN(3, 12)
107#define WMT_PIN_MII0TXEN WMT_PIN(3, 13)
108#define WMT_PIN_MII0TXERR WMT_PIN(3, 14)
109#define WMT_PIN_MII0PHYPD WMT_PIN(3, 15)
110#define WMT_PIN_MII0COL WMT_PIN(3, 16)
111#define WMT_PIN_MII0CRS WMT_PIN(3, 17)
112#define WMT_PIN_MII0MDIO WMT_PIN(3, 18)
113#define WMT_PIN_MII0MDC WMT_PIN(3, 19)
114#define WMT_PIN_SEECS WMT_PIN(3, 20)
115#define WMT_PIN_SEECK WMT_PIN(3, 21)
116#define WMT_PIN_SEEDI WMT_PIN(3, 22)
117#define WMT_PIN_SEEDO WMT_PIN(3, 23)
118#define WMT_PIN_IDEDREQ0 WMT_PIN(3, 24)
119#define WMT_PIN_IDEDREQ1 WMT_PIN(3, 25)
120#define WMT_PIN_IDEIOW WMT_PIN(3, 26)
121#define WMT_PIN_IDEIOR WMT_PIN(3, 27)
122#define WMT_PIN_IDEDACK WMT_PIN(3, 28)
123#define WMT_PIN_IDEIORDY WMT_PIN(3, 29)
124#define WMT_PIN_IDEINTRQ WMT_PIN(3, 30)
125#define WMT_PIN_VDIN0 WMT_PIN(4, 0)
126#define WMT_PIN_VDIN1 WMT_PIN(4, 1)
127#define WMT_PIN_VDIN2 WMT_PIN(4, 2)
128#define WMT_PIN_VDIN3 WMT_PIN(4, 3)
129#define WMT_PIN_VDIN4 WMT_PIN(4, 4)
130#define WMT_PIN_VDIN5 WMT_PIN(4, 5)
131#define WMT_PIN_VDIN6 WMT_PIN(4, 6)
132#define WMT_PIN_VDIN7 WMT_PIN(4, 7)
133#define WMT_PIN_VDOUT0 WMT_PIN(4, 8)
134#define WMT_PIN_VDOUT1 WMT_PIN(4, 9)
135#define WMT_PIN_VDOUT2 WMT_PIN(4, 10)
136#define WMT_PIN_VDOUT3 WMT_PIN(4, 11)
137#define WMT_PIN_VDOUT4 WMT_PIN(4, 12)
138#define WMT_PIN_VDOUT5 WMT_PIN(4, 13)
139#define WMT_PIN_NANDCLE0 WMT_PIN(4, 14)
140#define WMT_PIN_NANDCLE1 WMT_PIN(4, 15)
141#define WMT_PIN_VDOUT6_7 WMT_PIN(4, 16)
142#define WMT_PIN_VHSYNC WMT_PIN(4, 17)
143#define WMT_PIN_VVSYNC WMT_PIN(4, 18)
144#define WMT_PIN_TSDIN0 WMT_PIN(5, 8)
145#define WMT_PIN_TSDIN1 WMT_PIN(5, 9)
146#define WMT_PIN_TSDIN2 WMT_PIN(5, 10)
147#define WMT_PIN_TSDIN3 WMT_PIN(5, 11)
148#define WMT_PIN_TSDIN4 WMT_PIN(5, 12)
149#define WMT_PIN_TSDIN5 WMT_PIN(5, 13)
150#define WMT_PIN_TSDIN6 WMT_PIN(5, 14)
151#define WMT_PIN_TSDIN7 WMT_PIN(5, 15)
152#define WMT_PIN_TSSYNC WMT_PIN(5, 16)
153#define WMT_PIN_TSVALID WMT_PIN(5, 17)
154#define WMT_PIN_TSCLK WMT_PIN(5, 18)
155#define WMT_PIN_LCDD0 WMT_PIN(6, 0)
156#define WMT_PIN_LCDD1 WMT_PIN(6, 1)
157#define WMT_PIN_LCDD2 WMT_PIN(6, 2)
158#define WMT_PIN_LCDD3 WMT_PIN(6, 3)
159#define WMT_PIN_LCDD4 WMT_PIN(6, 4)
160#define WMT_PIN_LCDD5 WMT_PIN(6, 5)
161#define WMT_PIN_LCDD6 WMT_PIN(6, 6)
162#define WMT_PIN_LCDD7 WMT_PIN(6, 7)
163#define WMT_PIN_LCDD8 WMT_PIN(6, 8)
164#define WMT_PIN_LCDD9 WMT_PIN(6, 9)
165#define WMT_PIN_LCDD10 WMT_PIN(6, 10)
166#define WMT_PIN_LCDD11 WMT_PIN(6, 11)
167#define WMT_PIN_LCDD12 WMT_PIN(6, 12)
168#define WMT_PIN_LCDD13 WMT_PIN(6, 13)
169#define WMT_PIN_LCDD14 WMT_PIN(6, 14)
170#define WMT_PIN_LCDD15 WMT_PIN(6, 15)
171#define WMT_PIN_LCDD16 WMT_PIN(6, 16)
172#define WMT_PIN_LCDD17 WMT_PIN(6, 17)
173#define WMT_PIN_LCDCLK WMT_PIN(6, 18)
174#define WMT_PIN_LCDDEN WMT_PIN(6, 19)
175#define WMT_PIN_LCDLINE WMT_PIN(6, 20)
176#define WMT_PIN_LCDFRM WMT_PIN(6, 21)
177#define WMT_PIN_LCDBIAS WMT_PIN(6, 22)
178
179static const struct pinctrl_pin_desc vt8500_pins[] = {
180 PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
181 PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
182 PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
183 PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
184 PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
185 PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
186 PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
187 PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
188 PINCTRL_PIN(WMT_PIN_EXTGPIO8, "extgpio8"),
189 PINCTRL_PIN(WMT_PIN_UART0RTS, "uart0_rts"),
190 PINCTRL_PIN(WMT_PIN_UART0TXD, "uart0_txd"),
191 PINCTRL_PIN(WMT_PIN_UART0CTS, "uart0_cts"),
192 PINCTRL_PIN(WMT_PIN_UART0RXD, "uart0_rxd"),
193 PINCTRL_PIN(WMT_PIN_UART1RTS, "uart1_rts"),
194 PINCTRL_PIN(WMT_PIN_UART1TXD, "uart1_txd"),
195 PINCTRL_PIN(WMT_PIN_UART1CTS, "uart1_cts"),
196 PINCTRL_PIN(WMT_PIN_UART1RXD, "uart1_rxd"),
197 PINCTRL_PIN(WMT_PIN_SPI0CLK, "spi0_clk"),
198 PINCTRL_PIN(WMT_PIN_SPI0SS, "spi0_ss"),
199 PINCTRL_PIN(WMT_PIN_SPI0MISO, "spi0_miso"),
200 PINCTRL_PIN(WMT_PIN_SPI0MOSI, "spi0_mosi"),
201 PINCTRL_PIN(WMT_PIN_SPI1CLK, "spi1_clk"),
202 PINCTRL_PIN(WMT_PIN_SPI1SS, "spi1_ss"),
203 PINCTRL_PIN(WMT_PIN_SPI1MISO, "spi1_miso"),
204 PINCTRL_PIN(WMT_PIN_SPI1MOSI, "spi1_mosi"),
205 PINCTRL_PIN(WMT_PIN_SPI2CLK, "spi2_clk"),
206 PINCTRL_PIN(WMT_PIN_SPI2SS, "spi2_ss"),
207 PINCTRL_PIN(WMT_PIN_SPI2MISO, "spi2_miso"),
208 PINCTRL_PIN(WMT_PIN_SPI2MOSI, "spi2_mosi"),
209 PINCTRL_PIN(WMT_PIN_SDDATA0, "sd_data0"),
210 PINCTRL_PIN(WMT_PIN_SDDATA1, "sd_data1"),
211 PINCTRL_PIN(WMT_PIN_SDDATA2, "sd_data2"),
212 PINCTRL_PIN(WMT_PIN_SDDATA3, "sd_data3"),
213 PINCTRL_PIN(WMT_PIN_MMCDATA0, "mmc_data0"),
214 PINCTRL_PIN(WMT_PIN_MMCDATA1, "mmc_data1"),
215 PINCTRL_PIN(WMT_PIN_MMCDATA2, "mmc_data2"),
216 PINCTRL_PIN(WMT_PIN_MMCDATA3, "mmc_data3"),
217 PINCTRL_PIN(WMT_PIN_SDCLK, "sd_clk"),
218 PINCTRL_PIN(WMT_PIN_SDWP, "sd_wp"),
219 PINCTRL_PIN(WMT_PIN_SDCMD, "sd_cmd"),
220 PINCTRL_PIN(WMT_PIN_MSDATA0, "ms_data0"),
221 PINCTRL_PIN(WMT_PIN_MSDATA1, "ms_data1"),
222 PINCTRL_PIN(WMT_PIN_MSDATA2, "ms_data2"),
223 PINCTRL_PIN(WMT_PIN_MSDATA3, "ms_data3"),
224 PINCTRL_PIN(WMT_PIN_MSCLK, "ms_clk"),
225 PINCTRL_PIN(WMT_PIN_MSBS, "ms_bs"),
226 PINCTRL_PIN(WMT_PIN_MSINS, "ms_ins"),
227 PINCTRL_PIN(WMT_PIN_I2C0SCL, "i2c0_scl"),
228 PINCTRL_PIN(WMT_PIN_I2C0SDA, "i2c0_sda"),
229 PINCTRL_PIN(WMT_PIN_I2C1SCL, "i2c1_scl"),
230 PINCTRL_PIN(WMT_PIN_I2C1SDA, "i2c1_sda"),
231 PINCTRL_PIN(WMT_PIN_MII0RXD0, "mii0_rxd0"),
232 PINCTRL_PIN(WMT_PIN_MII0RXD1, "mii0_rxd1"),
233 PINCTRL_PIN(WMT_PIN_MII0RXD2, "mii0_rxd2"),
234 PINCTRL_PIN(WMT_PIN_MII0RXD3, "mii0_rxd3"),
235 PINCTRL_PIN(WMT_PIN_MII0RXCLK, "mii0_rxclk"),
236 PINCTRL_PIN(WMT_PIN_MII0RXDV, "mii0_rxdv"),
237 PINCTRL_PIN(WMT_PIN_MII0RXERR, "mii0_rxerr"),
238 PINCTRL_PIN(WMT_PIN_MII0PHYRST, "mii0_phyrst"),
239 PINCTRL_PIN(WMT_PIN_MII0TXD0, "mii0_txd0"),
240 PINCTRL_PIN(WMT_PIN_MII0TXD1, "mii0_txd1"),
241 PINCTRL_PIN(WMT_PIN_MII0TXD2, "mii0_txd2"),
242 PINCTRL_PIN(WMT_PIN_MII0TXD3, "mii0_txd3"),
243 PINCTRL_PIN(WMT_PIN_MII0TXCLK, "mii0_txclk"),
244 PINCTRL_PIN(WMT_PIN_MII0TXEN, "mii0_txen"),
245 PINCTRL_PIN(WMT_PIN_MII0TXERR, "mii0_txerr"),
246 PINCTRL_PIN(WMT_PIN_MII0PHYPD, "mii0_phypd"),
247 PINCTRL_PIN(WMT_PIN_MII0COL, "mii0_col"),
248 PINCTRL_PIN(WMT_PIN_MII0CRS, "mii0_crs"),
249 PINCTRL_PIN(WMT_PIN_MII0MDIO, "mii0_mdio"),
250 PINCTRL_PIN(WMT_PIN_MII0MDC, "mii0_mdc"),
251 PINCTRL_PIN(WMT_PIN_SEECS, "see_cs"),
252 PINCTRL_PIN(WMT_PIN_SEECK, "see_ck"),
253 PINCTRL_PIN(WMT_PIN_SEEDI, "see_di"),
254 PINCTRL_PIN(WMT_PIN_SEEDO, "see_do"),
255 PINCTRL_PIN(WMT_PIN_IDEDREQ0, "ide_dreq0"),
256 PINCTRL_PIN(WMT_PIN_IDEDREQ1, "ide_dreq1"),
257 PINCTRL_PIN(WMT_PIN_IDEIOW, "ide_iow"),
258 PINCTRL_PIN(WMT_PIN_IDEIOR, "ide_ior"),
259 PINCTRL_PIN(WMT_PIN_IDEDACK, "ide_dack"),
260 PINCTRL_PIN(WMT_PIN_IDEIORDY, "ide_iordy"),
261 PINCTRL_PIN(WMT_PIN_IDEINTRQ, "ide_intrq"),
262 PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
263 PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
264 PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
265 PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
266 PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
267 PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
268 PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
269 PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
270 PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
271 PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
272 PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
273 PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
274 PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
275 PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
276 PINCTRL_PIN(WMT_PIN_NANDCLE0, "nand_cle0"),
277 PINCTRL_PIN(WMT_PIN_NANDCLE1, "nand_cle1"),
278 PINCTRL_PIN(WMT_PIN_VDOUT6_7, "vdout6_7"),
279 PINCTRL_PIN(WMT_PIN_VHSYNC, "vhsync"),
280 PINCTRL_PIN(WMT_PIN_VVSYNC, "vvsync"),
281 PINCTRL_PIN(WMT_PIN_TSDIN0, "tsdin0"),
282 PINCTRL_PIN(WMT_PIN_TSDIN1, "tsdin1"),
283 PINCTRL_PIN(WMT_PIN_TSDIN2, "tsdin2"),
284 PINCTRL_PIN(WMT_PIN_TSDIN3, "tsdin3"),
285 PINCTRL_PIN(WMT_PIN_TSDIN4, "tsdin4"),
286 PINCTRL_PIN(WMT_PIN_TSDIN5, "tsdin5"),
287 PINCTRL_PIN(WMT_PIN_TSDIN6, "tsdin6"),
288 PINCTRL_PIN(WMT_PIN_TSDIN7, "tsdin7"),
289 PINCTRL_PIN(WMT_PIN_TSSYNC, "tssync"),
290 PINCTRL_PIN(WMT_PIN_TSVALID, "tsvalid"),
291 PINCTRL_PIN(WMT_PIN_TSCLK, "tsclk"),
292 PINCTRL_PIN(WMT_PIN_LCDD0, "lcd_d0"),
293 PINCTRL_PIN(WMT_PIN_LCDD1, "lcd_d1"),
294 PINCTRL_PIN(WMT_PIN_LCDD2, "lcd_d2"),
295 PINCTRL_PIN(WMT_PIN_LCDD3, "lcd_d3"),
296 PINCTRL_PIN(WMT_PIN_LCDD4, "lcd_d4"),
297 PINCTRL_PIN(WMT_PIN_LCDD5, "lcd_d5"),
298 PINCTRL_PIN(WMT_PIN_LCDD6, "lcd_d6"),
299 PINCTRL_PIN(WMT_PIN_LCDD7, "lcd_d7"),
300 PINCTRL_PIN(WMT_PIN_LCDD8, "lcd_d8"),
301 PINCTRL_PIN(WMT_PIN_LCDD9, "lcd_d9"),
302 PINCTRL_PIN(WMT_PIN_LCDD10, "lcd_d10"),
303 PINCTRL_PIN(WMT_PIN_LCDD11, "lcd_d11"),
304 PINCTRL_PIN(WMT_PIN_LCDD12, "lcd_d12"),
305 PINCTRL_PIN(WMT_PIN_LCDD13, "lcd_d13"),
306 PINCTRL_PIN(WMT_PIN_LCDD14, "lcd_d14"),
307 PINCTRL_PIN(WMT_PIN_LCDD15, "lcd_d15"),
308 PINCTRL_PIN(WMT_PIN_LCDD16, "lcd_d16"),
309 PINCTRL_PIN(WMT_PIN_LCDD17, "lcd_d17"),
310 PINCTRL_PIN(WMT_PIN_LCDCLK, "lcd_clk"),
311 PINCTRL_PIN(WMT_PIN_LCDDEN, "lcd_den"),
312 PINCTRL_PIN(WMT_PIN_LCDLINE, "lcd_line"),
313 PINCTRL_PIN(WMT_PIN_LCDFRM, "lcd_frm"),
314 PINCTRL_PIN(WMT_PIN_LCDBIAS, "lcd_bias"),
315};
316
317/* Order of these names must match the above list */
318static const char * const vt8500_groups[] = {
319 "extgpio0",
320 "extgpio1",
321 "extgpio2",
322 "extgpio3",
323 "extgpio4",
324 "extgpio5",
325 "extgpio6",
326 "extgpio7",
327 "extgpio8",
328 "uart0_rts",
329 "uart0_txd",
330 "uart0_cts",
331 "uart0_rxd",
332 "uart1_rts",
333 "uart1_txd",
334 "uart1_cts",
335 "uart1_rxd",
336 "spi0_clk",
337 "spi0_ss",
338 "spi0_miso",
339 "spi0_mosi",
340 "spi1_clk",
341 "spi1_ss",
342 "spi1_miso",
343 "spi1_mosi",
344 "spi2_clk",
345 "spi2_ss",
346 "spi2_miso",
347 "spi2_mosi",
348 "sd_data0",
349 "sd_data1",
350 "sd_data2",
351 "sd_data3",
352 "mmc_data0",
353 "mmc_data1",
354 "mmc_data2",
355 "mmc_data3",
356 "sd_clk",
357 "sd_wp",
358 "sd_cmd",
359 "ms_data0",
360 "ms_data1",
361 "ms_data2",
362 "ms_data3",
363 "ms_clk",
364 "ms_bs",
365 "ms_ins",
366 "i2c0_scl",
367 "i2c0_sda",
368 "i2c1_scl",
369 "i2c1_sda",
370 "mii0_rxd0",
371 "mii0_rxd1",
372 "mii0_rxd2",
373 "mii0_rxd3",
374 "mii0_rxclk",
375 "mii0_rxdv",
376 "mii0_rxerr",
377 "mii0_phyrst",
378 "mii0_txd0",
379 "mii0_txd1",
380 "mii0_txd2",
381 "mii0_txd3",
382 "mii0_txclk",
383 "mii0_txen",
384 "mii0_txerr",
385 "mii0_phypd",
386 "mii0_col",
387 "mii0_crs",
388 "mii0_mdio",
389 "mii0_mdc",
390 "see_cs",
391 "see_ck",
392 "see_di",
393 "see_do",
394 "ide_dreq0",
395 "ide_dreq1",
396 "ide_iow",
397 "ide_ior",
398 "ide_dack",
399 "ide_iordy",
400 "ide_intrq",
401 "vdin0",
402 "vdin1",
403 "vdin2",
404 "vdin3",
405 "vdin4",
406 "vdin5",
407 "vdin6",
408 "vdin7",
409 "vdout0",
410 "vdout1",
411 "vdout2",
412 "vdout3",
413 "vdout4",
414 "vdout5",
415 "nand_cle0",
416 "nand_cle1",
417 "vdout6_7",
418 "vhsync",
419 "vvsync",
420 "tsdin0",
421 "tsdin1",
422 "tsdin2",
423 "tsdin3",
424 "tsdin4",
425 "tsdin5",
426 "tsdin6",
427 "tsdin7",
428 "tssync",
429 "tsvalid",
430 "tsclk",
431 "lcd_d0",
432 "lcd_d1",
433 "lcd_d2",
434 "lcd_d3",
435 "lcd_d4",
436 "lcd_d5",
437 "lcd_d6",
438 "lcd_d7",
439 "lcd_d8",
440 "lcd_d9",
441 "lcd_d10",
442 "lcd_d11",
443 "lcd_d12",
444 "lcd_d13",
445 "lcd_d14",
446 "lcd_d15",
447 "lcd_d16",
448 "lcd_d17",
449 "lcd_clk",
450 "lcd_den",
451 "lcd_line",
452 "lcd_frm",
453 "lcd_bias",
454};
455
456static int vt8500_pinctrl_probe(struct platform_device *pdev)
457{
458 struct wmt_pinctrl_data *data;
459
460 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
461 if (!data) {
462 dev_err(&pdev->dev, "failed to allocate data\n");
463 return -ENOMEM;
464 }
465
466 data->banks = vt8500_banks;
467 data->nbanks = ARRAY_SIZE(vt8500_banks);
468 data->pins = vt8500_pins;
469 data->npins = ARRAY_SIZE(vt8500_pins);
470 data->groups = vt8500_groups;
471 data->ngroups = ARRAY_SIZE(vt8500_groups);
472
473 return wmt_pinctrl_probe(pdev, data);
474}
475
476static int vt8500_pinctrl_remove(struct platform_device *pdev)
477{
478 return wmt_pinctrl_remove(pdev);
479}
480
481static struct of_device_id wmt_pinctrl_of_match[] = {
482 { .compatible = "via,vt8500-pinctrl" },
483 { /* sentinel */ },
484};
485
486static struct platform_driver wmt_pinctrl_driver = {
487 .probe = vt8500_pinctrl_probe,
488 .remove = vt8500_pinctrl_remove,
489 .driver = {
490 .name = "pinctrl-vt8500",
491 .owner = THIS_MODULE,
492 .of_match_table = wmt_pinctrl_of_match,
493 },
494};
495
496module_platform_driver(wmt_pinctrl_driver);
497
498MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
499MODULE_DESCRIPTION("VIA VT8500 Pincontrol driver");
500MODULE_LICENSE("GPL v2");
501MODULE_DEVICE_TABLE(of, wmt_pinctrl_of_match);
diff --git a/drivers/pinctrl/vt8500/pinctrl-wm8505.c b/drivers/pinctrl/vt8500/pinctrl-wm8505.c
new file mode 100644
index 000000000000..483ba732694e
--- /dev/null
+++ b/drivers/pinctrl/vt8500/pinctrl-wm8505.c
@@ -0,0 +1,532 @@
1/*
2 * Pinctrl data for Wondermedia WM8505 SoC
3 *
4 * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21
22#include "pinctrl-wmt.h"
23
24/*
25 * Describe the register offsets within the GPIO memory space
26 * The dedicated external GPIO's should always be listed in bank 0
27 * so they are exported in the 0..31 range which is what users
28 * expect.
29 *
30 * Do not reorder these banks as it will change the pin numbering
31 */
32static const struct wmt_pinctrl_bank_registers wm8505_banks[] = {
33 WMT_PINCTRL_BANK(0x64, 0x8C, 0xB4, 0xDC, NO_REG, NO_REG), /* 0 */
34 WMT_PINCTRL_BANK(0x40, 0x68, 0x90, 0xB8, NO_REG, NO_REG), /* 1 */
35 WMT_PINCTRL_BANK(0x44, 0x6C, 0x94, 0xBC, NO_REG, NO_REG), /* 2 */
36 WMT_PINCTRL_BANK(0x48, 0x70, 0x98, 0xC0, NO_REG, NO_REG), /* 3 */
37 WMT_PINCTRL_BANK(0x4C, 0x74, 0x9C, 0xC4, NO_REG, NO_REG), /* 4 */
38 WMT_PINCTRL_BANK(0x50, 0x78, 0xA0, 0xC8, NO_REG, NO_REG), /* 5 */
39 WMT_PINCTRL_BANK(0x54, 0x7C, 0xA4, 0xD0, NO_REG, NO_REG), /* 6 */
40 WMT_PINCTRL_BANK(0x58, 0x80, 0xA8, 0xD4, NO_REG, NO_REG), /* 7 */
41 WMT_PINCTRL_BANK(0x5C, 0x84, 0xAC, 0xD8, NO_REG, NO_REG), /* 8 */
42 WMT_PINCTRL_BANK(0x60, 0x88, 0xB0, 0xDC, NO_REG, NO_REG), /* 9 */
43 WMT_PINCTRL_BANK(0x500, 0x504, 0x508, 0x50C, NO_REG, NO_REG), /* 10 */
44};
45
46/* Please keep sorted by bank/bit */
47#define WMT_PIN_EXTGPIO0 WMT_PIN(0, 0)
48#define WMT_PIN_EXTGPIO1 WMT_PIN(0, 1)
49#define WMT_PIN_EXTGPIO2 WMT_PIN(0, 2)
50#define WMT_PIN_EXTGPIO3 WMT_PIN(0, 3)
51#define WMT_PIN_EXTGPIO4 WMT_PIN(0, 4)
52#define WMT_PIN_EXTGPIO5 WMT_PIN(0, 5)
53#define WMT_PIN_EXTGPIO6 WMT_PIN(0, 6)
54#define WMT_PIN_EXTGPIO7 WMT_PIN(0, 7)
55#define WMT_PIN_WAKEUP0 WMT_PIN(0, 16)
56#define WMT_PIN_WAKEUP1 WMT_PIN(0, 17)
57#define WMT_PIN_WAKEUP2 WMT_PIN(0, 18)
58#define WMT_PIN_WAKEUP3 WMT_PIN(0, 19)
59#define WMT_PIN_SUSGPIO0 WMT_PIN(0, 21)
60#define WMT_PIN_SDDATA0 WMT_PIN(1, 0)
61#define WMT_PIN_SDDATA1 WMT_PIN(1, 1)
62#define WMT_PIN_SDDATA2 WMT_PIN(1, 2)
63#define WMT_PIN_SDDATA3 WMT_PIN(1, 3)
64#define WMT_PIN_MMCDATA0 WMT_PIN(1, 4)
65#define WMT_PIN_MMCDATA1 WMT_PIN(1, 5)
66#define WMT_PIN_MMCDATA2 WMT_PIN(1, 6)
67#define WMT_PIN_MMCDATA3 WMT_PIN(1, 7)
68#define WMT_PIN_VDIN0 WMT_PIN(2, 0)
69#define WMT_PIN_VDIN1 WMT_PIN(2, 1)
70#define WMT_PIN_VDIN2 WMT_PIN(2, 2)
71#define WMT_PIN_VDIN3 WMT_PIN(2, 3)
72#define WMT_PIN_VDIN4 WMT_PIN(2, 4)
73#define WMT_PIN_VDIN5 WMT_PIN(2, 5)
74#define WMT_PIN_VDIN6 WMT_PIN(2, 6)
75#define WMT_PIN_VDIN7 WMT_PIN(2, 7)
76#define WMT_PIN_VDOUT0 WMT_PIN(2, 8)
77#define WMT_PIN_VDOUT1 WMT_PIN(2, 9)
78#define WMT_PIN_VDOUT2 WMT_PIN(2, 10)
79#define WMT_PIN_VDOUT3 WMT_PIN(2, 11)
80#define WMT_PIN_VDOUT4 WMT_PIN(2, 12)
81#define WMT_PIN_VDOUT5 WMT_PIN(2, 13)
82#define WMT_PIN_VDOUT6 WMT_PIN(2, 14)
83#define WMT_PIN_VDOUT7 WMT_PIN(2, 15)
84#define WMT_PIN_VDOUT8 WMT_PIN(2, 16)
85#define WMT_PIN_VDOUT9 WMT_PIN(2, 17)
86#define WMT_PIN_VDOUT10 WMT_PIN(2, 18)
87#define WMT_PIN_VDOUT11 WMT_PIN(2, 19)
88#define WMT_PIN_VDOUT12 WMT_PIN(2, 20)
89#define WMT_PIN_VDOUT13 WMT_PIN(2, 21)
90#define WMT_PIN_VDOUT14 WMT_PIN(2, 22)
91#define WMT_PIN_VDOUT15 WMT_PIN(2, 23)
92#define WMT_PIN_VDOUT16 WMT_PIN(2, 24)
93#define WMT_PIN_VDOUT17 WMT_PIN(2, 25)
94#define WMT_PIN_VDOUT18 WMT_PIN(2, 26)
95#define WMT_PIN_VDOUT19 WMT_PIN(2, 27)
96#define WMT_PIN_VDOUT20 WMT_PIN(2, 28)
97#define WMT_PIN_VDOUT21 WMT_PIN(2, 29)
98#define WMT_PIN_VDOUT22 WMT_PIN(2, 30)
99#define WMT_PIN_VDOUT23 WMT_PIN(2, 31)
100#define WMT_PIN_VHSYNC WMT_PIN(3, 0)
101#define WMT_PIN_VVSYNC WMT_PIN(3, 1)
102#define WMT_PIN_VGAHSYNC WMT_PIN(3, 2)
103#define WMT_PIN_VGAVSYNC WMT_PIN(3, 3)
104#define WMT_PIN_VDHSYNC WMT_PIN(3, 4)
105#define WMT_PIN_VDVSYNC WMT_PIN(3, 5)
106#define WMT_PIN_NORD0 WMT_PIN(4, 0)
107#define WMT_PIN_NORD1 WMT_PIN(4, 1)
108#define WMT_PIN_NORD2 WMT_PIN(4, 2)
109#define WMT_PIN_NORD3 WMT_PIN(4, 3)
110#define WMT_PIN_NORD4 WMT_PIN(4, 4)
111#define WMT_PIN_NORD5 WMT_PIN(4, 5)
112#define WMT_PIN_NORD6 WMT_PIN(4, 6)
113#define WMT_PIN_NORD7 WMT_PIN(4, 7)
114#define WMT_PIN_NORD8 WMT_PIN(4, 8)
115#define WMT_PIN_NORD9 WMT_PIN(4, 9)
116#define WMT_PIN_NORD10 WMT_PIN(4, 10)
117#define WMT_PIN_NORD11 WMT_PIN(4, 11)
118#define WMT_PIN_NORD12 WMT_PIN(4, 12)
119#define WMT_PIN_NORD13 WMT_PIN(4, 13)
120#define WMT_PIN_NORD14 WMT_PIN(4, 14)
121#define WMT_PIN_NORD15 WMT_PIN(4, 15)
122#define WMT_PIN_NORA0 WMT_PIN(5, 0)
123#define WMT_PIN_NORA1 WMT_PIN(5, 1)
124#define WMT_PIN_NORA2 WMT_PIN(5, 2)
125#define WMT_PIN_NORA3 WMT_PIN(5, 3)
126#define WMT_PIN_NORA4 WMT_PIN(5, 4)
127#define WMT_PIN_NORA5 WMT_PIN(5, 5)
128#define WMT_PIN_NORA6 WMT_PIN(5, 6)
129#define WMT_PIN_NORA7 WMT_PIN(5, 7)
130#define WMT_PIN_NORA8 WMT_PIN(5, 8)
131#define WMT_PIN_NORA9 WMT_PIN(5, 9)
132#define WMT_PIN_NORA10 WMT_PIN(5, 10)
133#define WMT_PIN_NORA11 WMT_PIN(5, 11)
134#define WMT_PIN_NORA12 WMT_PIN(5, 12)
135#define WMT_PIN_NORA13 WMT_PIN(5, 13)
136#define WMT_PIN_NORA14 WMT_PIN(5, 14)
137#define WMT_PIN_NORA15 WMT_PIN(5, 15)
138#define WMT_PIN_NORA16 WMT_PIN(5, 16)
139#define WMT_PIN_NORA17 WMT_PIN(5, 17)
140#define WMT_PIN_NORA18 WMT_PIN(5, 18)
141#define WMT_PIN_NORA19 WMT_PIN(5, 19)
142#define WMT_PIN_NORA20 WMT_PIN(5, 20)
143#define WMT_PIN_NORA21 WMT_PIN(5, 21)
144#define WMT_PIN_NORA22 WMT_PIN(5, 22)
145#define WMT_PIN_NORA23 WMT_PIN(5, 23)
146#define WMT_PIN_NORA24 WMT_PIN(5, 24)
147#define WMT_PIN_AC97SDI WMT_PIN(6, 0)
148#define WMT_PIN_AC97SYNC WMT_PIN(6, 1)
149#define WMT_PIN_AC97SDO WMT_PIN(6, 2)
150#define WMT_PIN_AC97BCLK WMT_PIN(6, 3)
151#define WMT_PIN_AC97RST WMT_PIN(6, 4)
152#define WMT_PIN_SFDO WMT_PIN(7, 0)
153#define WMT_PIN_SFCS0 WMT_PIN(7, 1)
154#define WMT_PIN_SFCS1 WMT_PIN(7, 2)
155#define WMT_PIN_SFCLK WMT_PIN(7, 3)
156#define WMT_PIN_SFDI WMT_PIN(7, 4)
157#define WMT_PIN_SPI0CLK WMT_PIN(8, 0)
158#define WMT_PIN_SPI0MISO WMT_PIN(8, 1)
159#define WMT_PIN_SPI0MOSI WMT_PIN(8, 2)
160#define WMT_PIN_SPI0SS WMT_PIN(8, 3)
161#define WMT_PIN_SPI1CLK WMT_PIN(8, 4)
162#define WMT_PIN_SPI1MISO WMT_PIN(8, 5)
163#define WMT_PIN_SPI1MOSI WMT_PIN(8, 6)
164#define WMT_PIN_SPI1SS WMT_PIN(8, 7)
165#define WMT_PIN_SPI2CLK WMT_PIN(8, 8)
166#define WMT_PIN_SPI2MISO WMT_PIN(8, 9)
167#define WMT_PIN_SPI2MOSI WMT_PIN(8, 10)
168#define WMT_PIN_SPI2SS WMT_PIN(8, 11)
169#define WMT_PIN_UART0_RTS WMT_PIN(9, 0)
170#define WMT_PIN_UART0_TXD WMT_PIN(9, 1)
171#define WMT_PIN_UART0_CTS WMT_PIN(9, 2)
172#define WMT_PIN_UART0_RXD WMT_PIN(9, 3)
173#define WMT_PIN_UART1_RTS WMT_PIN(9, 4)
174#define WMT_PIN_UART1_TXD WMT_PIN(9, 5)
175#define WMT_PIN_UART1_CTS WMT_PIN(9, 6)
176#define WMT_PIN_UART1_RXD WMT_PIN(9, 7)
177#define WMT_PIN_UART2_RTS WMT_PIN(9, 8)
178#define WMT_PIN_UART2_TXD WMT_PIN(9, 9)
179#define WMT_PIN_UART2_CTS WMT_PIN(9, 10)
180#define WMT_PIN_UART2_RXD WMT_PIN(9, 11)
181#define WMT_PIN_UART3_RTS WMT_PIN(9, 12)
182#define WMT_PIN_UART3_TXD WMT_PIN(9, 13)
183#define WMT_PIN_UART3_CTS WMT_PIN(9, 14)
184#define WMT_PIN_UART3_RXD WMT_PIN(9, 15)
185#define WMT_PIN_I2C0SCL WMT_PIN(10, 0)
186#define WMT_PIN_I2C0SDA WMT_PIN(10, 1)
187#define WMT_PIN_I2C1SCL WMT_PIN(10, 2)
188#define WMT_PIN_I2C1SDA WMT_PIN(10, 3)
189#define WMT_PIN_I2C2SCL WMT_PIN(10, 4)
190#define WMT_PIN_I2C2SDA WMT_PIN(10, 5)
191
192static const struct pinctrl_pin_desc wm8505_pins[] = {
193 PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
194 PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
195 PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
196 PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
197 PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
198 PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
199 PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
200 PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
201 PINCTRL_PIN(WMT_PIN_WAKEUP0, "wakeup0"),
202 PINCTRL_PIN(WMT_PIN_WAKEUP1, "wakeup1"),
203 PINCTRL_PIN(WMT_PIN_WAKEUP2, "wakeup2"),
204 PINCTRL_PIN(WMT_PIN_WAKEUP3, "wakeup3"),
205 PINCTRL_PIN(WMT_PIN_SUSGPIO0, "susgpio0"),
206 PINCTRL_PIN(WMT_PIN_SDDATA0, "sd_data0"),
207 PINCTRL_PIN(WMT_PIN_SDDATA1, "sd_data1"),
208 PINCTRL_PIN(WMT_PIN_SDDATA2, "sd_data2"),
209 PINCTRL_PIN(WMT_PIN_SDDATA3, "sd_data3"),
210 PINCTRL_PIN(WMT_PIN_MMCDATA0, "mmc_data0"),
211 PINCTRL_PIN(WMT_PIN_MMCDATA1, "mmc_data1"),
212 PINCTRL_PIN(WMT_PIN_MMCDATA2, "mmc_data2"),
213 PINCTRL_PIN(WMT_PIN_MMCDATA3, "mmc_data3"),
214 PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
215 PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
216 PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
217 PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
218 PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
219 PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
220 PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
221 PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
222 PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
223 PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
224 PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
225 PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
226 PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
227 PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
228 PINCTRL_PIN(WMT_PIN_VDOUT6, "vdout6"),
229 PINCTRL_PIN(WMT_PIN_VDOUT7, "vdout7"),
230 PINCTRL_PIN(WMT_PIN_VDOUT8, "vdout8"),
231 PINCTRL_PIN(WMT_PIN_VDOUT9, "vdout9"),
232 PINCTRL_PIN(WMT_PIN_VDOUT10, "vdout10"),
233 PINCTRL_PIN(WMT_PIN_VDOUT11, "vdout11"),
234 PINCTRL_PIN(WMT_PIN_VDOUT12, "vdout12"),
235 PINCTRL_PIN(WMT_PIN_VDOUT13, "vdout13"),
236 PINCTRL_PIN(WMT_PIN_VDOUT14, "vdout14"),
237 PINCTRL_PIN(WMT_PIN_VDOUT15, "vdout15"),
238 PINCTRL_PIN(WMT_PIN_VDOUT16, "vdout16"),
239 PINCTRL_PIN(WMT_PIN_VDOUT17, "vdout17"),
240 PINCTRL_PIN(WMT_PIN_VDOUT18, "vdout18"),
241 PINCTRL_PIN(WMT_PIN_VDOUT19, "vdout19"),
242 PINCTRL_PIN(WMT_PIN_VDOUT20, "vdout20"),
243 PINCTRL_PIN(WMT_PIN_VDOUT21, "vdout21"),
244 PINCTRL_PIN(WMT_PIN_VDOUT22, "vdout22"),
245 PINCTRL_PIN(WMT_PIN_VDOUT23, "vdout23"),
246 PINCTRL_PIN(WMT_PIN_VHSYNC, "v_hsync"),
247 PINCTRL_PIN(WMT_PIN_VVSYNC, "v_vsync"),
248 PINCTRL_PIN(WMT_PIN_VGAHSYNC, "vga_hsync"),
249 PINCTRL_PIN(WMT_PIN_VGAVSYNC, "vga_vsync"),
250 PINCTRL_PIN(WMT_PIN_VDHSYNC, "vd_hsync"),
251 PINCTRL_PIN(WMT_PIN_VDVSYNC, "vd_vsync"),
252 PINCTRL_PIN(WMT_PIN_NORD0, "nor_d0"),
253 PINCTRL_PIN(WMT_PIN_NORD1, "nor_d1"),
254 PINCTRL_PIN(WMT_PIN_NORD2, "nor_d2"),
255 PINCTRL_PIN(WMT_PIN_NORD3, "nor_d3"),
256 PINCTRL_PIN(WMT_PIN_NORD4, "nor_d4"),
257 PINCTRL_PIN(WMT_PIN_NORD5, "nor_d5"),
258 PINCTRL_PIN(WMT_PIN_NORD6, "nor_d6"),
259 PINCTRL_PIN(WMT_PIN_NORD7, "nor_d7"),
260 PINCTRL_PIN(WMT_PIN_NORD8, "nor_d8"),
261 PINCTRL_PIN(WMT_PIN_NORD9, "nor_d9"),
262 PINCTRL_PIN(WMT_PIN_NORD10, "nor_d10"),
263 PINCTRL_PIN(WMT_PIN_NORD11, "nor_d11"),
264 PINCTRL_PIN(WMT_PIN_NORD12, "nor_d12"),
265 PINCTRL_PIN(WMT_PIN_NORD13, "nor_d13"),
266 PINCTRL_PIN(WMT_PIN_NORD14, "nor_d14"),
267 PINCTRL_PIN(WMT_PIN_NORD15, "nor_d15"),
268 PINCTRL_PIN(WMT_PIN_NORA0, "nor_a0"),
269 PINCTRL_PIN(WMT_PIN_NORA1, "nor_a1"),
270 PINCTRL_PIN(WMT_PIN_NORA2, "nor_a2"),
271 PINCTRL_PIN(WMT_PIN_NORA3, "nor_a3"),
272 PINCTRL_PIN(WMT_PIN_NORA4, "nor_a4"),
273 PINCTRL_PIN(WMT_PIN_NORA5, "nor_a5"),
274 PINCTRL_PIN(WMT_PIN_NORA6, "nor_a6"),
275 PINCTRL_PIN(WMT_PIN_NORA7, "nor_a7"),
276 PINCTRL_PIN(WMT_PIN_NORA8, "nor_a8"),
277 PINCTRL_PIN(WMT_PIN_NORA9, "nor_a9"),
278 PINCTRL_PIN(WMT_PIN_NORA10, "nor_a10"),
279 PINCTRL_PIN(WMT_PIN_NORA11, "nor_a11"),
280 PINCTRL_PIN(WMT_PIN_NORA12, "nor_a12"),
281 PINCTRL_PIN(WMT_PIN_NORA13, "nor_a13"),
282 PINCTRL_PIN(WMT_PIN_NORA14, "nor_a14"),
283 PINCTRL_PIN(WMT_PIN_NORA15, "nor_a15"),
284 PINCTRL_PIN(WMT_PIN_NORA16, "nor_a16"),
285 PINCTRL_PIN(WMT_PIN_NORA17, "nor_a17"),
286 PINCTRL_PIN(WMT_PIN_NORA18, "nor_a18"),
287 PINCTRL_PIN(WMT_PIN_NORA19, "nor_a19"),
288 PINCTRL_PIN(WMT_PIN_NORA20, "nor_a20"),
289 PINCTRL_PIN(WMT_PIN_NORA21, "nor_a21"),
290 PINCTRL_PIN(WMT_PIN_NORA22, "nor_a22"),
291 PINCTRL_PIN(WMT_PIN_NORA23, "nor_a23"),
292 PINCTRL_PIN(WMT_PIN_NORA24, "nor_a24"),
293 PINCTRL_PIN(WMT_PIN_AC97SDI, "ac97_sdi"),
294 PINCTRL_PIN(WMT_PIN_AC97SYNC, "ac97_sync"),
295 PINCTRL_PIN(WMT_PIN_AC97SDO, "ac97_sdo"),
296 PINCTRL_PIN(WMT_PIN_AC97BCLK, "ac97_bclk"),
297 PINCTRL_PIN(WMT_PIN_AC97RST, "ac97_rst"),
298 PINCTRL_PIN(WMT_PIN_SFDO, "sf_do"),
299 PINCTRL_PIN(WMT_PIN_SFCS0, "sf_cs0"),
300 PINCTRL_PIN(WMT_PIN_SFCS1, "sf_cs1"),
301 PINCTRL_PIN(WMT_PIN_SFCLK, "sf_clk"),
302 PINCTRL_PIN(WMT_PIN_SFDI, "sf_di"),
303 PINCTRL_PIN(WMT_PIN_SPI0CLK, "spi0_clk"),
304 PINCTRL_PIN(WMT_PIN_SPI0MISO, "spi0_miso"),
305 PINCTRL_PIN(WMT_PIN_SPI0MOSI, "spi0_mosi"),
306 PINCTRL_PIN(WMT_PIN_SPI0SS, "spi0_ss"),
307 PINCTRL_PIN(WMT_PIN_SPI1CLK, "spi1_clk"),
308 PINCTRL_PIN(WMT_PIN_SPI1MISO, "spi1_miso"),
309 PINCTRL_PIN(WMT_PIN_SPI1MOSI, "spi1_mosi"),
310 PINCTRL_PIN(WMT_PIN_SPI1SS, "spi1_ss"),
311 PINCTRL_PIN(WMT_PIN_SPI2CLK, "spi2_clk"),
312 PINCTRL_PIN(WMT_PIN_SPI2MISO, "spi2_miso"),
313 PINCTRL_PIN(WMT_PIN_SPI2MOSI, "spi2_mosi"),
314 PINCTRL_PIN(WMT_PIN_SPI2SS, "spi2_ss"),
315 PINCTRL_PIN(WMT_PIN_UART0_RTS, "uart0_rts"),
316 PINCTRL_PIN(WMT_PIN_UART0_TXD, "uart0_txd"),
317 PINCTRL_PIN(WMT_PIN_UART0_CTS, "uart0_cts"),
318 PINCTRL_PIN(WMT_PIN_UART0_RXD, "uart0_rxd"),
319 PINCTRL_PIN(WMT_PIN_UART1_RTS, "uart1_rts"),
320 PINCTRL_PIN(WMT_PIN_UART1_TXD, "uart1_txd"),
321 PINCTRL_PIN(WMT_PIN_UART1_CTS, "uart1_cts"),
322 PINCTRL_PIN(WMT_PIN_UART1_RXD, "uart1_rxd"),
323 PINCTRL_PIN(WMT_PIN_UART2_RTS, "uart2_rts"),
324 PINCTRL_PIN(WMT_PIN_UART2_TXD, "uart2_txd"),
325 PINCTRL_PIN(WMT_PIN_UART2_CTS, "uart2_cts"),
326 PINCTRL_PIN(WMT_PIN_UART2_RXD, "uart2_rxd"),
327 PINCTRL_PIN(WMT_PIN_UART3_RTS, "uart3_rts"),
328 PINCTRL_PIN(WMT_PIN_UART3_TXD, "uart3_txd"),
329 PINCTRL_PIN(WMT_PIN_UART3_CTS, "uart3_cts"),
330 PINCTRL_PIN(WMT_PIN_UART3_RXD, "uart3_rxd"),
331 PINCTRL_PIN(WMT_PIN_I2C0SCL, "i2c0_scl"),
332 PINCTRL_PIN(WMT_PIN_I2C0SDA, "i2c0_sda"),
333 PINCTRL_PIN(WMT_PIN_I2C1SCL, "i2c1_scl"),
334 PINCTRL_PIN(WMT_PIN_I2C1SDA, "i2c1_sda"),
335 PINCTRL_PIN(WMT_PIN_I2C2SCL, "i2c2_scl"),
336 PINCTRL_PIN(WMT_PIN_I2C2SDA, "i2c2_sda"),
337};
338
339/* Order of these names must match the above list */
340static const char * const wm8505_groups[] = {
341 "extgpio0",
342 "extgpio1",
343 "extgpio2",
344 "extgpio3",
345 "extgpio4",
346 "extgpio5",
347 "extgpio6",
348 "extgpio7",
349 "wakeup0",
350 "wakeup1",
351 "wakeup2",
352 "wakeup3",
353 "susgpio0",
354 "sd_data0",
355 "sd_data1",
356 "sd_data2",
357 "sd_data3",
358 "mmc_data0",
359 "mmc_data1",
360 "mmc_data2",
361 "mmc_data3",
362 "vdin0",
363 "vdin1",
364 "vdin2",
365 "vdin3",
366 "vdin4",
367 "vdin5",
368 "vdin6",
369 "vdin7",
370 "vdout0",
371 "vdout1",
372 "vdout2",
373 "vdout3",
374 "vdout4",
375 "vdout5",
376 "vdout6",
377 "vdout7",
378 "vdout8",
379 "vdout9",
380 "vdout10",
381 "vdout11",
382 "vdout12",
383 "vdout13",
384 "vdout14",
385 "vdout15",
386 "vdout16",
387 "vdout17",
388 "vdout18",
389 "vdout19",
390 "vdout20",
391 "vdout21",
392 "vdout22",
393 "vdout23",
394 "v_hsync",
395 "v_vsync",
396 "vga_hsync",
397 "vga_vsync",
398 "vd_hsync",
399 "vd_vsync",
400 "nor_d0",
401 "nor_d1",
402 "nor_d2",
403 "nor_d3",
404 "nor_d4",
405 "nor_d5",
406 "nor_d6",
407 "nor_d7",
408 "nor_d8",
409 "nor_d9",
410 "nor_d10",
411 "nor_d11",
412 "nor_d12",
413 "nor_d13",
414 "nor_d14",
415 "nor_d15",
416 "nor_a0",
417 "nor_a1",
418 "nor_a2",
419 "nor_a3",
420 "nor_a4",
421 "nor_a5",
422 "nor_a6",
423 "nor_a7",
424 "nor_a8",
425 "nor_a9",
426 "nor_a10",
427 "nor_a11",
428 "nor_a12",
429 "nor_a13",
430 "nor_a14",
431 "nor_a15",
432 "nor_a16",
433 "nor_a17",
434 "nor_a18",
435 "nor_a19",
436 "nor_a20",
437 "nor_a21",
438 "nor_a22",
439 "nor_a23",
440 "nor_a24",
441 "ac97_sdi",
442 "ac97_sync",
443 "ac97_sdo",
444 "ac97_bclk",
445 "ac97_rst",
446 "sf_do",
447 "sf_cs0",
448 "sf_cs1",
449 "sf_clk",
450 "sf_di",
451 "spi0_clk",
452 "spi0_miso",
453 "spi0_mosi",
454 "spi0_ss",
455 "spi1_clk",
456 "spi1_miso",
457 "spi1_mosi",
458 "spi1_ss",
459 "spi2_clk",
460 "spi2_miso",
461 "spi2_mosi",
462 "spi2_ss",
463 "uart0_rts",
464 "uart0_txd",
465 "uart0_cts",
466 "uart0_rxd",
467 "uart1_rts",
468 "uart1_txd",
469 "uart1_cts",
470 "uart1_rxd",
471 "uart2_rts",
472 "uart2_txd",
473 "uart2_cts",
474 "uart2_rxd",
475 "uart3_rts",
476 "uart3_txd",
477 "uart3_cts",
478 "uart3_rxd",
479 "i2c0_scl",
480 "i2c0_sda",
481 "i2c1_scl",
482 "i2c1_sda",
483 "i2c2_scl",
484 "i2c2_sda",
485};
486
487static int wm8505_pinctrl_probe(struct platform_device *pdev)
488{
489 struct wmt_pinctrl_data *data;
490
491 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
492 if (!data) {
493 dev_err(&pdev->dev, "failed to allocate data\n");
494 return -ENOMEM;
495 }
496
497 data->banks = wm8505_banks;
498 data->nbanks = ARRAY_SIZE(wm8505_banks);
499 data->pins = wm8505_pins;
500 data->npins = ARRAY_SIZE(wm8505_pins);
501 data->groups = wm8505_groups;
502 data->ngroups = ARRAY_SIZE(wm8505_groups);
503
504 return wmt_pinctrl_probe(pdev, data);
505}
506
507static int wm8505_pinctrl_remove(struct platform_device *pdev)
508{
509 return wmt_pinctrl_remove(pdev);
510}
511
512static struct of_device_id wmt_pinctrl_of_match[] = {
513 { .compatible = "wm,wm8505-pinctrl" },
514 { /* sentinel */ },
515};
516
517static struct platform_driver wmt_pinctrl_driver = {
518 .probe = wm8505_pinctrl_probe,
519 .remove = wm8505_pinctrl_remove,
520 .driver = {
521 .name = "pinctrl-wm8505",
522 .owner = THIS_MODULE,
523 .of_match_table = wmt_pinctrl_of_match,
524 },
525};
526
527module_platform_driver(wmt_pinctrl_driver);
528
529MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
530MODULE_DESCRIPTION("Wondermedia WM8505 Pincontrol driver");
531MODULE_LICENSE("GPL v2");
532MODULE_DEVICE_TABLE(of, wmt_pinctrl_of_match);
diff --git a/drivers/pinctrl/vt8500/pinctrl-wm8650.c b/drivers/pinctrl/vt8500/pinctrl-wm8650.c
new file mode 100644
index 000000000000..7de57f063153
--- /dev/null
+++ b/drivers/pinctrl/vt8500/pinctrl-wm8650.c
@@ -0,0 +1,370 @@
1/*
2 * Pinctrl data for Wondermedia WM8650 SoC
3 *
4 * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21
22#include "pinctrl-wmt.h"
23
24/*
25 * Describe the register offsets within the GPIO memory space
26 * The dedicated external GPIO's should always be listed in bank 0
27 * so they are exported in the 0..31 range which is what users
28 * expect.
29 *
30 * Do not reorder these banks as it will change the pin numbering
31 */
32static const struct wmt_pinctrl_bank_registers wm8650_banks[] = {
33 WMT_PINCTRL_BANK(0x40, 0x80, 0xC0, 0x00, 0x480, 0x4C0), /* 0 */
34 WMT_PINCTRL_BANK(0x44, 0x84, 0xC4, 0x04, 0x484, 0x4C4), /* 1 */
35 WMT_PINCTRL_BANK(0x48, 0x88, 0xC8, 0x08, 0x488, 0x4C8), /* 2 */
36 WMT_PINCTRL_BANK(0x4C, 0x8C, 0xCC, 0x0C, 0x48C, 0x4CC), /* 3 */
37 WMT_PINCTRL_BANK(0x50, 0x90, 0xD0, 0x10, 0x490, 0x4D0), /* 4 */
38 WMT_PINCTRL_BANK(0x54, 0x94, 0xD4, 0x14, 0x494, 0x4D4), /* 5 */
39 WMT_PINCTRL_BANK(0x58, 0x98, 0xD8, 0x18, 0x498, 0x4D8), /* 6 */
40 WMT_PINCTRL_BANK(0x5C, 0x9C, 0xDC, 0x1C, 0x49C, 0x4DC), /* 7 */
41};
42
43/* Please keep sorted by bank/bit */
44#define WMT_PIN_EXTGPIO0 WMT_PIN(0, 0)
45#define WMT_PIN_EXTGPIO1 WMT_PIN(0, 1)
46#define WMT_PIN_EXTGPIO2 WMT_PIN(0, 2)
47#define WMT_PIN_EXTGPIO3 WMT_PIN(0, 3)
48#define WMT_PIN_EXTGPIO4 WMT_PIN(0, 4)
49#define WMT_PIN_EXTGPIO5 WMT_PIN(0, 5)
50#define WMT_PIN_EXTGPIO6 WMT_PIN(0, 6)
51#define WMT_PIN_EXTGPIO7 WMT_PIN(0, 7)
52#define WMT_PIN_WAKEUP0 WMT_PIN(0, 16)
53#define WMT_PIN_WAKEUP1 WMT_PIN(0, 17)
54#define WMT_PIN_SUSGPIO0 WMT_PIN(0, 21)
55#define WMT_PIN_SD0CD WMT_PIN(0, 28)
56#define WMT_PIN_SD1CD WMT_PIN(0, 29)
57#define WMT_PIN_VDOUT0 WMT_PIN(1, 0)
58#define WMT_PIN_VDOUT1 WMT_PIN(1, 1)
59#define WMT_PIN_VDOUT2 WMT_PIN(1, 2)
60#define WMT_PIN_VDOUT3 WMT_PIN(1, 3)
61#define WMT_PIN_VDOUT4 WMT_PIN(1, 4)
62#define WMT_PIN_VDOUT5 WMT_PIN(1, 5)
63#define WMT_PIN_VDOUT6 WMT_PIN(1, 6)
64#define WMT_PIN_VDOUT7 WMT_PIN(1, 7)
65#define WMT_PIN_VDOUT8 WMT_PIN(1, 8)
66#define WMT_PIN_VDOUT9 WMT_PIN(1, 9)
67#define WMT_PIN_VDOUT10 WMT_PIN(1, 10)
68#define WMT_PIN_VDOUT11 WMT_PIN(1, 11)
69#define WMT_PIN_VDOUT12 WMT_PIN(1, 12)
70#define WMT_PIN_VDOUT13 WMT_PIN(1, 13)
71#define WMT_PIN_VDOUT14 WMT_PIN(1, 14)
72#define WMT_PIN_VDOUT15 WMT_PIN(1, 15)
73#define WMT_PIN_VDOUT16 WMT_PIN(1, 16)
74#define WMT_PIN_VDOUT17 WMT_PIN(1, 17)
75#define WMT_PIN_VDOUT18 WMT_PIN(1, 18)
76#define WMT_PIN_VDOUT19 WMT_PIN(1, 19)
77#define WMT_PIN_VDOUT20 WMT_PIN(1, 20)
78#define WMT_PIN_VDOUT21 WMT_PIN(1, 21)
79#define WMT_PIN_VDOUT22 WMT_PIN(1, 22)
80#define WMT_PIN_VDOUT23 WMT_PIN(1, 23)
81#define WMT_PIN_VDIN0 WMT_PIN(2, 0)
82#define WMT_PIN_VDIN1 WMT_PIN(2, 1)
83#define WMT_PIN_VDIN2 WMT_PIN(2, 2)
84#define WMT_PIN_VDIN3 WMT_PIN(2, 3)
85#define WMT_PIN_VDIN4 WMT_PIN(2, 4)
86#define WMT_PIN_VDIN5 WMT_PIN(2, 5)
87#define WMT_PIN_VDIN6 WMT_PIN(2, 6)
88#define WMT_PIN_VDIN7 WMT_PIN(2, 7)
89#define WMT_PIN_I2C1SCL WMT_PIN(2, 12)
90#define WMT_PIN_I2C1SDA WMT_PIN(2, 13)
91#define WMT_PIN_SPI0MOSI WMT_PIN(2, 24)
92#define WMT_PIN_SPI0MISO WMT_PIN(2, 25)
93#define WMT_PIN_SPI0SS0 WMT_PIN(2, 26)
94#define WMT_PIN_SPI0CLK WMT_PIN(2, 27)
95#define WMT_PIN_SD0DATA0 WMT_PIN(3, 8)
96#define WMT_PIN_SD0DATA1 WMT_PIN(3, 9)
97#define WMT_PIN_SD0DATA2 WMT_PIN(3, 10)
98#define WMT_PIN_SD0DATA3 WMT_PIN(3, 11)
99#define WMT_PIN_SD0CLK WMT_PIN(3, 12)
100#define WMT_PIN_SD0WP WMT_PIN(3, 13)
101#define WMT_PIN_SD0CMD WMT_PIN(3, 14)
102#define WMT_PIN_SD1DATA0 WMT_PIN(3, 24)
103#define WMT_PIN_SD1DATA1 WMT_PIN(3, 25)
104#define WMT_PIN_SD1DATA2 WMT_PIN(3, 26)
105#define WMT_PIN_SD1DATA3 WMT_PIN(3, 27)
106#define WMT_PIN_SD1DATA4 WMT_PIN(3, 28)
107#define WMT_PIN_SD1DATA5 WMT_PIN(3, 29)
108#define WMT_PIN_SD1DATA6 WMT_PIN(3, 30)
109#define WMT_PIN_SD1DATA7 WMT_PIN(3, 31)
110#define WMT_PIN_I2C0SCL WMT_PIN(5, 8)
111#define WMT_PIN_I2C0SDA WMT_PIN(5, 9)
112#define WMT_PIN_UART0RTS WMT_PIN(5, 16)
113#define WMT_PIN_UART0TXD WMT_PIN(5, 17)
114#define WMT_PIN_UART0CTS WMT_PIN(5, 18)
115#define WMT_PIN_UART0RXD WMT_PIN(5, 19)
116#define WMT_PIN_UART1RTS WMT_PIN(5, 20)
117#define WMT_PIN_UART1TXD WMT_PIN(5, 21)
118#define WMT_PIN_UART1CTS WMT_PIN(5, 22)
119#define WMT_PIN_UART1RXD WMT_PIN(5, 23)
120#define WMT_PIN_UART2RTS WMT_PIN(5, 24)
121#define WMT_PIN_UART2TXD WMT_PIN(5, 25)
122#define WMT_PIN_UART2CTS WMT_PIN(5, 26)
123#define WMT_PIN_UART2RXD WMT_PIN(5, 27)
124#define WMT_PIN_UART3RTS WMT_PIN(5, 28)
125#define WMT_PIN_UART3TXD WMT_PIN(5, 29)
126#define WMT_PIN_UART3CTS WMT_PIN(5, 30)
127#define WMT_PIN_UART3RXD WMT_PIN(5, 31)
128#define WMT_PIN_KPADROW0 WMT_PIN(6, 16)
129#define WMT_PIN_KPADROW1 WMT_PIN(6, 17)
130#define WMT_PIN_KPADCOL0 WMT_PIN(6, 18)
131#define WMT_PIN_KPADCOL1 WMT_PIN(6, 19)
132#define WMT_PIN_SD1CLK WMT_PIN(7, 0)
133#define WMT_PIN_SD1CMD WMT_PIN(7, 1)
134#define WMT_PIN_SD1WP WMT_PIN(7, 13)
135
136static const struct pinctrl_pin_desc wm8650_pins[] = {
137 PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
138 PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
139 PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
140 PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
141 PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
142 PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
143 PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
144 PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
145 PINCTRL_PIN(WMT_PIN_WAKEUP0, "wakeup0"),
146 PINCTRL_PIN(WMT_PIN_WAKEUP1, "wakeup1"),
147 PINCTRL_PIN(WMT_PIN_SUSGPIO0, "susgpio0"),
148 PINCTRL_PIN(WMT_PIN_SD0CD, "sd0_cd"),
149 PINCTRL_PIN(WMT_PIN_SD1CD, "sd1_cd"),
150 PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
151 PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
152 PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
153 PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
154 PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
155 PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
156 PINCTRL_PIN(WMT_PIN_VDOUT6, "vdout6"),
157 PINCTRL_PIN(WMT_PIN_VDOUT7, "vdout7"),
158 PINCTRL_PIN(WMT_PIN_VDOUT8, "vdout8"),
159 PINCTRL_PIN(WMT_PIN_VDOUT9, "vdout9"),
160 PINCTRL_PIN(WMT_PIN_VDOUT10, "vdout10"),
161 PINCTRL_PIN(WMT_PIN_VDOUT11, "vdout11"),
162 PINCTRL_PIN(WMT_PIN_VDOUT12, "vdout12"),
163 PINCTRL_PIN(WMT_PIN_VDOUT13, "vdout13"),
164 PINCTRL_PIN(WMT_PIN_VDOUT14, "vdout14"),
165 PINCTRL_PIN(WMT_PIN_VDOUT15, "vdout15"),
166 PINCTRL_PIN(WMT_PIN_VDOUT16, "vdout16"),
167 PINCTRL_PIN(WMT_PIN_VDOUT17, "vdout17"),
168 PINCTRL_PIN(WMT_PIN_VDOUT18, "vdout18"),
169 PINCTRL_PIN(WMT_PIN_VDOUT19, "vdout19"),
170 PINCTRL_PIN(WMT_PIN_VDOUT20, "vdout20"),
171 PINCTRL_PIN(WMT_PIN_VDOUT21, "vdout21"),
172 PINCTRL_PIN(WMT_PIN_VDOUT22, "vdout22"),
173 PINCTRL_PIN(WMT_PIN_VDOUT23, "vdout23"),
174 PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
175 PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
176 PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
177 PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
178 PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
179 PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
180 PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
181 PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
182 PINCTRL_PIN(WMT_PIN_I2C1SCL, "i2c1_scl"),
183 PINCTRL_PIN(WMT_PIN_I2C1SDA, "i2c1_sda"),
184 PINCTRL_PIN(WMT_PIN_SPI0MOSI, "spi0_mosi"),
185 PINCTRL_PIN(WMT_PIN_SPI0MISO, "spi0_miso"),
186 PINCTRL_PIN(WMT_PIN_SPI0SS0, "spi0_ss0"),
187 PINCTRL_PIN(WMT_PIN_SPI0CLK, "spi0_clk"),
188 PINCTRL_PIN(WMT_PIN_SD0DATA0, "sd0_data0"),
189 PINCTRL_PIN(WMT_PIN_SD0DATA1, "sd0_data1"),
190 PINCTRL_PIN(WMT_PIN_SD0DATA2, "sd0_data2"),
191 PINCTRL_PIN(WMT_PIN_SD0DATA3, "sd0_data3"),
192 PINCTRL_PIN(WMT_PIN_SD0CLK, "sd0_clk"),
193 PINCTRL_PIN(WMT_PIN_SD0WP, "sd0_wp"),
194 PINCTRL_PIN(WMT_PIN_SD0CMD, "sd0_cmd"),
195 PINCTRL_PIN(WMT_PIN_SD1DATA0, "sd1_data0"),
196 PINCTRL_PIN(WMT_PIN_SD1DATA1, "sd1_data1"),
197 PINCTRL_PIN(WMT_PIN_SD1DATA2, "sd1_data2"),
198 PINCTRL_PIN(WMT_PIN_SD1DATA3, "sd1_data3"),
199 PINCTRL_PIN(WMT_PIN_SD1DATA4, "sd1_data4"),
200 PINCTRL_PIN(WMT_PIN_SD1DATA5, "sd1_data5"),
201 PINCTRL_PIN(WMT_PIN_SD1DATA6, "sd1_data6"),
202 PINCTRL_PIN(WMT_PIN_SD1DATA7, "sd1_data7"),
203 PINCTRL_PIN(WMT_PIN_I2C0SCL, "i2c0_scl"),
204 PINCTRL_PIN(WMT_PIN_I2C0SDA, "i2c0_sda"),
205 PINCTRL_PIN(WMT_PIN_UART0RTS, "uart0_rts"),
206 PINCTRL_PIN(WMT_PIN_UART0TXD, "uart0_txd"),
207 PINCTRL_PIN(WMT_PIN_UART0CTS, "uart0_cts"),
208 PINCTRL_PIN(WMT_PIN_UART0RXD, "uart0_rxd"),
209 PINCTRL_PIN(WMT_PIN_UART1RTS, "uart1_rts"),
210 PINCTRL_PIN(WMT_PIN_UART1TXD, "uart1_txd"),
211 PINCTRL_PIN(WMT_PIN_UART1CTS, "uart1_cts"),
212 PINCTRL_PIN(WMT_PIN_UART1RXD, "uart1_rxd"),
213 PINCTRL_PIN(WMT_PIN_UART2RTS, "uart2_rts"),
214 PINCTRL_PIN(WMT_PIN_UART2TXD, "uart2_txd"),
215 PINCTRL_PIN(WMT_PIN_UART2CTS, "uart2_cts"),
216 PINCTRL_PIN(WMT_PIN_UART2RXD, "uart2_rxd"),
217 PINCTRL_PIN(WMT_PIN_UART3RTS, "uart3_rts"),
218 PINCTRL_PIN(WMT_PIN_UART3TXD, "uart3_txd"),
219 PINCTRL_PIN(WMT_PIN_UART3CTS, "uart3_cts"),
220 PINCTRL_PIN(WMT_PIN_UART3RXD, "uart3_rxd"),
221 PINCTRL_PIN(WMT_PIN_KPADROW0, "kpadrow0"),
222 PINCTRL_PIN(WMT_PIN_KPADROW1, "kpadrow1"),
223 PINCTRL_PIN(WMT_PIN_KPADCOL0, "kpadcol0"),
224 PINCTRL_PIN(WMT_PIN_KPADCOL1, "kpadcol1"),
225 PINCTRL_PIN(WMT_PIN_SD1CLK, "sd1_clk"),
226 PINCTRL_PIN(WMT_PIN_SD1CMD, "sd1_cmd"),
227 PINCTRL_PIN(WMT_PIN_SD1WP, "sd1_wp"),
228};
229
230/* Order of these names must match the above list */
231static const char * const wm8650_groups[] = {
232 "extgpio0",
233 "extgpio1",
234 "extgpio2",
235 "extgpio3",
236 "extgpio4",
237 "extgpio5",
238 "extgpio6",
239 "extgpio7",
240 "wakeup0",
241 "wakeup1",
242 "susgpio0",
243 "sd0_cd",
244 "sd1_cd",
245 "vdout0",
246 "vdout1",
247 "vdout2",
248 "vdout3",
249 "vdout4",
250 "vdout5",
251 "vdout6",
252 "vdout7",
253 "vdout8",
254 "vdout9",
255 "vdout10",
256 "vdout11",
257 "vdout12",
258 "vdout13",
259 "vdout14",
260 "vdout15",
261 "vdout16",
262 "vdout17",
263 "vdout18",
264 "vdout19",
265 "vdout20",
266 "vdout21",
267 "vdout22",
268 "vdout23",
269 "vdin0",
270 "vdin1",
271 "vdin2",
272 "vdin3",
273 "vdin4",
274 "vdin5",
275 "vdin6",
276 "vdin7",
277 "i2c1_scl",
278 "i2c1_sda",
279 "spi0_mosi",
280 "spi0_miso",
281 "spi0_ss0",
282 "spi0_clk",
283 "sd0_data0",
284 "sd0_data1",
285 "sd0_data2",
286 "sd0_data3",
287 "sd0_clk",
288 "sd0_wp",
289 "sd0_cmd",
290 "sd1_data0",
291 "sd1_data1",
292 "sd1_data2",
293 "sd1_data3",
294 "sd1_data4",
295 "sd1_data5",
296 "sd1_data6",
297 "sd1_data7",
298 "i2c0_scl",
299 "i2c0_sda",
300 "uart0_rts",
301 "uart0_txd",
302 "uart0_cts",
303 "uart0_rxd",
304 "uart1_rts",
305 "uart1_txd",
306 "uart1_cts",
307 "uart1_rxd",
308 "uart2_rts",
309 "uart2_txd",
310 "uart2_cts",
311 "uart2_rxd",
312 "uart3_rts",
313 "uart3_txd",
314 "uart3_cts",
315 "uart3_rxd",
316 "kpadrow0",
317 "kpadrow1",
318 "kpadcol0",
319 "kpadcol1",
320 "sd1_clk",
321 "sd1_cmd",
322 "sd1_wp",
323};
324
325static int wm8650_pinctrl_probe(struct platform_device *pdev)
326{
327 struct wmt_pinctrl_data *data;
328
329 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
330 if (!data) {
331 dev_err(&pdev->dev, "failed to allocate data\n");
332 return -ENOMEM;
333 }
334
335 data->banks = wm8650_banks;
336 data->nbanks = ARRAY_SIZE(wm8650_banks);
337 data->pins = wm8650_pins;
338 data->npins = ARRAY_SIZE(wm8650_pins);
339 data->groups = wm8650_groups;
340 data->ngroups = ARRAY_SIZE(wm8650_groups);
341
342 return wmt_pinctrl_probe(pdev, data);
343}
344
345static int wm8650_pinctrl_remove(struct platform_device *pdev)
346{
347 return wmt_pinctrl_remove(pdev);
348}
349
350static struct of_device_id wmt_pinctrl_of_match[] = {
351 { .compatible = "wm,wm8650-pinctrl" },
352 { /* sentinel */ },
353};
354
355static struct platform_driver wmt_pinctrl_driver = {
356 .probe = wm8650_pinctrl_probe,
357 .remove = wm8650_pinctrl_remove,
358 .driver = {
359 .name = "pinctrl-wm8650",
360 .owner = THIS_MODULE,
361 .of_match_table = wmt_pinctrl_of_match,
362 },
363};
364
365module_platform_driver(wmt_pinctrl_driver);
366
367MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
368MODULE_DESCRIPTION("Wondermedia WM8650 Pincontrol driver");
369MODULE_LICENSE("GPL v2");
370MODULE_DEVICE_TABLE(of, wmt_pinctrl_of_match);
diff --git a/drivers/pinctrl/vt8500/pinctrl-wm8750.c b/drivers/pinctrl/vt8500/pinctrl-wm8750.c
new file mode 100644
index 000000000000..b964cc550568
--- /dev/null
+++ b/drivers/pinctrl/vt8500/pinctrl-wm8750.c
@@ -0,0 +1,409 @@
1/*
2 * Pinctrl data for Wondermedia WM8750 SoC
3 *
4 * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21
22#include "pinctrl-wmt.h"
23
24/*
25 * Describe the register offsets within the GPIO memory space
26 * The dedicated external GPIO's should always be listed in bank 0
27 * so they are exported in the 0..31 range which is what users
28 * expect.
29 *
30 * Do not reorder these banks as it will change the pin numbering
31 */
32static const struct wmt_pinctrl_bank_registers wm8750_banks[] = {
33 WMT_PINCTRL_BANK(0x40, 0x80, 0xC0, 0x00, 0x480, 0x4C0), /* 0 */
34 WMT_PINCTRL_BANK(0x44, 0x84, 0xC4, 0x04, 0x484, 0x4C4), /* 1 */
35 WMT_PINCTRL_BANK(0x48, 0x88, 0xC8, 0x08, 0x488, 0x4C8), /* 2 */
36 WMT_PINCTRL_BANK(0x4C, 0x8C, 0xCC, 0x0C, 0x48C, 0x4CC), /* 3 */
37 WMT_PINCTRL_BANK(0x50, 0x90, 0xD0, 0x10, 0x490, 0x4D0), /* 4 */
38 WMT_PINCTRL_BANK(0x54, 0x94, 0xD4, 0x14, 0x494, 0x4D4), /* 5 */
39 WMT_PINCTRL_BANK(0x58, 0x98, 0xD8, 0x18, 0x498, 0x4D8), /* 6 */
40 WMT_PINCTRL_BANK(0x5C, 0x9C, 0xDC, 0x1C, 0x49C, 0x4DC), /* 7 */
41 WMT_PINCTRL_BANK(0x60, 0xA0, 0xE0, 0x20, 0x4A0, 0x4E0), /* 8 */
42 WMT_PINCTRL_BANK(0x70, 0xB0, 0xF0, 0x30, 0x4B0, 0x4F0), /* 9 */
43 WMT_PINCTRL_BANK(0x7C, 0xBC, 0xDC, 0x3C, 0x4BC, 0x4FC), /* 10 */
44};
45
46/* Please keep sorted by bank/bit */
47#define WMT_PIN_EXTGPIO0 WMT_PIN(0, 0)
48#define WMT_PIN_EXTGPIO1 WMT_PIN(0, 1)
49#define WMT_PIN_EXTGPIO2 WMT_PIN(0, 2)
50#define WMT_PIN_EXTGPIO3 WMT_PIN(0, 3)
51#define WMT_PIN_EXTGPIO4 WMT_PIN(0, 4)
52#define WMT_PIN_EXTGPIO5 WMT_PIN(0, 5)
53#define WMT_PIN_EXTGPIO6 WMT_PIN(0, 6)
54#define WMT_PIN_EXTGPIO7 WMT_PIN(0, 7)
55#define WMT_PIN_WAKEUP0 WMT_PIN(0, 16)
56#define WMT_PIN_WAKEUP1 WMT_PIN(0, 16)
57#define WMT_PIN_SD0CD WMT_PIN(0, 28)
58#define WMT_PIN_VDOUT0 WMT_PIN(1, 0)
59#define WMT_PIN_VDOUT1 WMT_PIN(1, 1)
60#define WMT_PIN_VDOUT2 WMT_PIN(1, 2)
61#define WMT_PIN_VDOUT3 WMT_PIN(1, 3)
62#define WMT_PIN_VDOUT4 WMT_PIN(1, 4)
63#define WMT_PIN_VDOUT5 WMT_PIN(1, 5)
64#define WMT_PIN_VDOUT6 WMT_PIN(1, 6)
65#define WMT_PIN_VDOUT7 WMT_PIN(1, 7)
66#define WMT_PIN_VDOUT8 WMT_PIN(1, 8)
67#define WMT_PIN_VDOUT9 WMT_PIN(1, 9)
68#define WMT_PIN_VDOUT10 WMT_PIN(1, 10)
69#define WMT_PIN_VDOUT11 WMT_PIN(1, 11)
70#define WMT_PIN_VDOUT12 WMT_PIN(1, 12)
71#define WMT_PIN_VDOUT13 WMT_PIN(1, 13)
72#define WMT_PIN_VDOUT14 WMT_PIN(1, 14)
73#define WMT_PIN_VDOUT15 WMT_PIN(1, 15)
74#define WMT_PIN_VDOUT16 WMT_PIN(1, 16)
75#define WMT_PIN_VDOUT17 WMT_PIN(1, 17)
76#define WMT_PIN_VDOUT18 WMT_PIN(1, 18)
77#define WMT_PIN_VDOUT19 WMT_PIN(1, 19)
78#define WMT_PIN_VDOUT20 WMT_PIN(1, 20)
79#define WMT_PIN_VDOUT21 WMT_PIN(1, 21)
80#define WMT_PIN_VDOUT22 WMT_PIN(1, 22)
81#define WMT_PIN_VDOUT23 WMT_PIN(1, 23)
82#define WMT_PIN_VDIN0 WMT_PIN(2, 0)
83#define WMT_PIN_VDIN1 WMT_PIN(2, 1)
84#define WMT_PIN_VDIN2 WMT_PIN(2, 2)
85#define WMT_PIN_VDIN3 WMT_PIN(2, 3)
86#define WMT_PIN_VDIN4 WMT_PIN(2, 4)
87#define WMT_PIN_VDIN5 WMT_PIN(2, 5)
88#define WMT_PIN_VDIN6 WMT_PIN(2, 6)
89#define WMT_PIN_VDIN7 WMT_PIN(2, 7)
90#define WMT_PIN_SPI0_MOSI WMT_PIN(2, 24)
91#define WMT_PIN_SPI0_MISO WMT_PIN(2, 25)
92#define WMT_PIN_SPI0_SS WMT_PIN(2, 26)
93#define WMT_PIN_SPI0_CLK WMT_PIN(2, 27)
94#define WMT_PIN_SPI0_SSB WMT_PIN(2, 28)
95#define WMT_PIN_SD0CLK WMT_PIN(3, 17)
96#define WMT_PIN_SD0CMD WMT_PIN(3, 18)
97#define WMT_PIN_SD0WP WMT_PIN(3, 19)
98#define WMT_PIN_SD0DATA0 WMT_PIN(3, 20)
99#define WMT_PIN_SD0DATA1 WMT_PIN(3, 21)
100#define WMT_PIN_SD0DATA2 WMT_PIN(3, 22)
101#define WMT_PIN_SD0DATA3 WMT_PIN(3, 23)
102#define WMT_PIN_SD1DATA0 WMT_PIN(3, 24)
103#define WMT_PIN_SD1DATA1 WMT_PIN(3, 25)
104#define WMT_PIN_SD1DATA2 WMT_PIN(3, 26)
105#define WMT_PIN_SD1DATA3 WMT_PIN(3, 27)
106#define WMT_PIN_SD1DATA4 WMT_PIN(3, 28)
107#define WMT_PIN_SD1DATA5 WMT_PIN(3, 29)
108#define WMT_PIN_SD1DATA6 WMT_PIN(3, 30)
109#define WMT_PIN_SD1DATA7 WMT_PIN(3, 31)
110#define WMT_PIN_I2C0_SCL WMT_PIN(5, 8)
111#define WMT_PIN_I2C0_SDA WMT_PIN(5, 9)
112#define WMT_PIN_I2C1_SCL WMT_PIN(5, 10)
113#define WMT_PIN_I2C1_SDA WMT_PIN(5, 11)
114#define WMT_PIN_I2C2_SCL WMT_PIN(5, 12)
115#define WMT_PIN_I2C2_SDA WMT_PIN(5, 13)
116#define WMT_PIN_UART0_RTS WMT_PIN(5, 16)
117#define WMT_PIN_UART0_TXD WMT_PIN(5, 17)
118#define WMT_PIN_UART0_CTS WMT_PIN(5, 18)
119#define WMT_PIN_UART0_RXD WMT_PIN(5, 19)
120#define WMT_PIN_UART1_RTS WMT_PIN(5, 20)
121#define WMT_PIN_UART1_TXD WMT_PIN(5, 21)
122#define WMT_PIN_UART1_CTS WMT_PIN(5, 22)
123#define WMT_PIN_UART1_RXD WMT_PIN(5, 23)
124#define WMT_PIN_UART2_RTS WMT_PIN(5, 24)
125#define WMT_PIN_UART2_TXD WMT_PIN(5, 25)
126#define WMT_PIN_UART2_CTS WMT_PIN(5, 26)
127#define WMT_PIN_UART2_RXD WMT_PIN(5, 27)
128#define WMT_PIN_UART3_RTS WMT_PIN(5, 28)
129#define WMT_PIN_UART3_TXD WMT_PIN(5, 29)
130#define WMT_PIN_UART3_CTS WMT_PIN(5, 30)
131#define WMT_PIN_UART3_RXD WMT_PIN(5, 31)
132#define WMT_PIN_SD2CD WMT_PIN(6, 0)
133#define WMT_PIN_SD2DATA3 WMT_PIN(6, 1)
134#define WMT_PIN_SD2DATA0 WMT_PIN(6, 2)
135#define WMT_PIN_SD2WP WMT_PIN(6, 3)
136#define WMT_PIN_SD2DATA1 WMT_PIN(6, 4)
137#define WMT_PIN_SD2DATA2 WMT_PIN(6, 5)
138#define WMT_PIN_SD2CMD WMT_PIN(6, 6)
139#define WMT_PIN_SD2CLK WMT_PIN(6, 7)
140#define WMT_PIN_SD2PWR WMT_PIN(6, 9)
141#define WMT_PIN_SD1CLK WMT_PIN(7, 0)
142#define WMT_PIN_SD1CMD WMT_PIN(7, 1)
143#define WMT_PIN_SD1PWR WMT_PIN(7, 10)
144#define WMT_PIN_SD1WP WMT_PIN(7, 11)
145#define WMT_PIN_SD1CD WMT_PIN(7, 12)
146#define WMT_PIN_SPI0SS3 WMT_PIN(7, 24)
147#define WMT_PIN_SPI0SS2 WMT_PIN(7, 25)
148#define WMT_PIN_PWMOUT1 WMT_PIN(7, 26)
149#define WMT_PIN_PWMOUT0 WMT_PIN(7, 27)
150
151static const struct pinctrl_pin_desc wm8750_pins[] = {
152 PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
153 PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
154 PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
155 PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
156 PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
157 PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
158 PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
159 PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
160 PINCTRL_PIN(WMT_PIN_WAKEUP0, "wakeup0"),
161 PINCTRL_PIN(WMT_PIN_WAKEUP1, "wakeup1"),
162 PINCTRL_PIN(WMT_PIN_SD0CD, "sd0_cd"),
163 PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
164 PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
165 PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
166 PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
167 PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
168 PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
169 PINCTRL_PIN(WMT_PIN_VDOUT6, "vdout6"),
170 PINCTRL_PIN(WMT_PIN_VDOUT7, "vdout7"),
171 PINCTRL_PIN(WMT_PIN_VDOUT8, "vdout8"),
172 PINCTRL_PIN(WMT_PIN_VDOUT9, "vdout9"),
173 PINCTRL_PIN(WMT_PIN_VDOUT10, "vdout10"),
174 PINCTRL_PIN(WMT_PIN_VDOUT11, "vdout11"),
175 PINCTRL_PIN(WMT_PIN_VDOUT12, "vdout12"),
176 PINCTRL_PIN(WMT_PIN_VDOUT13, "vdout13"),
177 PINCTRL_PIN(WMT_PIN_VDOUT14, "vdout14"),
178 PINCTRL_PIN(WMT_PIN_VDOUT15, "vdout15"),
179 PINCTRL_PIN(WMT_PIN_VDOUT16, "vdout16"),
180 PINCTRL_PIN(WMT_PIN_VDOUT17, "vdout17"),
181 PINCTRL_PIN(WMT_PIN_VDOUT18, "vdout18"),
182 PINCTRL_PIN(WMT_PIN_VDOUT19, "vdout19"),
183 PINCTRL_PIN(WMT_PIN_VDOUT20, "vdout20"),
184 PINCTRL_PIN(WMT_PIN_VDOUT21, "vdout21"),
185 PINCTRL_PIN(WMT_PIN_VDOUT22, "vdout22"),
186 PINCTRL_PIN(WMT_PIN_VDOUT23, "vdout23"),
187 PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
188 PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
189 PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
190 PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
191 PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
192 PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
193 PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
194 PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
195 PINCTRL_PIN(WMT_PIN_SPI0_MOSI, "spi0_mosi"),
196 PINCTRL_PIN(WMT_PIN_SPI0_MISO, "spi0_miso"),
197 PINCTRL_PIN(WMT_PIN_SPI0_SS, "spi0_ss"),
198 PINCTRL_PIN(WMT_PIN_SPI0_CLK, "spi0_clk"),
199 PINCTRL_PIN(WMT_PIN_SPI0_SSB, "spi0_ssb"),
200 PINCTRL_PIN(WMT_PIN_SD0CLK, "sd0_clk"),
201 PINCTRL_PIN(WMT_PIN_SD0CMD, "sd0_cmd"),
202 PINCTRL_PIN(WMT_PIN_SD0WP, "sd0_wp"),
203 PINCTRL_PIN(WMT_PIN_SD0DATA0, "sd0_data0"),
204 PINCTRL_PIN(WMT_PIN_SD0DATA1, "sd0_data1"),
205 PINCTRL_PIN(WMT_PIN_SD0DATA2, "sd0_data2"),
206 PINCTRL_PIN(WMT_PIN_SD0DATA3, "sd0_data3"),
207 PINCTRL_PIN(WMT_PIN_SD1DATA0, "sd1_data0"),
208 PINCTRL_PIN(WMT_PIN_SD1DATA1, "sd1_data1"),
209 PINCTRL_PIN(WMT_PIN_SD1DATA2, "sd1_data2"),
210 PINCTRL_PIN(WMT_PIN_SD1DATA3, "sd1_data3"),
211 PINCTRL_PIN(WMT_PIN_SD1DATA4, "sd1_data4"),
212 PINCTRL_PIN(WMT_PIN_SD1DATA5, "sd1_data5"),
213 PINCTRL_PIN(WMT_PIN_SD1DATA6, "sd1_data6"),
214 PINCTRL_PIN(WMT_PIN_SD1DATA7, "sd1_data7"),
215 PINCTRL_PIN(WMT_PIN_I2C0_SCL, "i2c0_scl"),
216 PINCTRL_PIN(WMT_PIN_I2C0_SDA, "i2c0_sda"),
217 PINCTRL_PIN(WMT_PIN_I2C1_SCL, "i2c1_scl"),
218 PINCTRL_PIN(WMT_PIN_I2C1_SDA, "i2c1_sda"),
219 PINCTRL_PIN(WMT_PIN_I2C2_SCL, "i2c2_scl"),
220 PINCTRL_PIN(WMT_PIN_I2C2_SDA, "i2c2_sda"),
221 PINCTRL_PIN(WMT_PIN_UART0_RTS, "uart0_rts"),
222 PINCTRL_PIN(WMT_PIN_UART0_TXD, "uart0_txd"),
223 PINCTRL_PIN(WMT_PIN_UART0_CTS, "uart0_cts"),
224 PINCTRL_PIN(WMT_PIN_UART0_RXD, "uart0_rxd"),
225 PINCTRL_PIN(WMT_PIN_UART1_RTS, "uart1_rts"),
226 PINCTRL_PIN(WMT_PIN_UART1_TXD, "uart1_txd"),
227 PINCTRL_PIN(WMT_PIN_UART1_CTS, "uart1_cts"),
228 PINCTRL_PIN(WMT_PIN_UART1_RXD, "uart1_rxd"),
229 PINCTRL_PIN(WMT_PIN_UART2_RTS, "uart2_rts"),
230 PINCTRL_PIN(WMT_PIN_UART2_TXD, "uart2_txd"),
231 PINCTRL_PIN(WMT_PIN_UART2_CTS, "uart2_cts"),
232 PINCTRL_PIN(WMT_PIN_UART2_RXD, "uart2_rxd"),
233 PINCTRL_PIN(WMT_PIN_UART3_RTS, "uart3_rts"),
234 PINCTRL_PIN(WMT_PIN_UART3_TXD, "uart3_txd"),
235 PINCTRL_PIN(WMT_PIN_UART3_CTS, "uart3_cts"),
236 PINCTRL_PIN(WMT_PIN_UART3_RXD, "uart3_rxd"),
237 PINCTRL_PIN(WMT_PIN_SD2CD, "sd2_cd"),
238 PINCTRL_PIN(WMT_PIN_SD2DATA3, "sd2_data3"),
239 PINCTRL_PIN(WMT_PIN_SD2DATA0, "sd2_data0"),
240 PINCTRL_PIN(WMT_PIN_SD2WP, "sd2_wp"),
241 PINCTRL_PIN(WMT_PIN_SD2DATA1, "sd2_data1"),
242 PINCTRL_PIN(WMT_PIN_SD2DATA2, "sd2_data2"),
243 PINCTRL_PIN(WMT_PIN_SD2CMD, "sd2_cmd"),
244 PINCTRL_PIN(WMT_PIN_SD2CLK, "sd2_clk"),
245 PINCTRL_PIN(WMT_PIN_SD2PWR, "sd2_pwr"),
246 PINCTRL_PIN(WMT_PIN_SD1CLK, "sd1_clk"),
247 PINCTRL_PIN(WMT_PIN_SD1CMD, "sd1_cmd"),
248 PINCTRL_PIN(WMT_PIN_SD1PWR, "sd1_pwr"),
249 PINCTRL_PIN(WMT_PIN_SD1WP, "sd1_wp"),
250 PINCTRL_PIN(WMT_PIN_SD1CD, "sd1_cd"),
251 PINCTRL_PIN(WMT_PIN_SPI0SS3, "spi0_ss3"),
252 PINCTRL_PIN(WMT_PIN_SPI0SS2, "spi0_ss2"),
253 PINCTRL_PIN(WMT_PIN_PWMOUT1, "pwmout1"),
254 PINCTRL_PIN(WMT_PIN_PWMOUT0, "pwmout0"),
255};
256
257/* Order of these names must match the above list */
258static const char * const wm8750_groups[] = {
259 "extgpio0",
260 "extgpio1",
261 "extgpio2",
262 "extgpio3",
263 "extgpio4",
264 "extgpio5",
265 "extgpio6",
266 "extgpio7",
267 "wakeup0",
268 "wakeup1",
269 "sd0_cd",
270 "vdout0",
271 "vdout1",
272 "vdout2",
273 "vdout3",
274 "vdout4",
275 "vdout5",
276 "vdout6",
277 "vdout7",
278 "vdout8",
279 "vdout9",
280 "vdout10",
281 "vdout11",
282 "vdout12",
283 "vdout13",
284 "vdout14",
285 "vdout15",
286 "vdout16",
287 "vdout17",
288 "vdout18",
289 "vdout19",
290 "vdout20",
291 "vdout21",
292 "vdout22",
293 "vdout23",
294 "vdin0",
295 "vdin1",
296 "vdin2",
297 "vdin3",
298 "vdin4",
299 "vdin5",
300 "vdin6",
301 "vdin7",
302 "spi0_mosi",
303 "spi0_miso",
304 "spi0_ss",
305 "spi0_clk",
306 "spi0_ssb",
307 "sd0_clk",
308 "sd0_cmd",
309 "sd0_wp",
310 "sd0_data0",
311 "sd0_data1",
312 "sd0_data2",
313 "sd0_data3",
314 "sd1_data0",
315 "sd1_data1",
316 "sd1_data2",
317 "sd1_data3",
318 "sd1_data4",
319 "sd1_data5",
320 "sd1_data6",
321 "sd1_data7",
322 "i2c0_scl",
323 "i2c0_sda",
324 "i2c1_scl",
325 "i2c1_sda",
326 "i2c2_scl",
327 "i2c2_sda",
328 "uart0_rts",
329 "uart0_txd",
330 "uart0_cts",
331 "uart0_rxd",
332 "uart1_rts",
333 "uart1_txd",
334 "uart1_cts",
335 "uart1_rxd",
336 "uart2_rts",
337 "uart2_txd",
338 "uart2_cts",
339 "uart2_rxd",
340 "uart3_rts",
341 "uart3_txd",
342 "uart3_cts",
343 "uart3_rxd",
344 "sd2_cd",
345 "sd2_data3",
346 "sd2_data0",
347 "sd2_wp",
348 "sd2_data1",
349 "sd2_data2",
350 "sd2_cmd",
351 "sd2_clk",
352 "sd2_pwr",
353 "sd1_clk",
354 "sd1_cmd",
355 "sd1_pwr",
356 "sd1_wp",
357 "sd1_cd",
358 "spi0_ss3",
359 "spi0_ss2",
360 "pwmout1",
361 "pwmout0",
362};
363
364static int wm8750_pinctrl_probe(struct platform_device *pdev)
365{
366 struct wmt_pinctrl_data *data;
367
368 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
369 if (!data) {
370 dev_err(&pdev->dev, "failed to allocate data\n");
371 return -ENOMEM;
372 }
373
374 data->banks = wm8750_banks;
375 data->nbanks = ARRAY_SIZE(wm8750_banks);
376 data->pins = wm8750_pins;
377 data->npins = ARRAY_SIZE(wm8750_pins);
378 data->groups = wm8750_groups;
379 data->ngroups = ARRAY_SIZE(wm8750_groups);
380
381 return wmt_pinctrl_probe(pdev, data);
382}
383
384static int wm8750_pinctrl_remove(struct platform_device *pdev)
385{
386 return wmt_pinctrl_remove(pdev);
387}
388
389static struct of_device_id wmt_pinctrl_of_match[] = {
390 { .compatible = "wm,wm8750-pinctrl" },
391 { /* sentinel */ },
392};
393
394static struct platform_driver wmt_pinctrl_driver = {
395 .probe = wm8750_pinctrl_probe,
396 .remove = wm8750_pinctrl_remove,
397 .driver = {
398 .name = "pinctrl-wm8750",
399 .owner = THIS_MODULE,
400 .of_match_table = wmt_pinctrl_of_match,
401 },
402};
403
404module_platform_driver(wmt_pinctrl_driver);
405
406MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
407MODULE_DESCRIPTION("Wondermedia WM8750 Pincontrol driver");
408MODULE_LICENSE("GPL v2");
409MODULE_DEVICE_TABLE(of, wmt_pinctrl_of_match);
diff --git a/drivers/pinctrl/vt8500/pinctrl-wm8850.c b/drivers/pinctrl/vt8500/pinctrl-wm8850.c
new file mode 100644
index 000000000000..ecadce9c91d5
--- /dev/null
+++ b/drivers/pinctrl/vt8500/pinctrl-wm8850.c
@@ -0,0 +1,388 @@
1/*
2 * Pinctrl data for Wondermedia WM8850 SoC
3 *
4 * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21
22#include "pinctrl-wmt.h"
23
24/*
25 * Describe the register offsets within the GPIO memory space
26 * The dedicated external GPIO's should always be listed in bank 0
27 * so they are exported in the 0..31 range which is what users
28 * expect.
29 *
30 * Do not reorder these banks as it will change the pin numbering
31 */
32static const struct wmt_pinctrl_bank_registers wm8850_banks[] = {
33 WMT_PINCTRL_BANK(0x40, 0x80, 0xC0, 0x00, 0x480, 0x4C0), /* 0 */
34 WMT_PINCTRL_BANK(0x44, 0x84, 0xC4, 0x04, 0x484, 0x4C4), /* 1 */
35 WMT_PINCTRL_BANK(0x48, 0x88, 0xC8, 0x08, 0x488, 0x4C8), /* 2 */
36 WMT_PINCTRL_BANK(0x4C, 0x8C, 0xCC, 0x0C, 0x48C, 0x4CC), /* 3 */
37 WMT_PINCTRL_BANK(0x50, 0x90, 0xD0, 0x10, 0x490, 0x4D0), /* 4 */
38 WMT_PINCTRL_BANK(0x54, 0x94, 0xD4, 0x14, 0x494, 0x4D4), /* 5 */
39 WMT_PINCTRL_BANK(0x58, 0x98, 0xD8, 0x18, 0x498, 0x4D8), /* 6 */
40 WMT_PINCTRL_BANK(0x5C, 0x9C, 0xDC, 0x1C, 0x49C, 0x4DC), /* 7 */
41 WMT_PINCTRL_BANK(0x60, 0xA0, 0xE0, 0x20, 0x4A0, 0x4E0), /* 8 */
42 WMT_PINCTRL_BANK(0x70, 0xB0, 0xF0, 0x30, 0x4B0, 0x4F0), /* 9 */
43 WMT_PINCTRL_BANK(0x7C, 0xBC, 0xDC, 0x3C, 0x4BC, 0x4FC), /* 10 */
44};
45
46/* Please keep sorted by bank/bit */
47#define WMT_PIN_EXTGPIO0 WMT_PIN(0, 0)
48#define WMT_PIN_EXTGPIO1 WMT_PIN(0, 1)
49#define WMT_PIN_EXTGPIO2 WMT_PIN(0, 2)
50#define WMT_PIN_EXTGPIO3 WMT_PIN(0, 3)
51#define WMT_PIN_EXTGPIO4 WMT_PIN(0, 4)
52#define WMT_PIN_EXTGPIO5 WMT_PIN(0, 5)
53#define WMT_PIN_EXTGPIO6 WMT_PIN(0, 6)
54#define WMT_PIN_EXTGPIO7 WMT_PIN(0, 7)
55#define WMT_PIN_WAKEUP0 WMT_PIN(0, 16)
56#define WMT_PIN_WAKEUP1 WMT_PIN(0, 17)
57#define WMT_PIN_WAKEUP2 WMT_PIN(0, 18)
58#define WMT_PIN_WAKEUP3 WMT_PIN(0, 19)
59#define WMT_PIN_SUSGPIO0 WMT_PIN(0, 21)
60#define WMT_PIN_SUSGPIO1 WMT_PIN(0, 22)
61#define WMT_PIN_SD0CD WMT_PIN(0, 28)
62#define WMT_PIN_VDOUT0 WMT_PIN(1, 0)
63#define WMT_PIN_VDOUT1 WMT_PIN(1, 1)
64#define WMT_PIN_VDOUT2 WMT_PIN(1, 2)
65#define WMT_PIN_VDOUT3 WMT_PIN(1, 3)
66#define WMT_PIN_VDOUT4 WMT_PIN(1, 4)
67#define WMT_PIN_VDOUT5 WMT_PIN(1, 5)
68#define WMT_PIN_VDOUT6 WMT_PIN(1, 6)
69#define WMT_PIN_VDOUT7 WMT_PIN(1, 7)
70#define WMT_PIN_VDOUT8 WMT_PIN(1, 8)
71#define WMT_PIN_VDOUT9 WMT_PIN(1, 9)
72#define WMT_PIN_VDOUT10 WMT_PIN(1, 10)
73#define WMT_PIN_VDOUT11 WMT_PIN(1, 11)
74#define WMT_PIN_VDOUT12 WMT_PIN(1, 12)
75#define WMT_PIN_VDOUT13 WMT_PIN(1, 13)
76#define WMT_PIN_VDOUT14 WMT_PIN(1, 14)
77#define WMT_PIN_VDOUT15 WMT_PIN(1, 15)
78#define WMT_PIN_VDOUT16 WMT_PIN(1, 16)
79#define WMT_PIN_VDOUT17 WMT_PIN(1, 17)
80#define WMT_PIN_VDOUT18 WMT_PIN(1, 18)
81#define WMT_PIN_VDOUT19 WMT_PIN(1, 19)
82#define WMT_PIN_VDOUT20 WMT_PIN(1, 20)
83#define WMT_PIN_VDOUT21 WMT_PIN(1, 21)
84#define WMT_PIN_VDOUT22 WMT_PIN(1, 22)
85#define WMT_PIN_VDOUT23 WMT_PIN(1, 23)
86#define WMT_PIN_VDIN0 WMT_PIN(2, 0)
87#define WMT_PIN_VDIN1 WMT_PIN(2, 1)
88#define WMT_PIN_VDIN2 WMT_PIN(2, 2)
89#define WMT_PIN_VDIN3 WMT_PIN(2, 3)
90#define WMT_PIN_VDIN4 WMT_PIN(2, 4)
91#define WMT_PIN_VDIN5 WMT_PIN(2, 5)
92#define WMT_PIN_VDIN6 WMT_PIN(2, 6)
93#define WMT_PIN_VDIN7 WMT_PIN(2, 7)
94#define WMT_PIN_SPI0_MOSI WMT_PIN(2, 24)
95#define WMT_PIN_SPI0_MISO WMT_PIN(2, 25)
96#define WMT_PIN_SPI0_SS WMT_PIN(2, 26)
97#define WMT_PIN_SPI0_CLK WMT_PIN(2, 27)
98#define WMT_PIN_SPI0_SSB WMT_PIN(2, 28)
99#define WMT_PIN_SD0CLK WMT_PIN(3, 17)
100#define WMT_PIN_SD0CMD WMT_PIN(3, 18)
101#define WMT_PIN_SD0WP WMT_PIN(3, 19)
102#define WMT_PIN_SD0DATA0 WMT_PIN(3, 20)
103#define WMT_PIN_SD0DATA1 WMT_PIN(3, 21)
104#define WMT_PIN_SD0DATA2 WMT_PIN(3, 22)
105#define WMT_PIN_SD0DATA3 WMT_PIN(3, 23)
106#define WMT_PIN_SD1DATA0 WMT_PIN(3, 24)
107#define WMT_PIN_SD1DATA1 WMT_PIN(3, 25)
108#define WMT_PIN_SD1DATA2 WMT_PIN(3, 26)
109#define WMT_PIN_SD1DATA3 WMT_PIN(3, 27)
110#define WMT_PIN_SD1DATA4 WMT_PIN(3, 28)
111#define WMT_PIN_SD1DATA5 WMT_PIN(3, 29)
112#define WMT_PIN_SD1DATA6 WMT_PIN(3, 30)
113#define WMT_PIN_SD1DATA7 WMT_PIN(3, 31)
114#define WMT_PIN_I2C0_SCL WMT_PIN(5, 8)
115#define WMT_PIN_I2C0_SDA WMT_PIN(5, 9)
116#define WMT_PIN_I2C1_SCL WMT_PIN(5, 10)
117#define WMT_PIN_I2C1_SDA WMT_PIN(5, 11)
118#define WMT_PIN_I2C2_SCL WMT_PIN(5, 12)
119#define WMT_PIN_I2C2_SDA WMT_PIN(5, 13)
120#define WMT_PIN_UART0_RTS WMT_PIN(5, 16)
121#define WMT_PIN_UART0_TXD WMT_PIN(5, 17)
122#define WMT_PIN_UART0_CTS WMT_PIN(5, 18)
123#define WMT_PIN_UART0_RXD WMT_PIN(5, 19)
124#define WMT_PIN_UART1_RTS WMT_PIN(5, 20)
125#define WMT_PIN_UART1_TXD WMT_PIN(5, 21)
126#define WMT_PIN_UART1_CTS WMT_PIN(5, 22)
127#define WMT_PIN_UART1_RXD WMT_PIN(5, 23)
128#define WMT_PIN_UART2_RTS WMT_PIN(5, 24)
129#define WMT_PIN_UART2_TXD WMT_PIN(5, 25)
130#define WMT_PIN_UART2_CTS WMT_PIN(5, 26)
131#define WMT_PIN_UART2_RXD WMT_PIN(5, 27)
132#define WMT_PIN_SD2WP WMT_PIN(6, 3)
133#define WMT_PIN_SD2CMD WMT_PIN(6, 6)
134#define WMT_PIN_SD2CLK WMT_PIN(6, 7)
135#define WMT_PIN_SD2PWR WMT_PIN(6, 9)
136#define WMT_PIN_SD1CLK WMT_PIN(7, 0)
137#define WMT_PIN_SD1CMD WMT_PIN(7, 1)
138#define WMT_PIN_SD1PWR WMT_PIN(7, 10)
139#define WMT_PIN_SD1WP WMT_PIN(7, 11)
140#define WMT_PIN_SD1CD WMT_PIN(7, 12)
141#define WMT_PIN_PWMOUT1 WMT_PIN(7, 26)
142#define WMT_PIN_PWMOUT0 WMT_PIN(7, 27)
143
144static const struct pinctrl_pin_desc wm8850_pins[] = {
145 PINCTRL_PIN(WMT_PIN_EXTGPIO0, "extgpio0"),
146 PINCTRL_PIN(WMT_PIN_EXTGPIO1, "extgpio1"),
147 PINCTRL_PIN(WMT_PIN_EXTGPIO2, "extgpio2"),
148 PINCTRL_PIN(WMT_PIN_EXTGPIO3, "extgpio3"),
149 PINCTRL_PIN(WMT_PIN_EXTGPIO4, "extgpio4"),
150 PINCTRL_PIN(WMT_PIN_EXTGPIO5, "extgpio5"),
151 PINCTRL_PIN(WMT_PIN_EXTGPIO6, "extgpio6"),
152 PINCTRL_PIN(WMT_PIN_EXTGPIO7, "extgpio7"),
153 PINCTRL_PIN(WMT_PIN_WAKEUP0, "wakeup0"),
154 PINCTRL_PIN(WMT_PIN_WAKEUP1, "wakeup1"),
155 PINCTRL_PIN(WMT_PIN_WAKEUP2, "wakeup2"),
156 PINCTRL_PIN(WMT_PIN_WAKEUP3, "wakeup3"),
157 PINCTRL_PIN(WMT_PIN_SUSGPIO0, "susgpio0"),
158 PINCTRL_PIN(WMT_PIN_SUSGPIO1, "susgpio1"),
159 PINCTRL_PIN(WMT_PIN_SD0CD, "sd0_cd"),
160 PINCTRL_PIN(WMT_PIN_VDOUT0, "vdout0"),
161 PINCTRL_PIN(WMT_PIN_VDOUT1, "vdout1"),
162 PINCTRL_PIN(WMT_PIN_VDOUT2, "vdout2"),
163 PINCTRL_PIN(WMT_PIN_VDOUT3, "vdout3"),
164 PINCTRL_PIN(WMT_PIN_VDOUT4, "vdout4"),
165 PINCTRL_PIN(WMT_PIN_VDOUT5, "vdout5"),
166 PINCTRL_PIN(WMT_PIN_VDOUT6, "vdout6"),
167 PINCTRL_PIN(WMT_PIN_VDOUT7, "vdout7"),
168 PINCTRL_PIN(WMT_PIN_VDOUT8, "vdout8"),
169 PINCTRL_PIN(WMT_PIN_VDOUT9, "vdout9"),
170 PINCTRL_PIN(WMT_PIN_VDOUT10, "vdout10"),
171 PINCTRL_PIN(WMT_PIN_VDOUT11, "vdout11"),
172 PINCTRL_PIN(WMT_PIN_VDOUT12, "vdout12"),
173 PINCTRL_PIN(WMT_PIN_VDOUT13, "vdout13"),
174 PINCTRL_PIN(WMT_PIN_VDOUT14, "vdout14"),
175 PINCTRL_PIN(WMT_PIN_VDOUT15, "vdout15"),
176 PINCTRL_PIN(WMT_PIN_VDOUT16, "vdout16"),
177 PINCTRL_PIN(WMT_PIN_VDOUT17, "vdout17"),
178 PINCTRL_PIN(WMT_PIN_VDOUT18, "vdout18"),
179 PINCTRL_PIN(WMT_PIN_VDOUT19, "vdout19"),
180 PINCTRL_PIN(WMT_PIN_VDOUT20, "vdout20"),
181 PINCTRL_PIN(WMT_PIN_VDOUT21, "vdout21"),
182 PINCTRL_PIN(WMT_PIN_VDOUT22, "vdout22"),
183 PINCTRL_PIN(WMT_PIN_VDOUT23, "vdout23"),
184 PINCTRL_PIN(WMT_PIN_VDIN0, "vdin0"),
185 PINCTRL_PIN(WMT_PIN_VDIN1, "vdin1"),
186 PINCTRL_PIN(WMT_PIN_VDIN2, "vdin2"),
187 PINCTRL_PIN(WMT_PIN_VDIN3, "vdin3"),
188 PINCTRL_PIN(WMT_PIN_VDIN4, "vdin4"),
189 PINCTRL_PIN(WMT_PIN_VDIN5, "vdin5"),
190 PINCTRL_PIN(WMT_PIN_VDIN6, "vdin6"),
191 PINCTRL_PIN(WMT_PIN_VDIN7, "vdin7"),
192 PINCTRL_PIN(WMT_PIN_SPI0_MOSI, "spi0_mosi"),
193 PINCTRL_PIN(WMT_PIN_SPI0_MISO, "spi0_miso"),
194 PINCTRL_PIN(WMT_PIN_SPI0_SS, "spi0_ss"),
195 PINCTRL_PIN(WMT_PIN_SPI0_CLK, "spi0_clk"),
196 PINCTRL_PIN(WMT_PIN_SPI0_SSB, "spi0_ssb"),
197 PINCTRL_PIN(WMT_PIN_SD0CLK, "sd0_clk"),
198 PINCTRL_PIN(WMT_PIN_SD0CMD, "sd0_cmd"),
199 PINCTRL_PIN(WMT_PIN_SD0WP, "sd0_wp"),
200 PINCTRL_PIN(WMT_PIN_SD0DATA0, "sd0_data0"),
201 PINCTRL_PIN(WMT_PIN_SD0DATA1, "sd0_data1"),
202 PINCTRL_PIN(WMT_PIN_SD0DATA2, "sd0_data2"),
203 PINCTRL_PIN(WMT_PIN_SD0DATA3, "sd0_data3"),
204 PINCTRL_PIN(WMT_PIN_SD1DATA0, "sd1_data0"),
205 PINCTRL_PIN(WMT_PIN_SD1DATA1, "sd1_data1"),
206 PINCTRL_PIN(WMT_PIN_SD1DATA2, "sd1_data2"),
207 PINCTRL_PIN(WMT_PIN_SD1DATA3, "sd1_data3"),
208 PINCTRL_PIN(WMT_PIN_SD1DATA4, "sd1_data4"),
209 PINCTRL_PIN(WMT_PIN_SD1DATA5, "sd1_data5"),
210 PINCTRL_PIN(WMT_PIN_SD1DATA6, "sd1_data6"),
211 PINCTRL_PIN(WMT_PIN_SD1DATA7, "sd1_data7"),
212 PINCTRL_PIN(WMT_PIN_I2C0_SCL, "i2c0_scl"),
213 PINCTRL_PIN(WMT_PIN_I2C0_SDA, "i2c0_sda"),
214 PINCTRL_PIN(WMT_PIN_I2C1_SCL, "i2c1_scl"),
215 PINCTRL_PIN(WMT_PIN_I2C1_SDA, "i2c1_sda"),
216 PINCTRL_PIN(WMT_PIN_I2C2_SCL, "i2c2_scl"),
217 PINCTRL_PIN(WMT_PIN_I2C2_SDA, "i2c2_sda"),
218 PINCTRL_PIN(WMT_PIN_UART0_RTS, "uart0_rts"),
219 PINCTRL_PIN(WMT_PIN_UART0_TXD, "uart0_txd"),
220 PINCTRL_PIN(WMT_PIN_UART0_CTS, "uart0_cts"),
221 PINCTRL_PIN(WMT_PIN_UART0_RXD, "uart0_rxd"),
222 PINCTRL_PIN(WMT_PIN_UART1_RTS, "uart1_rts"),
223 PINCTRL_PIN(WMT_PIN_UART1_TXD, "uart1_txd"),
224 PINCTRL_PIN(WMT_PIN_UART1_CTS, "uart1_cts"),
225 PINCTRL_PIN(WMT_PIN_UART1_RXD, "uart1_rxd"),
226 PINCTRL_PIN(WMT_PIN_UART2_RTS, "uart2_rts"),
227 PINCTRL_PIN(WMT_PIN_UART2_TXD, "uart2_txd"),
228 PINCTRL_PIN(WMT_PIN_UART2_CTS, "uart2_cts"),
229 PINCTRL_PIN(WMT_PIN_UART2_RXD, "uart2_rxd"),
230 PINCTRL_PIN(WMT_PIN_SD2WP, "sd2_wp"),
231 PINCTRL_PIN(WMT_PIN_SD2CMD, "sd2_cmd"),
232 PINCTRL_PIN(WMT_PIN_SD2CLK, "sd2_clk"),
233 PINCTRL_PIN(WMT_PIN_SD2PWR, "sd2_pwr"),
234 PINCTRL_PIN(WMT_PIN_SD1CLK, "sd1_clk"),
235 PINCTRL_PIN(WMT_PIN_SD1CMD, "sd1_cmd"),
236 PINCTRL_PIN(WMT_PIN_SD1PWR, "sd1_pwr"),
237 PINCTRL_PIN(WMT_PIN_SD1WP, "sd1_wp"),
238 PINCTRL_PIN(WMT_PIN_SD1CD, "sd1_cd"),
239 PINCTRL_PIN(WMT_PIN_PWMOUT1, "pwmout1"),
240 PINCTRL_PIN(WMT_PIN_PWMOUT0, "pwmout0"),
241};
242
243/* Order of these names must match the above list */
244static const char * const wm8850_groups[] = {
245 "extgpio0",
246 "extgpio1",
247 "extgpio2",
248 "extgpio3",
249 "extgpio4",
250 "extgpio5",
251 "extgpio6",
252 "extgpio7",
253 "wakeup0",
254 "wakeup1",
255 "wakeup2",
256 "wakeup3",
257 "susgpio0",
258 "susgpio1",
259 "sd0_cd",
260 "vdout0",
261 "vdout1",
262 "vdout2",
263 "vdout3",
264 "vdout4",
265 "vdout5",
266 "vdout6",
267 "vdout7",
268 "vdout8",
269 "vdout9",
270 "vdout10",
271 "vdout11",
272 "vdout12",
273 "vdout13",
274 "vdout14",
275 "vdout15",
276 "vdout16",
277 "vdout17",
278 "vdout18",
279 "vdout19",
280 "vdout20",
281 "vdout21",
282 "vdout22",
283 "vdout23",
284 "vdin0",
285 "vdin1",
286 "vdin2",
287 "vdin3",
288 "vdin4",
289 "vdin5",
290 "vdin6",
291 "vdin7",
292 "spi0_mosi",
293 "spi0_miso",
294 "spi0_ss",
295 "spi0_clk",
296 "spi0_ssb",
297 "sd0_clk",
298 "sd0_cmd",
299 "sd0_wp",
300 "sd0_data0",
301 "sd0_data1",
302 "sd0_data2",
303 "sd0_data3",
304 "sd1_data0",
305 "sd1_data1",
306 "sd1_data2",
307 "sd1_data3",
308 "sd1_data4",
309 "sd1_data5",
310 "sd1_data6",
311 "sd1_data7",
312 "i2c0_scl",
313 "i2c0_sda",
314 "i2c1_scl",
315 "i2c1_sda",
316 "i2c2_scl",
317 "i2c2_sda",
318 "uart0_rts",
319 "uart0_txd",
320 "uart0_cts",
321 "uart0_rxd",
322 "uart1_rts",
323 "uart1_txd",
324 "uart1_cts",
325 "uart1_rxd",
326 "uart2_rts",
327 "uart2_txd",
328 "uart2_cts",
329 "uart2_rxd",
330 "sd2_wp",
331 "sd2_cmd",
332 "sd2_clk",
333 "sd2_pwr",
334 "sd1_clk",
335 "sd1_cmd",
336 "sd1_pwr",
337 "sd1_wp",
338 "sd1_cd",
339 "pwmout1",
340 "pwmout0",
341};
342
343static int wm8850_pinctrl_probe(struct platform_device *pdev)
344{
345 struct wmt_pinctrl_data *data;
346
347 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
348 if (!data) {
349 dev_err(&pdev->dev, "failed to allocate data\n");
350 return -ENOMEM;
351 }
352
353 data->banks = wm8850_banks;
354 data->nbanks = ARRAY_SIZE(wm8850_banks);
355 data->pins = wm8850_pins;
356 data->npins = ARRAY_SIZE(wm8850_pins);
357 data->groups = wm8850_groups;
358 data->ngroups = ARRAY_SIZE(wm8850_groups);
359
360 return wmt_pinctrl_probe(pdev, data);
361}
362
363static int wm8850_pinctrl_remove(struct platform_device *pdev)
364{
365 return wmt_pinctrl_remove(pdev);
366}
367
368static struct of_device_id wmt_pinctrl_of_match[] = {
369 { .compatible = "wm,wm8850-pinctrl" },
370 { /* sentinel */ },
371};
372
373static struct platform_driver wmt_pinctrl_driver = {
374 .probe = wm8850_pinctrl_probe,
375 .remove = wm8850_pinctrl_remove,
376 .driver = {
377 .name = "pinctrl-wm8850",
378 .owner = THIS_MODULE,
379 .of_match_table = wmt_pinctrl_of_match,
380 },
381};
382
383module_platform_driver(wmt_pinctrl_driver);
384
385MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
386MODULE_DESCRIPTION("Wondermedia WM8850 Pincontrol driver");
387MODULE_LICENSE("GPL v2");
388MODULE_DEVICE_TABLE(of, wmt_pinctrl_of_match);
diff --git a/drivers/pinctrl/vt8500/pinctrl-wmt.c b/drivers/pinctrl/vt8500/pinctrl-wmt.c
new file mode 100644
index 000000000000..14400a7974bd
--- /dev/null
+++ b/drivers/pinctrl/vt8500/pinctrl-wmt.c
@@ -0,0 +1,632 @@
1/*
2 * Pinctrl driver for the Wondermedia SoC's
3 *
4 * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/err.h>
17#include <linux/gpio.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/irq.h>
21#include <linux/module.h>
22#include <linux/of.h>
23#include <linux/of_irq.h>
24#include <linux/pinctrl/consumer.h>
25#include <linux/pinctrl/machine.h>
26#include <linux/pinctrl/pinconf.h>
27#include <linux/pinctrl/pinconf-generic.h>
28#include <linux/pinctrl/pinctrl.h>
29#include <linux/pinctrl/pinmux.h>
30#include <linux/platform_device.h>
31#include <linux/slab.h>
32
33#include "pinctrl-wmt.h"
34
35static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg,
36 u32 mask)
37{
38 u32 val;
39
40 val = readl_relaxed(data->base + reg);
41 val |= mask;
42 writel_relaxed(val, data->base + reg);
43}
44
45static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg,
46 u32 mask)
47{
48 u32 val;
49
50 val = readl_relaxed(data->base + reg);
51 val &= ~mask;
52 writel_relaxed(val, data->base + reg);
53}
54
55enum wmt_func_sel {
56 WMT_FSEL_GPIO_IN = 0,
57 WMT_FSEL_GPIO_OUT = 1,
58 WMT_FSEL_ALT = 2,
59 WMT_FSEL_COUNT = 3,
60};
61
62static const char * const wmt_functions[WMT_FSEL_COUNT] = {
63 [WMT_FSEL_GPIO_IN] = "gpio_in",
64 [WMT_FSEL_GPIO_OUT] = "gpio_out",
65 [WMT_FSEL_ALT] = "alt",
66};
67
68static int wmt_pmx_get_functions_count(struct pinctrl_dev *pctldev)
69{
70 return WMT_FSEL_COUNT;
71}
72
73static const char *wmt_pmx_get_function_name(struct pinctrl_dev *pctldev,
74 unsigned selector)
75{
76 return wmt_functions[selector];
77}
78
79static int wmt_pmx_get_function_groups(struct pinctrl_dev *pctldev,
80 unsigned selector,
81 const char * const **groups,
82 unsigned * const num_groups)
83{
84 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
85
86 /* every pin does every function */
87 *groups = data->groups;
88 *num_groups = data->ngroups;
89
90 return 0;
91}
92
93static int wmt_set_pinmux(struct wmt_pinctrl_data *data, unsigned func,
94 unsigned pin)
95{
96 u32 bank = WMT_BANK_FROM_PIN(pin);
97 u32 bit = WMT_BIT_FROM_PIN(pin);
98 u32 reg_en = data->banks[bank].reg_en;
99 u32 reg_dir = data->banks[bank].reg_dir;
100
101 if (reg_dir == NO_REG) {
102 dev_err(data->dev, "pin:%d no direction register defined\n",
103 pin);
104 return -EINVAL;
105 }
106
107 /*
108 * If reg_en == NO_REG, we assume it is a dedicated GPIO and cannot be
109 * disabled (as on VT8500) and that no alternate function is available.
110 */
111 switch (func) {
112 case WMT_FSEL_GPIO_IN:
113 if (reg_en != NO_REG)
114 wmt_setbits(data, reg_en, BIT(bit));
115 wmt_clearbits(data, reg_dir, BIT(bit));
116 break;
117 case WMT_FSEL_GPIO_OUT:
118 if (reg_en != NO_REG)
119 wmt_setbits(data, reg_en, BIT(bit));
120 wmt_setbits(data, reg_dir, BIT(bit));
121 break;
122 case WMT_FSEL_ALT:
123 if (reg_en == NO_REG) {
124 dev_err(data->dev, "pin:%d no alt function available\n",
125 pin);
126 return -EINVAL;
127 }
128 wmt_clearbits(data, reg_en, BIT(bit));
129 }
130
131 return 0;
132}
133
134static int wmt_pmx_enable(struct pinctrl_dev *pctldev,
135 unsigned func_selector,
136 unsigned group_selector)
137{
138 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
139 u32 pinnum = data->pins[group_selector].number;
140
141 return wmt_set_pinmux(data, func_selector, pinnum);
142}
143
144static void wmt_pmx_disable(struct pinctrl_dev *pctldev,
145 unsigned func_selector,
146 unsigned group_selector)
147{
148 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
149 u32 pinnum = data->pins[group_selector].number;
150
151 /* disable by setting GPIO_IN */
152 wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, pinnum);
153}
154
155static void wmt_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
156 struct pinctrl_gpio_range *range,
157 unsigned offset)
158{
159 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
160
161 /* disable by setting GPIO_IN */
162 wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, offset);
163}
164
165static int wmt_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
166 struct pinctrl_gpio_range *range,
167 unsigned offset,
168 bool input)
169{
170 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
171
172 wmt_set_pinmux(data, (input ? WMT_FSEL_GPIO_IN : WMT_FSEL_GPIO_OUT),
173 offset);
174
175 return 0;
176}
177
178static struct pinmux_ops wmt_pinmux_ops = {
179 .get_functions_count = wmt_pmx_get_functions_count,
180 .get_function_name = wmt_pmx_get_function_name,
181 .get_function_groups = wmt_pmx_get_function_groups,
182 .enable = wmt_pmx_enable,
183 .disable = wmt_pmx_disable,
184 .gpio_disable_free = wmt_pmx_gpio_disable_free,
185 .gpio_set_direction = wmt_pmx_gpio_set_direction,
186};
187
188static int wmt_get_groups_count(struct pinctrl_dev *pctldev)
189{
190 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
191
192 return data->ngroups;
193}
194
195static const char *wmt_get_group_name(struct pinctrl_dev *pctldev,
196 unsigned selector)
197{
198 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
199
200 return data->groups[selector];
201}
202
203static int wmt_get_group_pins(struct pinctrl_dev *pctldev,
204 unsigned selector,
205 const unsigned **pins,
206 unsigned *num_pins)
207{
208 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
209
210 *pins = &data->pins[selector].number;
211 *num_pins = 1;
212
213 return 0;
214}
215
216static int wmt_pctl_find_group_by_pin(struct wmt_pinctrl_data *data, u32 pin)
217{
218 int i;
219
220 for (i = 0; i < data->npins; i++) {
221 if (data->pins[i].number == pin)
222 return i;
223 }
224
225 return -EINVAL;
226}
227
228static int wmt_pctl_dt_node_to_map_func(struct wmt_pinctrl_data *data,
229 struct device_node *np,
230 u32 pin, u32 fnum,
231 struct pinctrl_map **maps)
232{
233 int group;
234 struct pinctrl_map *map = *maps;
235
236 if (fnum >= ARRAY_SIZE(wmt_functions)) {
237 dev_err(data->dev, "invalid wm,function %d\n", fnum);
238 return -EINVAL;
239 }
240
241 group = wmt_pctl_find_group_by_pin(data, pin);
242 if (group < 0) {
243 dev_err(data->dev, "unable to match pin %d to group\n", pin);
244 return group;
245 }
246
247 map->type = PIN_MAP_TYPE_MUX_GROUP;
248 map->data.mux.group = data->groups[group];
249 map->data.mux.function = wmt_functions[fnum];
250 (*maps)++;
251
252 return 0;
253}
254
255static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
256 struct device_node *np,
257 u32 pin, u32 pull,
258 struct pinctrl_map **maps)
259{
260 int group;
261 unsigned long *configs;
262 struct pinctrl_map *map = *maps;
263
264 if (pull > 2) {
265 dev_err(data->dev, "invalid wm,pull %d\n", pull);
266 return -EINVAL;
267 }
268
269 group = wmt_pctl_find_group_by_pin(data, pin);
270 if (group < 0) {
271 dev_err(data->dev, "unable to match pin %d to group\n", pin);
272 return group;
273 }
274
275 configs = kzalloc(sizeof(*configs), GFP_KERNEL);
276 if (!configs)
277 return -ENOMEM;
278
279 configs[0] = pull;
280
281 map->type = PIN_MAP_TYPE_CONFIGS_PIN;
282 map->data.configs.group_or_pin = data->groups[group];
283 map->data.configs.configs = configs;
284 map->data.configs.num_configs = 1;
285 (*maps)++;
286
287 return 0;
288}
289
290static void wmt_pctl_dt_free_map(struct pinctrl_dev *pctldev,
291 struct pinctrl_map *maps,
292 unsigned num_maps)
293{
294 int i;
295
296 for (i = 0; i < num_maps; i++)
297 if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
298 kfree(maps[i].data.configs.configs);
299
300 kfree(maps);
301}
302
303static int wmt_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
304 struct device_node *np,
305 struct pinctrl_map **map,
306 unsigned *num_maps)
307{
308 struct pinctrl_map *maps, *cur_map;
309 struct property *pins, *funcs, *pulls;
310 u32 pin, func, pull;
311 int num_pins, num_funcs, num_pulls, maps_per_pin;
312 int i, err;
313 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
314
315 pins = of_find_property(np, "wm,pins", NULL);
316 if (!pins) {
317 dev_err(data->dev, "missing wmt,pins property\n");
318 return -EINVAL;
319 }
320
321 funcs = of_find_property(np, "wm,function", NULL);
322 pulls = of_find_property(np, "wm,pull", NULL);
323
324 if (!funcs && !pulls) {
325 dev_err(data->dev, "neither wm,function nor wm,pull specified\n");
326 return -EINVAL;
327 }
328
329 /*
330 * The following lines calculate how many values are defined for each
331 * of the properties.
332 */
333 num_pins = pins->length / sizeof(u32);
334 num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0;
335 num_pulls = pulls ? (pulls->length / sizeof(u32)) : 0;
336
337 if (num_funcs > 1 && num_funcs != num_pins) {
338 dev_err(data->dev, "wm,function must have 1 or %d entries\n",
339 num_pins);
340 return -EINVAL;
341 }
342
343 if (num_pulls > 1 && num_pulls != num_pins) {
344 dev_err(data->dev, "wm,pull must have 1 or %d entries\n",
345 num_pins);
346 return -EINVAL;
347 }
348
349 maps_per_pin = 0;
350 if (num_funcs)
351 maps_per_pin++;
352 if (num_pulls)
353 maps_per_pin++;
354
355 cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps),
356 GFP_KERNEL);
357 if (!maps)
358 return -ENOMEM;
359
360 for (i = 0; i < num_pins; i++) {
361 err = of_property_read_u32_index(np, "wm,pins", i, &pin);
362 if (err)
363 goto fail;
364
365 if (pin >= (data->nbanks * 32)) {
366 dev_err(data->dev, "invalid wm,pins value\n");
367 err = -EINVAL;
368 goto fail;
369 }
370
371 if (num_funcs) {
372 err = of_property_read_u32_index(np, "wm,function",
373 (num_funcs > 1 ? i : 0), &func);
374 if (err)
375 goto fail;
376
377 err = wmt_pctl_dt_node_to_map_func(data, np, pin, func,
378 &cur_map);
379 if (err)
380 goto fail;
381 }
382
383 if (num_pulls) {
384 err = of_property_read_u32_index(np, "wm,pull",
385 (num_pulls > 1 ? i : 0), &pull);
386 if (err)
387 goto fail;
388
389 err = wmt_pctl_dt_node_to_map_pull(data, np, pin, pull,
390 &cur_map);
391 if (err)
392 goto fail;
393 }
394 }
395 *map = maps;
396 *num_maps = num_pins * maps_per_pin;
397 return 0;
398
399/*
400 * The fail path removes any maps that have been allocated. The fail path is
401 * only called from code after maps has been kzalloc'd. It is also safe to
402 * pass 'num_pins * maps_per_pin' as the map count even though we probably
403 * failed before all the mappings were read as all maps are allocated at once,
404 * and configs are only allocated for .type = PIN_MAP_TYPE_CONFIGS_PIN - there
405 * is no failpath where a config can be allocated without .type being set.
406 */
407fail:
408 wmt_pctl_dt_free_map(pctldev, maps, num_pins * maps_per_pin);
409 return err;
410}
411
412static struct pinctrl_ops wmt_pctl_ops = {
413 .get_groups_count = wmt_get_groups_count,
414 .get_group_name = wmt_get_group_name,
415 .get_group_pins = wmt_get_group_pins,
416 .dt_node_to_map = wmt_pctl_dt_node_to_map,
417 .dt_free_map = wmt_pctl_dt_free_map,
418};
419
420static int wmt_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
421 unsigned long *config)
422{
423 return -ENOTSUPP;
424}
425
426static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
427 unsigned long config)
428{
429 struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
430 enum pin_config_param param = pinconf_to_config_param(config);
431 u16 arg = pinconf_to_config_argument(config);
432 u32 bank = WMT_BANK_FROM_PIN(pin);
433 u32 bit = WMT_BIT_FROM_PIN(pin);
434 u32 reg_pull_en = data->banks[bank].reg_pull_en;
435 u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg;
436
437 if ((reg_pull_en == NO_REG) || (reg_pull_cfg == NO_REG)) {
438 dev_err(data->dev, "bias functions not supported on pin %d\n",
439 pin);
440 return -EINVAL;
441 }
442
443 if ((param == PIN_CONFIG_BIAS_PULL_DOWN) ||
444 (param == PIN_CONFIG_BIAS_PULL_UP)) {
445 if (arg == 0)
446 param = PIN_CONFIG_BIAS_DISABLE;
447 }
448
449 switch (param) {
450 case PIN_CONFIG_BIAS_DISABLE:
451 wmt_clearbits(data, reg_pull_en, BIT(bit));
452 break;
453 case PIN_CONFIG_BIAS_PULL_DOWN:
454 wmt_clearbits(data, reg_pull_cfg, BIT(bit));
455 wmt_setbits(data, reg_pull_en, BIT(bit));
456 break;
457 case PIN_CONFIG_BIAS_PULL_UP:
458 wmt_setbits(data, reg_pull_cfg, BIT(bit));
459 wmt_setbits(data, reg_pull_en, BIT(bit));
460 break;
461 default:
462 dev_err(data->dev, "unknown pinconf param\n");
463 return -EINVAL;
464 }
465
466 return 0;
467}
468
469static struct pinconf_ops wmt_pinconf_ops = {
470 .pin_config_get = wmt_pinconf_get,
471 .pin_config_set = wmt_pinconf_set,
472};
473
474static struct pinctrl_desc wmt_desc = {
475 .owner = THIS_MODULE,
476 .name = "pinctrl-wmt",
477 .pctlops = &wmt_pctl_ops,
478 .pmxops = &wmt_pinmux_ops,
479 .confops = &wmt_pinconf_ops,
480};
481
482static int wmt_gpio_request(struct gpio_chip *chip, unsigned offset)
483{
484 return pinctrl_request_gpio(chip->base + offset);
485}
486
487static void wmt_gpio_free(struct gpio_chip *chip, unsigned offset)
488{
489 pinctrl_free_gpio(chip->base + offset);
490}
491
492static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
493{
494 struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
495 u32 bank = WMT_BANK_FROM_PIN(offset);
496 u32 bit = WMT_BIT_FROM_PIN(offset);
497 u32 reg_dir = data->banks[bank].reg_dir;
498 u32 val;
499
500 val = readl_relaxed(data->base + reg_dir);
501 if (val & BIT(bit))
502 return GPIOF_DIR_OUT;
503 else
504 return GPIOF_DIR_IN;
505}
506
507static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
508{
509 return pinctrl_gpio_direction_input(chip->base + offset);
510}
511
512static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
513 int value)
514{
515 return pinctrl_gpio_direction_output(chip->base + offset);
516}
517
518static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)
519{
520 struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
521 u32 bank = WMT_BANK_FROM_PIN(offset);
522 u32 bit = WMT_BIT_FROM_PIN(offset);
523 u32 reg_data_in = data->banks[bank].reg_data_in;
524
525 if (reg_data_in == NO_REG) {
526 dev_err(data->dev, "no data in register defined\n");
527 return -EINVAL;
528 }
529
530 return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit));
531}
532
533static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset,
534 int val)
535{
536 struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
537 u32 bank = WMT_BANK_FROM_PIN(offset);
538 u32 bit = WMT_BIT_FROM_PIN(offset);
539 u32 reg_data_out = data->banks[bank].reg_data_out;
540
541 if (reg_data_out == NO_REG) {
542 dev_err(data->dev, "no data out register defined\n");
543 return;
544 }
545
546 if (val)
547 wmt_setbits(data, reg_data_out, BIT(bit));
548 else
549 wmt_clearbits(data, reg_data_out, BIT(bit));
550}
551
552static struct gpio_chip wmt_gpio_chip = {
553 .label = "gpio-wmt",
554 .owner = THIS_MODULE,
555 .request = wmt_gpio_request,
556 .free = wmt_gpio_free,
557 .get_direction = wmt_gpio_get_direction,
558 .direction_input = wmt_gpio_direction_input,
559 .direction_output = wmt_gpio_direction_output,
560 .get = wmt_gpio_get_value,
561 .set = wmt_gpio_set_value,
562 .can_sleep = 0,
563};
564
565int wmt_pinctrl_probe(struct platform_device *pdev,
566 struct wmt_pinctrl_data *data)
567{
568 int err;
569 struct resource *res;
570
571 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
572 data->base = devm_request_and_ioremap(&pdev->dev, res);
573 if (!data->base) {
574 dev_err(&pdev->dev, "failed to map memory resource\n");
575 return -EBUSY;
576 }
577
578 wmt_desc.pins = data->pins;
579 wmt_desc.npins = data->npins;
580
581 data->gpio_chip = wmt_gpio_chip;
582 data->gpio_chip.dev = &pdev->dev;
583 data->gpio_chip.of_node = pdev->dev.of_node;
584 data->gpio_chip.ngpio = data->nbanks * 32;
585
586 platform_set_drvdata(pdev, data);
587
588 data->dev = &pdev->dev;
589
590 data->pctl_dev = pinctrl_register(&wmt_desc, &pdev->dev, data);
591 if (IS_ERR(data->pctl_dev)) {
592 dev_err(&pdev->dev, "Failed to register pinctrl\n");
593 return -EINVAL;
594 }
595
596 err = gpiochip_add(&data->gpio_chip);
597 if (err) {
598 dev_err(&pdev->dev, "could not add GPIO chip\n");
599 goto fail_gpio;
600 }
601
602 err = gpiochip_add_pin_range(&data->gpio_chip, dev_name(data->dev),
603 0, 0, data->nbanks * 32);
604 if (err)
605 goto fail_range;
606
607 dev_info(&pdev->dev, "Pin controller initialized\n");
608
609 return 0;
610
611fail_range:
612 err = gpiochip_remove(&data->gpio_chip);
613 if (err)
614 dev_err(&pdev->dev, "failed to remove gpio chip\n");
615fail_gpio:
616 pinctrl_unregister(data->pctl_dev);
617 return err;
618}
619
620int wmt_pinctrl_remove(struct platform_device *pdev)
621{
622 struct wmt_pinctrl_data *data = platform_get_drvdata(pdev);
623 int err;
624
625 err = gpiochip_remove(&data->gpio_chip);
626 if (err)
627 dev_err(&pdev->dev, "failed to remove gpio chip\n");
628
629 pinctrl_unregister(data->pctl_dev);
630
631 return 0;
632}
diff --git a/drivers/pinctrl/vt8500/pinctrl-wmt.h b/drivers/pinctrl/vt8500/pinctrl-wmt.h
new file mode 100644
index 000000000000..41f5f2deb5d6
--- /dev/null
+++ b/drivers/pinctrl/vt8500/pinctrl-wmt.h
@@ -0,0 +1,79 @@
1/*
2 * Pinctrl driver for the Wondermedia SoC's
3 *
4 * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/gpio.h>
17
18/* VT8500 has no enable register in the extgpio bank. */
19#define NO_REG 0xFFFF
20
21#define WMT_PINCTRL_BANK(__en, __dir, __dout, __din, __pen, __pcfg) \
22{ \
23 .reg_en = __en, \
24 .reg_dir = __dir, \
25 .reg_data_out = __dout, \
26 .reg_data_in = __din, \
27 .reg_pull_en = __pen, \
28 .reg_pull_cfg = __pcfg, \
29}
30
31/* Encode/decode the bank/bit pairs into a pin value */
32#define WMT_PIN(__bank, __offset) ((__bank << 5) | __offset)
33#define WMT_BANK_FROM_PIN(__pin) (__pin >> 5)
34#define WMT_BIT_FROM_PIN(__pin) (__pin & 0x1f)
35
36#define WMT_GROUP(__name, __data) \
37{ \
38 .name = __name, \
39 .pins = __data, \
40 .npins = ARRAY_SIZE(__data), \
41}
42
43struct wmt_pinctrl_bank_registers {
44 u32 reg_en;
45 u32 reg_dir;
46 u32 reg_data_out;
47 u32 reg_data_in;
48
49 u32 reg_pull_en;
50 u32 reg_pull_cfg;
51};
52
53struct wmt_pinctrl_group {
54 const char *name;
55 const unsigned int *pins;
56 const unsigned npins;
57};
58
59struct wmt_pinctrl_data {
60 struct device *dev;
61 struct pinctrl_dev *pctl_dev;
62
63 /* must be initialized before calling wmt_pinctrl_probe */
64 void __iomem *base;
65 const struct wmt_pinctrl_bank_registers *banks;
66 const struct pinctrl_pin_desc *pins;
67 const char * const *groups;
68
69 u32 nbanks;
70 u32 npins;
71 u32 ngroups;
72
73 struct gpio_chip gpio_chip;
74 struct pinctrl_gpio_range gpio_range;
75};
76
77int wmt_pinctrl_probe(struct platform_device *pdev,
78 struct wmt_pinctrl_data *data);
79int wmt_pinctrl_remove(struct platform_device *pdev);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 11:14:04 -0500