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-rw-r--r--arch/arm/mach-bcmring/include/mach/entry-macro.S86
-rw-r--r--arch/arm/mach-bcmring/include/mach/io.h56
-rw-r--r--arch/arm/mach-bcmring/include/mach/uncompress.h43
3 files changed, 185 insertions, 0 deletions
diff --git a/arch/arm/mach-bcmring/include/mach/entry-macro.S b/arch/arm/mach-bcmring/include/mach/entry-macro.S
new file mode 100644
index 000000000000..7d393ca010ac
--- /dev/null
+++ b/arch/arm/mach-bcmring/include/mach/entry-macro.S
@@ -0,0 +1,86 @@
1/*****************************************************************************
2* Copyright 2006 - 2008 Broadcom Corporation. All rights reserved.
3*
4* Unless you and Broadcom execute a separate written software license
5* agreement governing use of this software, this software is licensed to you
6* under the terms of the GNU General Public License version 2, available at
7* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
8*
9* Notwithstanding the above, under no circumstances may you combine this
10* software in any way with any other Broadcom software provided under a
11* license other than the GPL, without Broadcom's express prior written
12* consent.
13*****************************************************************************/
14
15/*
16 *
17 * Low-level IRQ helper macros for BCMRing-based platforms
18 *
19 */
20#include <mach/irqs.h>
21#include <mach/hardware.h>
22#include <mach/csp/mm_io.h>
23
24 .macro disable_fiq
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \base, =(MM_IO_BASE_INTC0)
29 ldr \irqstat, [\base, #0] @ get status
30 ldr \irqnr, [\base, #0x10] @ mask with enable register
31 ands \irqstat, \irqstat, \irqnr
32 mov \irqnr, #IRQ_INTC0_START
33 cmp \irqstat, #0
34 bne 1001f
35
36 ldr \base, =(MM_IO_BASE_INTC1)
37 ldr \irqstat, [\base, #0] @ get status
38 ldr \irqnr, [\base, #0x10] @ mask with enable register
39 ands \irqstat, \irqstat, \irqnr
40 mov \irqnr, #IRQ_INTC1_START
41 cmp \irqstat, #0
42 bne 1001f
43
44 ldr \base, =(MM_IO_BASE_SINTC)
45 ldr \irqstat, [\base, #0] @ get status
46 ldr \irqnr, [\base, #0x10] @ mask with enable register
47 ands \irqstat, \irqstat, \irqnr
48 mov \irqnr, #0xffffffff @ code meaning no interrupt bits set
49 cmp \irqstat, #0
50 beq 1002f
51
52 mov \irqnr, #IRQ_SINTC_START @ something is set, so fixup return value
53
541001:
55 movs \tmp, \irqstat, lsl #16
56 movne \irqstat, \tmp
57 addeq \irqnr, \irqnr, #16
58
59 movs \tmp, \irqstat, lsl #8
60 movne \irqstat, \tmp
61 addeq \irqnr, \irqnr, #8
62
63 movs \tmp, \irqstat, lsl #4
64 movne \irqstat, \tmp
65 addeq \irqnr, \irqnr, #4
66
67 movs \tmp, \irqstat, lsl #2
68 movne \irqstat, \tmp
69 addeq \irqnr, \irqnr, #2
70
71 movs \tmp, \irqstat, lsl #1
72 addeq \irqnr, \irqnr, #1
73 orrs \base, \base, #1
74
751002: @ irqnr will be set to 0xffffffff if no irq bits are set
76 .endm
77
78 .macro get_irqnr_preamble, base, tmp
79 .endm
80
81 .macro arch_ret_to_user, tmp1, tmp2
82 .endm
83
84 .macro irq_prio_table
85 .endm
86
diff --git a/arch/arm/mach-bcmring/include/mach/io.h b/arch/arm/mach-bcmring/include/mach/io.h
new file mode 100644
index 000000000000..4db0eff90357
--- /dev/null
+++ b/arch/arm/mach-bcmring/include/mach/io.h
@@ -0,0 +1,56 @@
1/*
2 *
3 * Copyright (C) 1999 ARM Limited
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#ifndef __ASM_ARM_ARCH_IO_H
20#define __ASM_ARM_ARCH_IO_H
21
22#include <mach/hardware.h>
23
24#define IO_SPACE_LIMIT 0xffffffff
25
26#define __io(a) ((void __iomem *)HW_IO_PHYS_TO_VIRT(a))
27
28/* Do not enable mem_pci for a big endian arm architecture or unexpected byteswaps will */
29/* happen in readw/writew etc. */
30
31#define readb(c) __raw_readb(c)
32#define readw(c) __raw_readw(c)
33#define readl(c) __raw_readl(c)
34#define readb_relaxed(addr) readb(addr)
35#define readw_relaxed(addr) readw(addr)
36#define readl_relaxed(addr) readl(addr)
37
38#define readsb(p, d, l) __raw_readsb(p, d, l)
39#define readsw(p, d, l) __raw_readsw(p, d, l)
40#define readsl(p, d, l) __raw_readsl(p, d, l)
41
42#define writeb(v, c) __raw_writeb(v, c)
43#define writew(v, c) __raw_writew(v, c)
44#define writel(v, c) __raw_writel(v, c)
45
46#define writesb(p, d, l) __raw_writesb(p, d, l)
47#define writesw(p, d, l) __raw_writesw(p, d, l)
48#define writesl(p, d, l) __raw_writesl(p, d, l)
49
50#define memset_io(c, v, l) _memset_io((c), (v), (l))
51#define memcpy_fromio(a, c, l) _memcpy_fromio((a), (c), (l))
52#define memcpy_toio(c, a, l) _memcpy_toio((c), (a), (l))
53
54#define eth_io_copy_and_sum(s, c, l, b) eth_copy_and_sum((s), (c), (l), (b))
55
56#endif
diff --git a/arch/arm/mach-bcmring/include/mach/uncompress.h b/arch/arm/mach-bcmring/include/mach/uncompress.h
new file mode 100644
index 000000000000..9c9821b77977
--- /dev/null
+++ b/arch/arm/mach-bcmring/include/mach/uncompress.h
@@ -0,0 +1,43 @@
1/*****************************************************************************
2* Copyright 2005 - 2008 Broadcom Corporation. All rights reserved.
3*
4* Unless you and Broadcom execute a separate written software license
5* agreement governing use of this software, this software is licensed to you
6* under the terms of the GNU General Public License version 2, available at
7* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
8*
9* Notwithstanding the above, under no circumstances may you combine this
10* software in any way with any other Broadcom software provided under a
11* license other than the GPL, without Broadcom's express prior written
12* consent.
13*****************************************************************************/
14#include <mach/csp/mm_addr.h>
15
16#define BCMRING_UART_0_DR (*(volatile unsigned int *)MM_ADDR_IO_UARTA)
17#define BCMRING_UART_0_FR (*(volatile unsigned int *)(MM_ADDR_IO_UARTA + 0x18))
18/*
19 * This does not append a newline
20 */
21static inline void putc(int c)
22{
23 /* Send out UARTA */
24 while (BCMRING_UART_0_FR & (1 << 5))
25 ;
26
27 BCMRING_UART_0_DR = c;
28}
29
30
31static inline void flush(void)
32{
33 /* Wait for the tx fifo to be empty */
34 while ((BCMRING_UART_0_FR & (1 << 7)) == 0)
35 ;
36
37 /* Wait for the final character to be sent on the txd line */
38 while (BCMRING_UART_0_FR & (1 << 3))
39 ;
40}
41
42#define arch_decomp_setup()
43#define arch_decomp_wdog()
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