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-rw-r--r--drivers/irqchip/irq-dw-apb-ictl.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
index c136b67740de..53bb7326a60a 100644
--- a/drivers/irqchip/irq-dw-apb-ictl.c
+++ b/drivers/irqchip/irq-dw-apb-ictl.c
@@ -50,6 +50,21 @@ static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc)
50 chained_irq_exit(chip, desc); 50 chained_irq_exit(chip, desc);
51} 51}
52 52
53#ifdef CONFIG_PM
54static void dw_apb_ictl_resume(struct irq_data *d)
55{
56 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
57 struct irq_chip_type *ct = irq_data_get_chip_type(d);
58
59 irq_gc_lock(gc);
60 writel_relaxed(~0, gc->reg_base + ct->regs.enable);
61 writel_relaxed(*ct->mask_cache, gc->reg_base + ct->regs.mask);
62 irq_gc_unlock(gc);
63}
64#else
65#define dw_apb_ictl_resume NULL
66#endif /* CONFIG_PM */
67
53static int __init dw_apb_ictl_init(struct device_node *np, 68static int __init dw_apb_ictl_init(struct device_node *np,
54 struct device_node *parent) 69 struct device_node *parent)
55{ 70{
@@ -127,13 +142,17 @@ static int __init dw_apb_ictl_init(struct device_node *np,
127 gc->reg_base = iobase; 142 gc->reg_base = iobase;
128 143
129 gc->chip_types[0].regs.mask = APB_INT_MASK_L; 144 gc->chip_types[0].regs.mask = APB_INT_MASK_L;
145 gc->chip_types[0].regs.enable = APB_INT_ENABLE_L;
130 gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit; 146 gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
131 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit; 147 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
148 gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume;
132 149
133 if (nrirqs > 32) { 150 if (nrirqs > 32) {
134 gc->chip_types[1].regs.mask = APB_INT_MASK_H; 151 gc->chip_types[1].regs.mask = APB_INT_MASK_H;
152 gc->chip_types[1].regs.enable = APB_INT_ENABLE_H;
135 gc->chip_types[1].chip.irq_mask = irq_gc_mask_set_bit; 153 gc->chip_types[1].chip.irq_mask = irq_gc_mask_set_bit;
136 gc->chip_types[1].chip.irq_unmask = irq_gc_mask_clr_bit; 154 gc->chip_types[1].chip.irq_unmask = irq_gc_mask_clr_bit;
155 gc->chip_types[1].chip.irq_resume = dw_apb_ictl_resume;
137 } 156 }
138 157
139 irq_set_handler_data(irq, gc); 158 irq_set_handler_data(irq, gc);