diff options
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 4 | ||||
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/p1022si-post.dtsi | 6 | ||||
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 6 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 15 |
4 files changed, 18 insertions, 13 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi index 0bde9ee8afaf..af12ead88c5f 100644 --- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | 41 | ||
| 42 | /* controller at 0x9000 */ | 42 | /* controller at 0x9000 */ |
| 43 | &pci0 { | 43 | &pci0 { |
| 44 | compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; | 44 | compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3"; |
| 45 | device_type = "pci"; | 45 | device_type = "pci"; |
| 46 | #size-cells = <2>; | 46 | #size-cells = <2>; |
| 47 | #address-cells = <3>; | 47 | #address-cells = <3>; |
| @@ -69,7 +69,7 @@ | |||
| 69 | 69 | ||
| 70 | /* controller at 0xa000 */ | 70 | /* controller at 0xa000 */ |
| 71 | &pci1 { | 71 | &pci1 { |
| 72 | compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; | 72 | compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3"; |
| 73 | device_type = "pci"; | 73 | device_type = "pci"; |
| 74 | #size-cells = <2>; | 74 | #size-cells = <2>; |
| 75 | #address-cells = <3>; | 75 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi index 06216b8c0af5..e179803a81ef 100644 --- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi | |||
| @@ -45,7 +45,7 @@ | |||
| 45 | 45 | ||
| 46 | /* controller at 0x9000 */ | 46 | /* controller at 0x9000 */ |
| 47 | &pci0 { | 47 | &pci0 { |
| 48 | compatible = "fsl,p1022-pcie"; | 48 | compatible = "fsl,mpc8548-pcie"; |
| 49 | device_type = "pci"; | 49 | device_type = "pci"; |
| 50 | #size-cells = <2>; | 50 | #size-cells = <2>; |
| 51 | #address-cells = <3>; | 51 | #address-cells = <3>; |
| @@ -73,7 +73,7 @@ | |||
| 73 | 73 | ||
| 74 | /* controller at 0xa000 */ | 74 | /* controller at 0xa000 */ |
| 75 | &pci1 { | 75 | &pci1 { |
| 76 | compatible = "fsl,p1022-pcie"; | 76 | compatible = "fsl,mpc8548-pcie"; |
| 77 | device_type = "pci"; | 77 | device_type = "pci"; |
| 78 | #size-cells = <2>; | 78 | #size-cells = <2>; |
| 79 | #address-cells = <3>; | 79 | #address-cells = <3>; |
| @@ -102,7 +102,7 @@ | |||
| 102 | 102 | ||
| 103 | /* controller at 0xb000 */ | 103 | /* controller at 0xb000 */ |
| 104 | &pci2 { | 104 | &pci2 { |
| 105 | compatible = "fsl,p1022-pcie"; | 105 | compatible = "fsl,mpc8548-pcie"; |
| 106 | device_type = "pci"; | 106 | device_type = "pci"; |
| 107 | #size-cells = <2>; | 107 | #size-cells = <2>; |
| 108 | #address-cells = <3>; | 108 | #address-cells = <3>; |
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi index dc82bcfa2f61..19859ad851eb 100644 --- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | 41 | ||
| 42 | /* controller at 0x200000 */ | 42 | /* controller at 0x200000 */ |
| 43 | &pci0 { | 43 | &pci0 { |
| 44 | compatible = "fsl,p4080-pcie"; | 44 | compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1"; |
| 45 | device_type = "pci"; | 45 | device_type = "pci"; |
| 46 | #size-cells = <2>; | 46 | #size-cells = <2>; |
| 47 | #address-cells = <3>; | 47 | #address-cells = <3>; |
| @@ -70,7 +70,7 @@ | |||
| 70 | 70 | ||
| 71 | /* controller at 0x201000 */ | 71 | /* controller at 0x201000 */ |
| 72 | &pci1 { | 72 | &pci1 { |
| 73 | compatible = "fsl,p4080-pcie"; | 73 | compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1"; |
| 74 | device_type = "pci"; | 74 | device_type = "pci"; |
| 75 | #size-cells = <2>; | 75 | #size-cells = <2>; |
| 76 | #address-cells = <3>; | 76 | #address-cells = <3>; |
| @@ -99,7 +99,7 @@ | |||
| 99 | 99 | ||
| 100 | /* controller at 0x202000 */ | 100 | /* controller at 0x202000 */ |
| 101 | &pci2 { | 101 | &pci2 { |
| 102 | compatible = "fsl,p4080-pcie"; | 102 | compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1"; |
| 103 | device_type = "pci"; | 103 | device_type = "pci"; |
| 104 | #size-cells = <2>; | 104 | #size-cells = <2>; |
| 105 | #address-cells = <3>; | 105 | #address-cells = <3>; |
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 92a5915b1827..f213fb6dabfc 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
| @@ -827,13 +827,18 @@ static const struct of_device_id pci_ids[] = { | |||
| 827 | { .compatible = "fsl,mpc8548-pcie", }, | 827 | { .compatible = "fsl,mpc8548-pcie", }, |
| 828 | { .compatible = "fsl,mpc8610-pci", }, | 828 | { .compatible = "fsl,mpc8610-pci", }, |
| 829 | { .compatible = "fsl,mpc8641-pcie", }, | 829 | { .compatible = "fsl,mpc8641-pcie", }, |
| 830 | { .compatible = "fsl,qoriq-pcie-v2.1", }, | ||
| 831 | { .compatible = "fsl,qoriq-pcie-v2.2", }, | ||
| 832 | { .compatible = "fsl,qoriq-pcie-v2.3", }, | ||
| 833 | { .compatible = "fsl,qoriq-pcie-v2.4", }, | ||
| 834 | |||
| 835 | /* | ||
| 836 | * The following entries are for compatibility with older device | ||
| 837 | * trees. | ||
| 838 | */ | ||
| 830 | { .compatible = "fsl,p1022-pcie", }, | 839 | { .compatible = "fsl,p1022-pcie", }, |
| 831 | { .compatible = "fsl,p1010-pcie", }, | ||
| 832 | { .compatible = "fsl,p1023-pcie", }, | ||
| 833 | { .compatible = "fsl,p4080-pcie", }, | 840 | { .compatible = "fsl,p4080-pcie", }, |
| 834 | { .compatible = "fsl,qoriq-pcie-v2.4", }, | 841 | |
| 835 | { .compatible = "fsl,qoriq-pcie-v2.3", }, | ||
| 836 | { .compatible = "fsl,qoriq-pcie-v2.2", }, | ||
| 837 | {}, | 842 | {}, |
| 838 | }; | 843 | }; |
| 839 | 844 | ||
