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-rw-r--r--arch/arm/mach-mx2/Kconfig7
-rw-r--r--arch/arm/mach-mx2/Makefile1
-rw-r--r--arch/arm/mach-mx2/mxt_td60.c284
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h1
4 files changed, 293 insertions, 0 deletions
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig
index 3e14da3698b5..b96c6a389363 100644
--- a/arch/arm/mach-mx2/Kconfig
+++ b/arch/arm/mach-mx2/Kconfig
@@ -104,4 +104,11 @@ config MACH_PCA100
104 Include support for phyCARD-s (aka pca100) platform. This 104 Include support for phyCARD-s (aka pca100) platform. This
105 includes specific configurations for the module and its peripherals. 105 includes specific configurations for the module and its peripherals.
106 106
107config MACH_MXT_TD60
108 bool "Maxtrack i-MXT TD60"
109 depends on MACH_MX27
110 help
111 Include support for i-MXT (aka td60) platform. This
112 includes specific configurations for the module and its peripherals.
113
107endif 114endif
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile
index 19560f045632..52aca0aaf9b5 100644
--- a/arch/arm/mach-mx2/Makefile
+++ b/arch/arm/mach-mx2/Makefile
@@ -20,4 +20,5 @@ obj-$(CONFIG_MACH_MX27LITE) += mx27lite.o
20obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o 20obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27.o
21obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o 21obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
22obj-$(CONFIG_MACH_PCA100) += pca100.o 22obj-$(CONFIG_MACH_PCA100) += pca100.o
23obj-$(CONFIG_MACH_MXT_TD60) += mxt_td60.o
23 24
diff --git a/arch/arm/mach-mx2/mxt_td60.c b/arch/arm/mach-mx2/mxt_td60.c
new file mode 100644
index 000000000000..dd251f578e20
--- /dev/null
+++ b/arch/arm/mach-mx2/mxt_td60.c
@@ -0,0 +1,284 @@
1/*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/platform_device.h>
22#include <linux/mtd/mtd.h>
23#include <linux/mtd/map.h>
24#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h>
26#include <linux/i2c.h>
27#include <linux/irq.h>
28#include <mach/common.h>
29#include <mach/hardware.h>
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32#include <asm/mach/time.h>
33#include <asm/mach/map.h>
34#include <linux/gpio.h>
35#include <mach/imx-uart.h>
36#include <mach/iomux.h>
37#include <mach/mxc_nand.h>
38#include <mach/i2c.h>
39#include <mach/imxfb.h>
40#include <mach/mmc.h>
41
42#include "devices.h"
43
44static unsigned int mxt_td60_pins[] __initdata = {
45 /* UART0 */
46 PE12_PF_UART1_TXD,
47 PE13_PF_UART1_RXD,
48 PE14_PF_UART1_CTS,
49 PE15_PF_UART1_RTS,
50 /* UART1 */
51 PE3_PF_UART2_CTS,
52 PE4_PF_UART2_RTS,
53 PE6_PF_UART2_TXD,
54 PE7_PF_UART2_RXD,
55 /* UART2 */
56 PE8_PF_UART3_TXD,
57 PE9_PF_UART3_RXD,
58 PE10_PF_UART3_CTS,
59 PE11_PF_UART3_RTS,
60 /* UART3 */
61 PB26_AF_UART4_RTS,
62 PB28_AF_UART4_TXD,
63 PB29_AF_UART4_CTS,
64 PB31_AF_UART4_RXD,
65 /* UART4 */
66 PB18_AF_UART5_TXD,
67 PB19_AF_UART5_RXD,
68 PB20_AF_UART5_CTS,
69 PB21_AF_UART5_RTS,
70 /* UART5 */
71 PB10_AF_UART6_TXD,
72 PB12_AF_UART6_CTS,
73 PB11_AF_UART6_RXD,
74 PB13_AF_UART6_RTS,
75 /* FEC */
76 PD0_AIN_FEC_TXD0,
77 PD1_AIN_FEC_TXD1,
78 PD2_AIN_FEC_TXD2,
79 PD3_AIN_FEC_TXD3,
80 PD4_AOUT_FEC_RX_ER,
81 PD5_AOUT_FEC_RXD1,
82 PD6_AOUT_FEC_RXD2,
83 PD7_AOUT_FEC_RXD3,
84 PD8_AF_FEC_MDIO,
85 PD9_AIN_FEC_MDC,
86 PD10_AOUT_FEC_CRS,
87 PD11_AOUT_FEC_TX_CLK,
88 PD12_AOUT_FEC_RXD0,
89 PD13_AOUT_FEC_RX_DV,
90 PD14_AOUT_FEC_RX_CLK,
91 PD15_AOUT_FEC_COL,
92 PD16_AIN_FEC_TX_ER,
93 PF23_AIN_FEC_TX_EN,
94 /* I2C1 */
95 PD17_PF_I2C_DATA,
96 PD18_PF_I2C_CLK,
97 /* I2C2 */
98 PC5_PF_I2C2_SDA,
99 PC6_PF_I2C2_SCL,
100 /* FB */
101 PA5_PF_LSCLK,
102 PA6_PF_LD0,
103 PA7_PF_LD1,
104 PA8_PF_LD2,
105 PA9_PF_LD3,
106 PA10_PF_LD4,
107 PA11_PF_LD5,
108 PA12_PF_LD6,
109 PA13_PF_LD7,
110 PA14_PF_LD8,
111 PA15_PF_LD9,
112 PA16_PF_LD10,
113 PA17_PF_LD11,
114 PA18_PF_LD12,
115 PA19_PF_LD13,
116 PA20_PF_LD14,
117 PA21_PF_LD15,
118 PA22_PF_LD16,
119 PA23_PF_LD17,
120 PA25_PF_CLS,
121 PA27_PF_SPL_SPR,
122 PA28_PF_HSYNC,
123 PA29_PF_VSYNC,
124 PA30_PF_CONTRAST,
125 PA31_PF_OE_ACD,
126 /* OWIRE */
127 PE16_AF_OWIRE,
128 /* SDHC1*/
129 PE18_PF_SD1_D0,
130 PE19_PF_SD1_D1,
131 PE20_PF_SD1_D2,
132 PE21_PF_SD1_D3,
133 PE22_PF_SD1_CMD,
134 PE23_PF_SD1_CLK,
135 /* SDHC2*/
136 PB4_PF_SD2_D0,
137 PB5_PF_SD2_D1,
138 PB6_PF_SD2_D2,
139 PB7_PF_SD2_D3,
140 PB8_PF_SD2_CMD,
141 PB9_PF_SD2_CLK,
142};
143
144static struct mxc_nand_platform_data mxt_td60_nand_board_info = {
145 .width = 1,
146 .hw_ecc = 1,
147};
148
149static struct imxi2c_platform_data mxt_td60_i2c_data = {
150 .bitrate = 100000,
151};
152
153static struct i2c_board_info mxt_td60_i2c_devices[] = {
154};
155
156static struct imxi2c_platform_data mxt_td60_i2c2_data = {
157 .bitrate = 100000,
158};
159
160static struct i2c_board_info mxt_td60_i2c2_devices[] = {
161};
162
163static struct imx_fb_videomode mxt_td60_modes[] = {
164 {
165 .mode = {
166 .name = "Chimei LW700AT9003",
167 .refresh = 60,
168 .xres = 800,
169 .yres = 480,
170 .pixclock = 30303,
171 .hsync_len = 64,
172 .left_margin = 0x67,
173 .right_margin = 0x68,
174 .vsync_len = 16,
175 .upper_margin = 0x0f,
176 .lower_margin = 0x0f,
177 },
178 .bpp = 16,
179 .pcr = 0xFA208B83,
180 },
181};
182
183static struct imx_fb_platform_data mxt_td60_fb_data = {
184 .mode = mxt_td60_modes,
185 .num_modes = ARRAY_SIZE(mxt_td60_modes),
186
187 /*
188 * - HSYNC active high
189 * - VSYNC active high
190 * - clk notenabled while idle
191 * - clock inverted
192 * - data not inverted
193 * - data enable low active
194 * - enable sharp mode
195 */
196 .pwmr = 0x00A903FF,
197 .lscr1 = 0x00120300,
198 .dmacr = 0x00020010,
199};
200
201static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
202 void *data)
203{
204 return request_irq(IRQ_GPIOE(21), detect_irq, IRQF_TRIGGER_RISING,
205 "sdhc1-card-detect", data);
206}
207
208static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
209{
210 free_irq(IRQ_GPIOE(21), data);
211}
212
213static struct imxmmc_platform_data sdhc1_pdata = {
214 .init = mxt_td60_sdhc1_init,
215 .exit = mxt_td60_sdhc1_exit,
216};
217
218static struct platform_device *platform_devices[] __initdata = {
219 &mxc_fec_device,
220};
221
222static struct imxuart_platform_data uart_pdata[] = {
223 {
224 .flags = IMXUART_HAVE_RTSCTS,
225 }, {
226 .flags = IMXUART_HAVE_RTSCTS,
227 }, {
228 .flags = IMXUART_HAVE_RTSCTS,
229 }, {
230 .flags = IMXUART_HAVE_RTSCTS,
231 }, {
232 .flags = IMXUART_HAVE_RTSCTS,
233 }, {
234 .flags = IMXUART_HAVE_RTSCTS,
235 },
236};
237
238static void __init mxt_td60_board_init(void)
239{
240 mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
241 "MXT_TD60");
242
243 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
244 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
245 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
246 mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
247 mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
248 mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
249 mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info);
250
251 i2c_register_board_info(0, mxt_td60_i2c_devices,
252 ARRAY_SIZE(mxt_td60_i2c_devices));
253
254 i2c_register_board_info(1, mxt_td60_i2c2_devices,
255 ARRAY_SIZE(mxt_td60_i2c2_devices));
256
257 mxc_register_device(&mxc_i2c_device0, &mxt_td60_i2c_data);
258 mxc_register_device(&mxc_i2c_device1, &mxt_td60_i2c2_data);
259 mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data);
260 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
261
262 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
263}
264
265static void __init mxt_td60_timer_init(void)
266{
267 mx27_clocks_init(26000000);
268}
269
270static struct sys_timer mxt_td60_timer = {
271 .init = mxt_td60_timer_init,
272};
273
274MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
275 /* maintainer: Maxtrack Industrial */
276 .phys_io = AIPI_BASE_ADDR,
277 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
278 .boot_params = PHYS_OFFSET + 0x100,
279 .map_io = mx27_map_io,
280 .init_irq = mx27_init_irq,
281 .init_machine = mxt_td60_board_init,
282 .timer = &mxt_td60_timer,
283MACHINE_END
284
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index a41bf57fb3de..4d5d395ad63b 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -84,6 +84,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
84 case MACH_TYPE_PCM038: 84 case MACH_TYPE_PCM038:
85 case MACH_TYPE_MX21ADS: 85 case MACH_TYPE_MX21ADS:
86 case MACH_TYPE_PCA100: 86 case MACH_TYPE_PCA100:
87 case MACH_TYPE_MXT_TD60:
87 uart_base = MX2X_UART1_BASE_ADDR; 88 uart_base = MX2X_UART1_BASE_ADDR;
88 break; 89 break;
89 case MACH_TYPE_MX31LITE: 90 case MACH_TYPE_MX31LITE: