diff options
-rw-r--r-- | arch/mips/include/asm/mipsregs.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 73447951204d..c7554f057366 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h | |||
@@ -120,10 +120,6 @@ | |||
120 | /* | 120 | /* |
121 | * FPU Status Register Values | 121 | * FPU Status Register Values |
122 | */ | 122 | */ |
123 | /* | ||
124 | * Status Register Values | ||
125 | */ | ||
126 | |||
127 | #define FPU_CSR_FLUSH 0x01000000 /* flush denormalised results to 0 */ | 123 | #define FPU_CSR_FLUSH 0x01000000 /* flush denormalised results to 0 */ |
128 | #define FPU_CSR_COND 0x00800000 /* $fcc0 */ | 124 | #define FPU_CSR_COND 0x00800000 /* $fcc0 */ |
129 | #define FPU_CSR_COND0 0x00800000 /* $fcc0 */ | 125 | #define FPU_CSR_COND0 0x00800000 /* $fcc0 */ |
@@ -425,8 +421,6 @@ | |||
425 | 421 | ||
426 | /* | 422 | /* |
427 | * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2) | 423 | * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2) |
428 | * | ||
429 | * Refer to your MIPS R4xx0 manual, chapter 5 for explanation. | ||
430 | */ | 424 | */ |
431 | #define INTCTLB_IPFDC 23 | 425 | #define INTCTLB_IPFDC 23 |
432 | #define INTCTLF_IPFDC (_ULCAST_(7) << INTCTLB_IPFDC) | 426 | #define INTCTLF_IPFDC (_ULCAST_(7) << INTCTLB_IPFDC) |