3 files changed, 24 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 6de7d702c323..e053db932c0d 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -257,6 +257,14 @@
                         clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
                         clock-output-names = "ir0";
                 };
+
+                mbus_clk: clk@01c2015c {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-mod0-clk";
+                        reg = <0x01c2015c 0x4>;
+                        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
+                        clock-output-names = "mbus";
+                };
         };
 
         soc@01c00000 {
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index c46ac6598854..227be94f0b9b 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -258,6 +258,14 @@
                         clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
                         clock-output-names = "ir0";
                 };
+
+                mbus_clk: clk@01c2015c {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-mod0-clk";
+                        reg = <0x01c2015c 0x4>;
+                        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
+                        clock-output-names = "mbus";
+                };
         };
 
         soc@01c00000 {
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index bc999539ab03..ee6819605050 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -290,6 +290,14 @@
                         clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
                         clock-output-names = "spi3";
                 };
+
+                mbus_clk: clk@01c2015c {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-mod0-clk";
+                        reg = <0x01c2015c 0x4>;
+                        clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
+                        clock-output-names = "mbus";
+                };
         };
 
         soc@01c00000 {