6 files changed, 184 insertions, 27 deletions

diff --git a/Documentation/devicetree/bindings/open-pic.txt b/Documentation/devicetree/bindings/open-pic.txt
new file mode 100644
index 000000000000..909a902dff85
--- /dev/null
+++ b/Documentation/devicetree/bindings/open-pic.txt
@@ -0,0 +1,98 @@
+* Open PIC Binding
+
+This binding specifies what properties must be available in the device tree
+representation of an Open PIC compliant interrupt controller.  This binding is
+based on the binding defined for Open PIC in [1] and is a superset of that
+binding.
+
+Required properties:
+
+  NOTE: Many of these descriptions were paraphrased here from [1] to aid
+        readability.
+
+    - compatible: Specifies the compatibility list for the PIC.  The type
+      shall be <string> and the value shall include "open-pic".
+
+    - reg: Specifies the base physical address(s) and size(s) of this
+      PIC's addressable register space.  The type shall be <prop-encoded-array>.
+
+    - interrupt-controller: The presence of this property identifies the node
+      as an Open PIC.  No property value shall be defined.
+
+    - #interrupt-cells: Specifies the number of cells needed to encode an
+      interrupt source.  The type shall be a <u32> and the value shall be 2.
+
+    - #address-cells: Specifies the number of cells needed to encode an
+      address.  The type shall be <u32> and the value shall be 0.  As such,
+      'interrupt-map' nodes do not have to specify a parent unit address.
+
+Optional properties:
+
+    - pic-no-reset: The presence of this property indicates that the PIC
+      shall not be reset during runtime initialization.  No property value shall
+      be defined.  The presence of this property also mandates that any
+      initialization related to interrupt sources shall be limited to sources
+      explicitly referenced in the device tree.
+
+* Interrupt Specifier Definition
+
+  Interrupt specifiers consists of 2 cells encoded as
+  follows:
+
+    - <1st-cell>: The interrupt-number that identifies the interrupt source.
+
+    - <2nd-cell>: The level-sense information, encoded as follows:
+                    0 = low-to-high edge triggered
+                    1 = active low level-sensitive
+                    2 = active high level-sensitive
+                    3 = high-to-low edge triggered
+
+* Examples
+
+Example 1:
+
+        /*
+         * An Open PIC interrupt controller
+         */
+        mpic: pic@40000 {
+                // This is an interrupt controller node.
+                interrupt-controller;
+
+                // No address cells so that 'interrupt-map' nodes which reference
+                // this Open PIC node do not need a parent address specifier.
+                #address-cells = <0>;
+
+                // Two cells to encode interrupt sources.
+                #interrupt-cells = <2>;
+
+                // Offset address of 0x40000 and size of 0x40000.
+                reg = <0x40000 0x40000>;
+
+                // Compatible with Open PIC.
+                compatible = "open-pic";
+
+                // The PIC shall not be reset.
+                pic-no-reset;
+        };
+
+Example 2:
+
+        /*
+         * An interrupt generating device that is wired to an Open PIC.
+         */
+        serial0: serial@4500 {
+                // Interrupt source '42' that is active high level-sensitive.
+                // Note that there are only two cells as specified in the interrupt
+                // parent's '#interrupt-cells' property.
+                interrupts = <42 2>;
+
+                // The interrupt controller that this device is wired to.
+                interrupt-parent = <&mpic>;
+        };
+
+* References
+
+[1] Power.org (TM) Standard for Embedded Power Architecture (TM) Platform
+    Requirements (ePAPR), Version 1.0, July 2008.
+    (http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf)
+
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 946ec4947da2..7005ee0b074d 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -367,6 +367,10 @@ struct mpic
 #define MPIC_SINGLE_DEST_CPU            0x00001000
 /* Enable CoreInt delivery of interrupts */
 #define MPIC_ENABLE_COREINT             0x00002000
+/* Disable resetting of the MPIC.
+ * NOTE: This flag trumps MPIC_WANTS_RESET.
+ */
+#define MPIC_NO_RESET                   0x00004000
 
 /* MPIC HW modification ID */
 #define MPIC_REGSET_MASK                0xf0000000
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index 0175a676b34b..48223f9b8728 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -125,8 +125,10 @@ extern int ptrace_put_reg(struct task_struct *task, int regno,
 #endif /* ! __powerpc64__ */
 #define TRAP(regs)              ((regs)->trap & ~0xF)
 #ifdef __powerpc64__
+#define NV_REG_POISON           0xdeadbeefdeadbeefUL
 #define CHECK_FULL_REGS(regs)   BUG_ON(regs->trap & 1)
 #else
+#define NV_REG_POISON           0xdeadbeef
 #define CHECK_FULL_REGS(regs)                                                 \
 do {                                                                          \
         if ((regs)->trap & 1)                                                 \
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index 29852688ceaa..d225d99fe39d 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -176,11 +176,14 @@ static void *is_devfn_node(struct device_node *dn, void *data)
  */
 struct device_node *fetch_dev_dn(struct pci_dev *dev)
 {
-        struct device_node *orig_dn = dev->dev.of_node;
+        struct pci_controller *phb = dev->sysdata;
         struct device_node *dn;
         unsigned long searchval = (dev->bus->number << 8) | dev->devfn;
 
-        dn = traverse_pci_devices(orig_dn, is_devfn_node, (void *)searchval);
+        if (WARN_ON(!phb))
+                return NULL;
+
+        dn = traverse_pci_devices(phb->dn, is_devfn_node, (void *)searchval);
         if (dn)
                 dev->dev.of_node = dn;
         return dn;
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 906536998291..895b082f1e48 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -229,12 +229,16 @@ static int gpr_get(struct task_struct *target, const struct user_regset *regset,
                    unsigned int pos, unsigned int count,
                    void *kbuf, void __user *ubuf)
 {
-        int ret;
+        int i, ret;
 
         if (target->thread.regs == NULL)
                 return -EIO;
 
-        CHECK_FULL_REGS(target->thread.regs);
+        if (!FULL_REGS(target->thread.regs)) {
+                /* We have a partial register set.  Fill 14-31 with bogus values */
+                for (i = 14; i < 32; i++)
+                        target->thread.regs->gpr[i] = NV_REG_POISON;
+        }
 
         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
                                   target->thread.regs,
@@ -641,11 +645,16 @@ static int gpr32_get(struct task_struct *target,
         compat_ulong_t *k = kbuf;