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-rw-r--r--arch/arm/mach-shmobile/setup-rcar-gen2.c21
1 files changed, 16 insertions, 5 deletions
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 5734c24bf6c7..b6275ab6085c 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -78,12 +78,23 @@ void __init rcar_gen2_timer_init(void)
78 /* Remap "armgcnt address map" space */ 78 /* Remap "armgcnt address map" space */
79 base = ioremap(0xe6080000, PAGE_SIZE); 79 base = ioremap(0xe6080000, PAGE_SIZE);
80 80
81 /* Update registers with correct frequency */ 81 /*
82 iowrite32(freq, base + CNTFID0); 82 * Update the timer if it is either not running, or is not at the
83 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); 83 * right frequency. The timer is only configurable in secure mode
84 * so this avoids an abort if the loader started the timer and
85 * entered the kernel in non-secure mode.
86 */
87
88 if ((ioread32(base + CNTCR) & 1) == 0 ||
89 ioread32(base + CNTFID0) != freq) {
90 /* Update registers with correct frequency */
91 iowrite32(freq, base + CNTFID0);
92 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
93
94 /* make sure arch timer is started by setting bit 0 of CNTCR */
95 iowrite32(1, base + CNTCR);
96 }
84 97
85 /* make sure arch timer is started by setting bit 0 of CNTCR */
86 iowrite32(1, base + CNTCR);
87 iounmap(base); 98 iounmap(base);
88#endif /* CONFIG_ARM_ARCH_TIMER */ 99#endif /* CONFIG_ARM_ARCH_TIMER */
89 100