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-rw-r--r--arch/arm/mach-pxa/tosa.c6
-rw-r--r--drivers/gpio/Kconfig3
-rw-r--r--drivers/gpio/Makefile3
-rw-r--r--drivers/gpio/gpio-mpc8xxx.c1
-rw-r--r--drivers/gpio/gpio-mxs.c31
-rw-r--r--drivers/gpio/gpio-pca953x.c380
-rw-r--r--drivers/gpio/gpio-pl061.c2
-rw-r--r--drivers/gpio/gpio-pxa.c7
-rw-r--r--drivers/gpio/gpio-twl4030.c176
-rw-r--r--drivers/gpio/gpio-vt8500.c4
-rw-r--r--drivers/gpio/gpiolib-acpi.c87
-rw-r--r--drivers/gpio/gpiolib.c63
-rw-r--r--include/asm-generic/gpio.h81
-rw-r--r--include/linux/acpi_gpio.h4
-rw-r--r--include/linux/gpio.h28
15 files changed, 512 insertions, 364 deletions
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 233629edf7ee..4f35b333de44 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -927,8 +927,6 @@ static void tosa_restart(char mode, const char *cmd)
927 927
928static void __init tosa_init(void) 928static void __init tosa_init(void)
929{ 929{
930 int dummy;
931
932 pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config)); 930 pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config));
933 931
934 pxa_set_ffuart_info(NULL); 932 pxa_set_ffuart_info(NULL);
@@ -947,10 +945,6 @@ static void __init tosa_init(void)
947 /* enable batt_fault */ 945 /* enable batt_fault */
948 PMCR = 0x01; 946 PMCR = 0x01;
949 947
950 dummy = gpiochip_reserve(TOSA_SCOOP_GPIO_BASE, 12);
951 dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12);
952 dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
953
954 pxa_set_mci_info(&tosa_mci_platform_data); 948 pxa_set_mci_info(&tosa_mci_platform_data);
955 pxa_set_ficp_info(&tosa_ficp_platform_data); 949 pxa_set_ficp_info(&tosa_ficp_platform_data);
956 pxa_set_i2c_info(NULL); 950 pxa_set_i2c_info(NULL);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 3a6714539201..ab97eb805379 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -30,6 +30,9 @@ config ARCH_REQUIRE_GPIOLIB
30 Selecting this from the architecture code will cause the gpiolib 30 Selecting this from the architecture code will cause the gpiolib
31 code to always get built in. 31 code to always get built in.
32 32
33config GPIO_DEVRES
34 def_bool y
35 depends on HAS_IOMEM
33 36
34 37
35menuconfig GPIOLIB 38menuconfig GPIOLIB
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 519daaf57daf..4398034db4aa 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -2,7 +2,8 @@
2 2
3ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG 3ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
4 4
5obj-$(CONFIG_GPIOLIB) += gpiolib.o devres.o 5obj-$(CONFIG_GPIO_DEVRES) += devres.o
6obj-$(CONFIG_GPIOLIB) += gpiolib.o
6obj-$(CONFIG_OF_GPIO) += gpiolib-of.o 7obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
7obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o 8obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
8 9
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 9ae29cc0d17f..a0b33a216d4a 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -292,7 +292,6 @@ static int mpc8xxx_gpio_irq_map(struct irq_domain *h, unsigned int virq,
292 292
293 irq_set_chip_data(virq, h->host_data); 293 irq_set_chip_data(virq, h->host_data);
294 irq_set_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq); 294 irq_set_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq);
295 irq_set_irq_type(virq, IRQ_TYPE_NONE);
296 295
297 return 0; 296 return 0;
298} 297}
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index fa2a63cad32e..859b6fabc7bc 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -65,6 +65,7 @@ struct mxs_gpio_port {
65 struct irq_domain *domain; 65 struct irq_domain *domain;
66 struct bgpio_chip bgc; 66 struct bgpio_chip bgc;
67 enum mxs_gpio_id devid; 67 enum mxs_gpio_id devid;
68 u32 both_edges;
68}; 69};
69 70
70static inline int is_imx23_gpio(struct mxs_gpio_port *port) 71static inline int is_imx23_gpio(struct mxs_gpio_port *port)
@@ -81,13 +82,23 @@ static inline int is_imx28_gpio(struct mxs_gpio_port *port)
81 82
82static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) 83static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
83{ 84{
85 u32 val;
84 u32 pin_mask = 1 << d->hwirq; 86 u32 pin_mask = 1 << d->hwirq;
85 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 87 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
86 struct mxs_gpio_port *port = gc->private; 88 struct mxs_gpio_port *port = gc->private;
87 void __iomem *pin_addr; 89 void __iomem *pin_addr;
88 int edge; 90 int edge;
89 91
92 port->both_edges &= ~pin_mask;
90 switch (type) { 93 switch (type) {
94 case IRQ_TYPE_EDGE_BOTH:
95 val = gpio_get_value(port->bgc.gc.base + d->hwirq);
96 if (val)
97 edge = GPIO_INT_FALL_EDGE;
98 else
99 edge = GPIO_INT_RISE_EDGE;
100 port->both_edges |= pin_mask;
101 break;
91 case IRQ_TYPE_EDGE_RISING: 102 case IRQ_TYPE_EDGE_RISING:
92 edge = GPIO_INT_RISE_EDGE; 103 edge = GPIO_INT_RISE_EDGE;
93 break; 104 break;
@@ -124,6 +135,23 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
124 return 0; 135 return 0;
125} 136}
126 137
138static void mxs_flip_edge(struct mxs_gpio_port *port, u32 gpio)
139{
140 u32 bit, val, edge;
141 void __iomem *pin_addr;
142
143 bit = 1 << gpio;
144
145 pin_addr = port->base + PINCTRL_IRQPOL(port);
146 val = readl(pin_addr);
147 edge = val & bit;
148
149 if (edge)
150 writel(bit, pin_addr + MXS_CLR);
151 else
152 writel(bit, pin_addr + MXS_SET);
153}
154
127/* MXS has one interrupt *per* gpio port */ 155/* MXS has one interrupt *per* gpio port */
128static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) 156static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
129{ 157{
@@ -137,6 +165,9 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
137 165
138 while (irq_stat != 0) { 166 while (irq_stat != 0) {
139 int irqoffset = fls(irq_stat) - 1; 167 int irqoffset = fls(irq_stat) - 1;
168 if (port->both_edges & (1 << irqoffset))
169 mxs_flip_edge(port, irqoffset);
170
140 generic_handle_irq(irq_find_mapping(port->domain, irqoffset)); 171 generic_handle_irq(irq_find_mapping(port->domain, irqoffset));
141 irq_stat &= ~(1 << irqoffset); 172 irq_stat &= ~(1 << irqoffset);
142 } 173 }
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index cc102d25ee24..24059462c87f 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -46,6 +46,7 @@
46#define PCA957X_TYPE 0x2000 46#define PCA957X_TYPE 0x2000
47 47
48static const struct i2c_device_id pca953x_id[] = { 48static const struct i2c_device_id pca953x_id[] = {
49 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
49 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 50 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
50 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 51 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
51 { "pca9536", 4 | PCA953X_TYPE, }, 52 { "pca9536", 4 | PCA953X_TYPE, },
@@ -71,19 +72,23 @@ static const struct i2c_device_id pca953x_id[] = {
71}; 72};
72MODULE_DEVICE_TABLE(i2c, pca953x_id); 73MODULE_DEVICE_TABLE(i2c, pca953x_id);
73 74
75#define MAX_BANK 5
76#define BANK_SZ 8
77
78#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
79
74struct pca953x_chip { 80struct pca953x_chip {
75 unsigned gpio_start; 81 unsigned gpio_start;
76 u32 reg_output; 82 u8 reg_output[MAX_BANK];
77 u32 reg_direction; 83 u8 reg_direction[MAX_BANK];
78 struct mutex i2c_lock; 84 struct mutex i2c_lock;
79 85
80#ifdef CONFIG_GPIO_PCA953X_IRQ 86#ifdef CONFIG_GPIO_PCA953X_IRQ
81 struct mutex irq_lock; 87 struct mutex irq_lock;
82 u32 irq_mask; 88 u8 irq_mask[MAX_BANK];
83 u32 irq_stat; 89 u8 irq_stat[MAX_BANK];
84 u32 irq_trig_raise; 90 u8 irq_trig_raise[MAX_BANK];
85 u32 irq_trig_fall; 91 u8 irq_trig_fall[MAX_BANK];
86 int irq_base;
87 struct irq_domain *domain; 92 struct irq_domain *domain;
88#endif 93#endif
89 94
@@ -93,33 +98,69 @@ struct pca953x_chip {
93 int chip_type; 98 int chip_type;
94}; 99};
95 100
96static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val) 101static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
102 int off)
103{
104 int ret;
105 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
106 int offset = off / BANK_SZ;
107
108 ret = i2c_smbus_read_byte_data(chip->client,
109 (reg << bank_shift) + offset);
110 *val = ret;
111
112 if (ret < 0) {
113 dev_err(&chip->client->dev, "failed reading register\n");
114 return ret;
115 }
116
117 return 0;
118}
119
120static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
121 int off)
122{
123 int ret = 0;
124 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
125 int offset = off / BANK_SZ;
126
127 ret = i2c_smbus_write_byte_data(chip->client,
128 (reg << bank_shift) + offset, val);
129
130 if (ret < 0) {
131 dev_err(&chip->client->dev, "failed writing register\n");
132 return ret;
133 }
134
135 return 0;
136}
137
138static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
97{ 139{
98 int ret = 0; 140 int ret = 0;
99 141
100 if (chip->gpio_chip.ngpio <= 8) 142 if (chip->gpio_chip.ngpio <= 8)
101 ret = i2c_smbus_write_byte_data(chip->client, reg, val); 143 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
102 else if (chip->gpio_chip.ngpio == 24) { 144 else if (chip->gpio_chip.ngpio >= 24) {
103 cpu_to_le32s(&val); 145 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
104 ret = i2c_smbus_write_i2c_block_data(chip->client, 146 ret = i2c_smbus_write_i2c_block_data(chip->client,
105 (reg << 2) | REG_ADDR_AI, 147 (reg << bank_shift) | REG_ADDR_AI,
106 3, 148 NBANK(chip), val);
107 (u8 *) &val);
108 } 149 }
109 else { 150 else {
110 switch (chip->chip_type) { 151 switch (chip->chip_type) {
111 case PCA953X_TYPE: 152 case PCA953X_TYPE:
112 ret = i2c_smbus_write_word_data(chip->client, 153 ret = i2c_smbus_write_word_data(chip->client,
113 reg << 1, val); 154 reg << 1, (u16) *val);
114 break; 155 break;
115 case PCA957X_TYPE: 156 case PCA957X_TYPE:
116 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, 157 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
117 val & 0xff); 158 val[0]);
118 if (ret < 0) 159 if (ret < 0)
119 break; 160 break;
120 ret = i2c_smbus_write_byte_data(chip->client, 161 ret = i2c_smbus_write_byte_data(chip->client,
121 (reg << 1) + 1, 162 (reg << 1) + 1,
122 (val & 0xff00) >> 8); 163 val[1]);
123 break; 164 break;
124 } 165 }
125 } 166 }
@@ -132,26 +173,24 @@ static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val)
132 return 0; 173 return 0;
133} 174}
134 175
135static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val) 176static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
136{ 177{
137 int ret; 178 int ret;
138 179
139 if (chip->gpio_chip.ngpio <= 8) { 180 if (chip->gpio_chip.ngpio <= 8) {
140 ret = i2c_smbus_read_byte_data(chip->client, reg); 181 ret = i2c_smbus_read_byte_data(chip->client, reg);
141 *val = ret; 182 *val = ret;
142 } 183 } else if (chip->gpio_chip.ngpio >= 24) {
143 else if (chip->gpio_chip.ngpio == 24) { 184 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
144 *val = 0; 185
145 ret = i2c_smbus_read_i2c_block_data(chip->client, 186 ret = i2c_smbus_read_i2c_block_data(chip->client,
146 (reg << 2) | REG_ADDR_AI, 187 (reg << bank_shift) | REG_ADDR_AI,
147 3, 188 NBANK(chip), val);
148 (u8 *) val);
149 le32_to_cpus(val);
150 } else { 189 } else {
151 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 190 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
152 *val = ret; 191 val[0] = (u16)ret & 0xFF;
192 val[1] = (u16)ret >> 8;
153 } 193 }
154
155 if (ret < 0) { 194 if (ret < 0) {
156 dev_err(&chip->client->dev, "failed reading register\n"); 195 dev_err(&chip->client->dev, "failed reading register\n");
157 return ret; 196 return ret;
@@ -163,13 +202,13 @@ static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val)
163static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 202static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
164{ 203{
165 struct pca953x_chip *chip; 204 struct pca953x_chip *chip;
166 uint reg_val; 205 u8 reg_val;
167 int ret, offset = 0; 206 int ret, offset = 0;
168 207
169 chip = container_of(gc, struct pca953x_chip, gpio_chip); 208 chip = container_of(gc, struct pca953x_chip, gpio_chip);
170 209
171 mutex_lock(&chip->i2c_lock); 210 mutex_lock(&chip->i2c_lock);
172 reg_val = chip->reg_direction | (1u << off); 211 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
173 212
174 switch (chip->chip_type) { 213 switch (chip->chip_type) {
175 case PCA953X_TYPE: 214 case PCA953X_TYPE:
@@ -179,11 +218,11 @@ static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
179 offset = PCA957X_CFG; 218 offset = PCA957X_CFG;
180 break; 219 break;
181 } 220 }
182 ret = pca953x_write_reg(chip, offset, reg_val); 221 ret = pca953x_write_single(chip, offset, reg_val, off);
183 if (ret) 222 if (ret)
184 goto exit; 223 goto exit;
185 224
186 chip->reg_direction = reg_val; 225 chip->reg_direction[off / BANK_SZ] = reg_val;
187 ret = 0; 226 ret = 0;
188exit: 227exit:
189 mutex_unlock(&chip->i2c_lock); 228 mutex_unlock(&chip->i2c_lock);
@@ -194,7 +233,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,
194 unsigned off, int val) 233 unsigned off, int val)
195{ 234{
196 struct pca953x_chip *chip; 235 struct pca953x_chip *chip;
197 uint reg_val; 236 u8 reg_val;
198 int ret, offset = 0; 237 int ret, offset = 0;
199 238
200 chip = container_of(gc, struct pca953x_chip, gpio_chip); 239 chip = container_of(gc, struct pca953x_chip, gpio_chip);
@@ -202,9 +241,11 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,
202 mutex_lock(&chip->i2c_lock); 241 mutex_lock(&chip->i2c_lock);
203 /* set output level */ 242 /* set output level */
204 if (val) 243 if (val)
205 reg_val = chip->reg_output | (1u << off); 244 reg_val = chip->reg_output[off / BANK_SZ]
245 | (1u << (off % BANK_SZ));
206 else 246 else
207 reg_val = chip->reg_output & ~(1u << off); 247 reg_val = chip->reg_output[off / BANK_SZ]
248 & ~(1u << (off % BANK_SZ));
208 249
209 switch (chip->chip_type) { 250 switch (chip->chip_type) {
210 case PCA953X_TYPE: 251 case PCA953X_TYPE:
@@ -214,14 +255,14 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,
214 offset = PCA957X_OUT; 255 offset = PCA957X_OUT;
215 break; 256 break;
216 } 257 }
217 ret = pca953x_write_reg(chip, offset, reg_val); 258 ret = pca953x_write_single(chip, offset, reg_val, off);
218 if (ret) 259 if (ret)
219 goto exit; 260 goto exit;
220 261
221 chip->reg_output = reg_val; 262 chip->reg_output[off / BANK_SZ] = reg_val;
222 263
223 /* then direction */ 264 /* then direction */
224 reg_val = chip->reg_direction & ~(1u << off); 265 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
225 switch (chip->chip_type) { 266 switch (chip->chip_type) {
226 case PCA953X_TYPE: 267 case PCA953X_TYPE:
227 offset = PCA953X_DIRECTION; 268 offset = PCA953X_DIRECTION;
@@ -230,11 +271,11 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,
230 offset = PCA957X_CFG; 271 offset = PCA957X_CFG;
231 break; 272 break;
232 } 273 }
233 ret = pca953x_write_reg(chip, offset, reg_val); 274 ret = pca953x_write_single(chip, offset, reg_val, off);
234 if (ret) 275 if (ret)
235 goto exit; 276 goto exit;
236 277
237 chip->reg_direction = reg_val; 278 chip->reg_direction[off / BANK_SZ] = reg_val;
238 ret = 0; 279 ret = 0;
239exit: 280exit:
240 mutex_unlock(&chip->i2c_lock); 281 mutex_unlock(&chip->i2c_lock);
@@ -258,7 +299,7 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
258 offset = PCA957X_IN; 299 offset = PCA957X_IN;
259 break; 300 break;
260 } 301 }
261 ret = pca953x_read_reg(chip, offset, &reg_val); 302 ret = pca953x_read_single(chip, offset, &reg_val, off);
262 mutex_unlock(&chip->i2c_lock); 303 mutex_unlock(&chip->i2c_lock);
263 if (ret < 0) { 304 if (ret < 0) {
264 /* NOTE: diagnostic already emitted; that's all we should 305 /* NOTE: diagnostic already emitted; that's all we should
@@ -274,16 +315,18 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
274static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 315static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
275{ 316{
276 struct pca953x_chip *chip; 317 struct pca953x_chip *chip;
277 u32 reg_val; 318 u8 reg_val;
278 int ret, offset = 0; 319 int ret, offset = 0;
279 320
280 chip = container_of(gc, struct pca953x_chip, gpio_chip); 321 chip = container_of(gc, struct pca953x_chip, gpio_chip);
281 322
282 mutex_lock(&chip->i2c_lock); 323 mutex_lock(&chip->i2c_lock);
283 if (val) 324 if (val)
284 reg_val = chip->reg_output | (1u << off); 325 reg_val = chip->reg_output[off / BANK_SZ]
326 | (1u << (off % BANK_SZ));
285 else 327 else
286 reg_val = chip->reg_output & ~(1u << off); 328 reg_val = chip->reg_output[off / BANK_SZ]
329 & ~(1u << (off % BANK_SZ));
287 330
288 switch (chip->chip_type) { 331 switch (chip->chip_type) {
289 case PCA953X_TYPE: 332 case PCA953X_TYPE:
@@ -293,11 +336,11 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
293 offset = PCA957X_OUT; 336 offset = PCA957X_OUT;
294 break; 337 break;
295 } 338 }
296 ret = pca953x_write_reg(chip, offset, reg_val); 339 ret = pca953x_write_single(chip, offset, reg_val, off);
297 if (ret) 340 if (ret)
298 goto exit; 341 goto exit;
299 342
300 chip->reg_output = reg_val; 343 chip->reg_output[off / BANK_SZ] = reg_val;
301exit: 344exit:
302 mutex_unlock(&chip->i2c_lock); 345 mutex_unlock(&chip->i2c_lock);
303} 346}
@@ -328,21 +371,21 @@ static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
328 struct pca953x_chip *chip; 371 struct pca953x_chip *chip;
329 372
330 chip = container_of(gc, struct pca953x_chip, gpio_chip); 373 chip = container_of(gc, struct pca953x_chip, gpio_chip);
331 return chip->irq_base + off; 374 return irq_create_mapping(chip->domain, off);
332} 375}
333 376
334static void pca953x_irq_mask(struct irq_data *d) 377static void pca953x_irq_mask(struct irq_data *d)
335{ 378{
336 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 379 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
337 380
338 chip->irq_mask &= ~(1 << d->hwirq); 381 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
339} 382}
340 383
341static void pca953x_irq_unmask(struct irq_data *d) 384static void pca953x_irq_unmask(struct irq_data *d)
342{ 385{
343 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 386 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
344 387
345 chip->irq_mask |= 1 << d->hwirq; 388 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
346} 389}
347 390
348static void pca953x_irq_bus_lock(struct irq_data *d) 391static void pca953x_irq_bus_lock(struct irq_data *d)
@@ -355,17 +398,20 @@ static void pca953x_irq_bus_lock(struct irq_data *d)
355static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 398static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
356{ 399{
357 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 400 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
358 u32 new_irqs; 401 u8 new_irqs;
359 u32 level; 402 int level, i;
360 403
361 /* Look for any newly setup interrupt */ 404 /* Look for any newly setup interrupt */
362 new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; 405 for (i = 0; i < NBANK(chip); i++) {
363 new_irqs &= ~chip->reg_direction; 406 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
364 407 new_irqs &= ~chip->reg_direction[i];
365 while (new_irqs) { 408
366 level = __ffs(new_irqs); 409 while (new_irqs) {
367 pca953x_gpio_direction_input(&chip->gpio_chip, level); 410 level = __ffs(new_irqs);
368 new_irqs &= ~(1 << level); 411 pca953x_gpio_direction_input(&chip->gpio_chip,
412 level + (BANK_SZ * i));
413 new_irqs &= ~(1 << level);
414 }
369 } 415 }
370 416
371 mutex_unlock(&chip->irq_lock); 417 mutex_unlock(&chip->irq_lock);
@@ -374,7 +420,8 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
374static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 420static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
375{ 421{
376 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 422 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
377 u32 mask = 1 << d->hwirq; 423 int bank_nb = d->hwirq / BANK_SZ;
424 u8 mask = 1 << (d->hwirq % BANK_SZ);
378 425
379 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 426 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
380 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 427 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
@@ -383,14 +430,14 @@ static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
383 } 430 }
384 431
385 if (type & IRQ_TYPE_EDGE_FALLING) 432 if (type & IRQ_TYPE_EDGE_FALLING)
386 chip->irq_trig_fall |= mask; 433 chip->irq_trig_fall[bank_nb] |= mask;
387 else 434 else
388 chip->irq_trig_fall &= ~mask; 435 chip->irq_trig_fall[bank_nb] &= ~mask;
389 436
390 if (type & IRQ_TYPE_EDGE_RISING) 437 if (type & IRQ_TYPE_EDGE_RISING)
391 chip->irq_trig_raise |= mask; 438 chip->irq_trig_raise[bank_nb] |= mask;
392 else 439 else
393 chip->irq_trig_raise &= ~mask; 440 chip->irq_trig_raise[bank_nb] &= ~mask;
394 441
395 return 0; 442 return 0;
396} 443}
@@ -404,13 +451,13 @@ static struct irq_chip pca953x_irq_chip = {
404 .irq_set_type = pca953x_irq_set_type, 451 .irq_set_type = pca953x_irq_set_type,
405}; 452};
406 453
407static u32 pca953x_irq_pending(struct pca953x_chip *chip) 454static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
408{ 455{
409 u32 cur_stat; 456 u8 cur_stat[MAX_BANK];
410 u32 old_stat; 457 u8 old_stat[MAX_BANK];
411 u32 pending; 458 u8 pendings = 0;
412 u32 trigger; 459 u8 trigger[MAX_BANK], triggers = 0;
413 int ret, offset = 0; 460 int ret, i, offset = 0;
414 461
415 switch (chip->chip_type) { 462 switch (chip->chip_type) {
416 case PCA953X_TYPE: 463 case PCA953X_TYPE:
@@ -420,60 +467,88 @@ static u32 pca953x_irq_pending(struct pca953x_chip *chip)
420 offset = PCA957X_IN; 467 offset = PCA957X_IN;
421 break; 468 break;
422 } 469 }
423 ret = pca953x_read_reg(chip, offset, &cur_stat); 470 ret = pca953x_read_regs(chip, offset, cur_stat);
424 if (ret) 471 if (ret)
425 return 0; 472 return 0;
426 473
427 /* Remove output pins from the equation */ 474 /* Remove output pins from the equation */
428 cur_stat &= chip->reg_direction; 475 for (i = 0; i < NBANK(chip); i++)
476 cur_stat[i] &= chip->reg_direction[i];
477
478 memcpy(old_stat, chip->irq_stat, NBANK(chip));
429 479
430 old_stat = chip->irq_stat; 480 for (i = 0; i < NBANK(chip); i++) {
431 trigger = (cur_stat ^ old_stat) & chip->irq_mask; 481 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
482 triggers += trigger[i];
483 }
432 484
433 if (!trigger) 485 if (!triggers)
434 return 0; 486 return 0;
435 487
436 chip->irq_stat = cur_stat; 488 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
437 489
438 pending = (old_stat & chip->irq_trig_fall) | 490 for (i = 0; i < NBANK(chip); i++) {
439 (cur_stat & chip->irq_trig_raise); 491 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
440 pending &= trigger; 492 (cur_stat[i] & chip->irq_trig_raise[i]);
493 pending[i] &= trigger[i];
494 pendings += pending[i];
495 }
441 496
442 return pending; 497 return pendings;
443} 498}
444 499
445static irqreturn_t pca953x_irq_handler(int irq, void *devid) 500static irqreturn_t pca953x_irq_handler(int irq, void *devid)
446{ 501{
447 struct pca953x_chip *chip = devid; 502 struct pca953x_chip *chip = devid;
448 u32 pending; 503 u8 pending[MAX_BANK];
449 u32 level; 504 u8 level;
450 505 int i;
451 pending = pca953x_irq_pending(chip);
452 506
453 if (!pending) 507 if (!pca953x_irq_pending(chip, pending))
454 return IRQ_HANDLED; 508 return IRQ_HANDLED;
455 509
456 do { 510 for (i = 0; i < NBANK(chip); i++) {
457 level = __ffs(pending); 511 while (pending[i]) {
458 handle_nested_irq(irq_find_mapping(chip->domain, level)); 512 level = __ffs(pending[i]);
459 513 handle_nested_irq(irq_find_mapping(chip->domain,
460 pending &= ~(1 << level); 514 level + (BANK_SZ * i)));
461 } while (pending); 515 pending[i] &= ~(1 << level);
516 }
517 }
462 518
463 return IRQ_HANDLED; 519 return IRQ_HANDLED;
464} 520}
465 521
522static int pca953x_gpio_irq_map(struct irq_domain *d, unsigned int irq,
523 irq_hw_number_t hwirq)
524{
525 irq_clear_status_flags(irq, IRQ_NOREQUEST);
526 irq_set_chip_data(irq, d->host_data);
527 irq_set_chip(irq, &pca953x_irq_chip);
528 irq_set_nested_thread(irq, true);
529#ifdef CONFIG_ARM
530 set_irq_flags(irq, IRQF_VALID);
531#else
532 irq_set_noprobe(irq);
533#endif
534
535 return 0;
536}
537
538static const struct irq_domain_ops pca953x_irq_simple_ops = {
539 .map = pca953x_gpio_irq_map,
540 .xlate = irq_domain_xlate_twocell,
541};
542
466static int pca953x_irq_setup(struct pca953x_chip *chip, 543static int pca953x_irq_setup(struct pca953x_chip *chip,
467 const struct i2c_device_id *id, 544 const struct i2c_device_id *id,
468 int irq_base) 545 int irq_base)
469{ 546{
470 struct i2c_client *client = chip->client; 547 struct i2c_client *client = chip->client;
471 int ret, offset = 0; 548 int ret, i, offset = 0;
472 u32 temporary;
473 549
474 if (irq_base != -1 550 if (irq_base != -1
475 && (id->driver_data & PCA_INT)) { 551 && (id->driver_data & PCA_INT)) {
476 int lvl;
477 552
478 switch (chip->chip_type) { 553 switch (chip->chip_type) {
479 case PCA953X_TYPE: 554 case PCA953X_TYPE:
@@ -483,49 +558,29 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
483 offset = PCA957X_IN; 558 offset = PCA957X_IN;
484 break; 559 break;
485 } 560 }
486 ret = pca953x_read_reg(chip, offset, &temporary); 561 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
487 chip->irq_stat = temporary;
488 if (ret) 562 if (ret)
489 goto out_failed; 563 return ret;
490 564
491 /* 565 /*
492 * There is no way to know which GPIO line generated the 566 * There is no way to know which GPIO line generated the
493 * interrupt. We have to rely on the previous read for 567 * interrupt. We have to rely on the previous read for
494 * this purpose. 568 * this purpose.
495 */ 569 */
496 chip->irq_stat &= chip->reg_direction; 570 for (i = 0; i < NBANK(chip); i++)
571 chip->irq_stat[i] &= chip->reg_direction[i];
497 mutex_init(&chip->irq_lock); 572 mutex_init(&chip->irq_lock);
498 573
499 chip->irq_base = irq_alloc_descs(-1, irq_base, chip->gpio_chip.ngpio, -1); 574 chip->domain = irq_domain_add_simple(client->dev.of_node,
500 if (chip->irq_base < 0)
501 goto out_failed;
502
503 chip->domain = irq_domain_add_legacy(client->dev.of_node,
504 chip->gpio_chip.ngpio, 575 chip->gpio_chip.ngpio,
505 chip->irq_base, 576 irq_base,
506 0, 577 &pca953x_irq_simple_ops,
507 &irq_domain_simple_ops,
508 NULL); 578 NULL);
509 if (!chip->domain) { 579 if (!chip->domain)
510 ret = -ENODEV; 580 return -ENODEV;
511 goto out_irqdesc_free;
512 }
513 581
514 for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) { 582 ret = devm_request_threaded_irq(&client->dev,
515 int irq = lvl + chip->irq_base; 583 client->irq,
516
517 irq_clear_status_flags(irq, IRQ_NOREQUEST);
518 irq_set_chip_data(irq, chip);
519 irq_set_chip(irq, &pca953x_irq_chip);
520 irq_set_nested_thread(irq, true);
521#ifdef CONFIG_ARM
522 set_irq_flags(irq, IRQF_VALID);
523#else
524 irq_set_noprobe(irq);
525#endif
526 }
527
528 ret = request_threaded_irq(client->irq,
529 NULL, 584 NULL,
530 pca953x_irq_handler, 585 pca953x_irq_handler,
531 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 586 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
@@ -533,28 +588,15 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
533 if (ret) { 588 if (ret) {
534 dev_err(&client->dev, "failed to request irq %d\n", 589 dev_err(&client->dev, "failed to request irq %d\n",
535 client->irq); 590 client->irq);
536 goto out_irqdesc_free; 591 return ret;
537 } 592 }
538 593
539 chip->gpio_chip.to_irq = pca953x_gpio_to_irq; 594 chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
540 } 595 }
541 596
542 return 0; 597 return 0;
543
544out_irqdesc_free:
545 irq_free_descs(chip->irq_base, chip->gpio_chip.ngpio);
546out_failed:
547 chip->irq_base = -1;
548 return ret;
549} 598}
550 599
551static void pca953x_irq_teardown(struct pca953x_chip *chip)
552{
553 if (chip->irq_base != -1) {
554 irq_free_descs(chip->irq_base, chip->gpio_chip.ngpio);
555 free_irq(chip->client->irq, chip);
556 }
557}
558#else /* CONFIG_GPIO_PCA953X_IRQ */ 600#else /* CONFIG_GPIO_PCA953X_IRQ */
559static int pca953x_irq_setup(struct pca953x_chip *chip, 601static int pca953x_irq_setup(struct pca953x_chip *chip,
560 const struct i2c_device_id *id, 602 const struct i2c_device_id *id,
@@ -567,10 +609,6 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
567 609
568 return 0; 610 return 0;
569} 611}
570
571static void pca953x_irq_teardown(struct pca953x_chip *chip)
572{
573}
574#endif 612#endif
575 613
576/* 614/*
@@ -619,18 +657,24 @@ pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
619static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 657static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
620{ 658{
621 int ret; 659 int ret;
660 u8 val[MAX_BANK];
622 661
623 ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); 662 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
624 if (ret) 663 if (ret)
625 goto out; 664 goto out;
626 665
627 ret = pca953x_read_reg(chip, PCA953X_DIRECTION, 666 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
628 &chip->reg_direction); 667 chip->reg_direction);
629 if (ret) 668 if (ret)
630 goto out; 669 goto out;
631 670
632 /* set platform specific polarity inversion */ 671 /* set platform specific polarity inversion */
633 ret = pca953x_write_reg(chip, PCA953X_INVERT, invert); 672 if (invert)
673 memset(val, 0xFF, NBANK(chip));
674 else
675 memset(val, 0, NBANK(chip));
676
677 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
634out: 678out:
635 return ret; 679 return ret;
636} 680}
@@ -638,28 +682,36 @@ out:
638static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 682static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
639{ 683{
640 int ret; 684 int ret;
641 u32 val = 0; 685 u8 val[MAX_BANK];
642 686
643 /* Let every port in proper state, that could save power */ 687 /* Let every port in proper state, that could save power */
644 pca953x_write_reg(chip, PCA957X_PUPD, 0x0); 688 memset(val, 0, NBANK(chip));
645 pca953x_write_reg(chip, PCA957X_CFG, 0xffff); 689 pca953x_write_regs(chip, PCA957X_PUPD, val);
646 pca953x_write_reg(chip, PCA957X_OUT, 0x0); 690 memset(val, 0xFF, NBANK(chip));
647 691 pca953x_write_regs(chip, PCA957X_CFG, val);
648 ret = pca953x_read_reg(chip, PCA957X_IN, &val); 692 memset(val, 0, NBANK(chip));
693 pca953x_write_regs(chip, PCA957X_OUT, val);
694
695 ret = pca953x_read_regs(chip, PCA957X_IN, val);
649 if (ret) 696 if (ret)
650 goto out; 697 goto out;
651 ret = pca953x_read_reg(chip, PCA957X_OUT, &chip->reg_output); 698 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
652 if (ret) 699 if (ret)
653 goto out; 700 goto out;
654 ret = pca953x_read_reg(chip, PCA957X_CFG, &chip->reg_direction); 701 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
655 if (ret) 702 if (ret)
656 goto out; 703 goto out;
657 704
658 /* set platform specific polarity inversion */ 705 /* set platform specific polarity inversion */
659 pca953x_write_reg(chip, PCA957X_INVRT, invert); 706 if (invert)
707 memset(val, 0xFF, NBANK(chip));
708 else
709 memset(val, 0, NBANK(chip));
710 pca953x_write_regs(chip, PCA957X_INVRT, val);
660 711
661 /* To enable register 6, 7 to controll pull up and pull down */ 712 /* To enable register 6, 7 to controll pull up and pull down */
662 pca953x_write_reg(chip, PCA957X_BKEN, 0x202); 713 memset(val, 0x02, NBANK(chip));
714 pca953x_write_regs(chip, PCA957X_BKEN, val);
663 715
664 return 0; 716 return 0;
665out: 717out:
@@ -675,7 +727,8 @@ static int pca953x_probe(struct i2c_client *client,
675 int ret; 727 int ret;
676 u32 invert = 0; 728 u32 invert = 0;
677 729
678 chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL); 730 chip = devm_kzalloc(&client->dev,
731 sizeof(struct pca953x_chip), GFP_KERNEL);
679 if (chip == NULL) 732 if (chip == NULL)
680 return -ENOMEM; 733 return -ENOMEM;
681 734
@@ -710,15 +763,15 @@ static int pca953x_probe(struct i2c_client *client,
710 else 763 else
711 ret = device_pca957x_init(chip, invert); 764 ret = device_pca957x_init(chip, invert);
712 if (ret) 765 if (ret)
713 goto out_failed; 766 return ret;
714 767
715 ret = pca953x_irq_setup(chip, id, irq_base); 768 ret = pca953x_irq_setup(chip, id, irq_base);
716 if (ret) 769 if (ret)
717 goto out_failed; 770 return ret;
718 771
719 ret = gpiochip_add(&chip->gpio_chip); 772 ret = gpiochip_add(&chip->gpio_chip);
720 if (ret) 773 if (ret)
721 goto out_failed_irq; 774 return ret;
722 775
723 if (pdata && pdata->setup) { 776 if (pdata && pdata->setup) {
724 ret = pdata->setup(client, chip->gpio_chip.base, 777 ret = pdata->setup(client, chip->gpio_chip.base,
@@ -729,12 +782,6 @@ static int pca953x_probe(struct i2c_client *client,
729 782
730 i2c_set_clientdata(client, chip); 783 i2c_set_clientdata(client, chip);
731 return 0; 784 return 0;
732
733out_failed_irq:
734 pca953x_irq_teardown(chip);
735out_failed:
736 kfree(chip);
737 return ret;
738} 785}
739 786
740static int pca953x_remove(struct i2c_client *client) 787static int pca953x_remove(struct i2c_client *client)
@@ -760,12 +807,11 @@ static int pca953x_remove(struct i2c_client *client)
760 return ret; 807 return ret;
761 } 808 }
762 809
763 pca953x_irq_teardown(chip);
764 kfree(chip);
765 return 0; 810 return 0;
766} 811}
767 812
768static const struct of_device_id pca953x_dt_ids[] = { 813static const struct of_device_id pca953x_dt_ids[] = {
814 { .compatible = "nxp,pca9505", },
769 { .compatible = "nxp,pca9534", }, 815 { .compatible = "nxp,pca9534", },
770 { .compatible = "nxp,pca9535", }, 816 { .compatible = "nxp,pca9535", },
771 { .compatible = "nxp,pca9536", }, 817 { .compatible = "nxp,pca9536", },
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index c1720de18a4f..b820869ca93c 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -365,7 +365,7 @@ static int __init pl061_gpio_init(void)
365{ 365{
366 return amba_driver_register(&pl061_gpio_driver); 366 return amba_driver_register(&pl061_gpio_driver);
367} 367}
368subsys_initcall(pl061_gpio_init); 368module_init(pl061_gpio_init);
369 369
370MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 370MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
371MODULE_DESCRIPTION("PL061 GPIO driver"); 371MODULE_DESCRIPTION("PL061 GPIO driver");
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 8325f580c0f1..9cc108d2b770 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -642,12 +642,7 @@ static struct platform_driver pxa_gpio_driver = {
642 .of_match_table = of_match_ptr(pxa_gpio_dt_ids), 642 .of_match_table = of_match_ptr(pxa_gpio_dt_ids),
643 }, 643 },
644}; 644};
645 645module_platform_driver(pxa_gpio_driver);
646static int __init pxa_gpio_init(void)
647{
648 return platform_driver_register(&pxa_gpio_driver);
649}
650postcore_initcall(pxa_gpio_init);
651 646
652#ifdef CONFIG_PM 647#ifdef CONFIG_PM
653static int pxa_gpio_suspend(void) 648static int pxa_gpio_suspend(void)
diff --git a/drivers/gpio/gpio-twl4030.c b/drivers/gpio/gpio-twl4030.c
index 9572aa137e6f..4d330e36da1d 100644
--- a/drivers/gpio/gpio-twl4030.c
+++ b/drivers/gpio/gpio-twl4030.c
@@ -37,7 +37,6 @@
37 37
38#include <linux/i2c/twl.h> 38#include <linux/i2c/twl.h>
39 39
40
41/* 40/*
42 * The GPIO "subchip" supports 18 GPIOs which can be configured as 41 * The GPIO "subchip" supports 18 GPIOs which can be configured as
43 * inputs or outputs, with pullups or pulldowns on each pin. Each 42 * inputs or outputs, with pullups or pulldowns on each pin. Each
@@ -49,11 +48,6 @@
49 * There are also two LED pins used sometimes as output-only GPIOs. 48 * There are also two LED pins used sometimes as output-only GPIOs.
50 */ 49 */
51 50
52
53static struct gpio_chip twl_gpiochip;
54static int twl4030_gpio_base;
55static int twl4030_gpio_irq_base;
56
57/* genirq interfaces are not available to modules */ 51/* genirq interfaces are not available to modules */
58#ifdef MODULE 52#ifdef MODULE
59#define is_module() true 53#define is_module() true
@@ -69,14 +63,24 @@ static int twl4030_gpio_irq_base;
69/* Mask for GPIO registers when aggregated into a 32-bit integer */ 63/* Mask for GPIO registers when aggregated into a 32-bit integer */
70#define GPIO_32_MASK 0x0003ffff 64#define GPIO_32_MASK 0x0003ffff
71 65
72/* Data structures */ 66struct gpio_twl4030_priv {
73static DEFINE_MUTEX(gpio_lock); 67 struct gpio_chip gpio_chip;
68 struct mutex mutex;
69 int irq_base;
74 70
75/* store usage of each GPIO. - each bit represents one GPIO */ 71 /* Bitfields for state caching */
76static unsigned int gpio_usage_count; 72 unsigned int usage_count;
73 unsigned int direction;
74 unsigned int out_state;
75};
77 76
78/*----------------------------------------------------------------------*/ 77/*----------------------------------------------------------------------*/
79 78
79static inline struct gpio_twl4030_priv *to_gpio_twl4030(struct gpio_chip *chip)
80{
81 return container_of(chip, struct gpio_twl4030_priv, gpio_chip);
82}
83
80/* 84/*
81 * To configure TWL4030 GPIO module registers 85 * To configure TWL4030 GPIO module registers
82 */ 86 */
@@ -126,7 +130,7 @@ static inline int gpio_twl4030_read(u8 address)
126 130
127/*----------------------------------------------------------------------*/ 131/*----------------------------------------------------------------------*/
128 132
129static u8 cached_leden; /* protected by gpio_lock */ 133static u8 cached_leden;
130 134
131/* The LED lines are open drain outputs ... a FET pulls to GND, so an 135/* The LED lines are open drain outputs ... a FET pulls to GND, so an
132 * external pullup is needed. We could also expose the integrated PWM 136 * external pullup is needed. We could also expose the integrated PWM
@@ -140,14 +144,12 @@ static void twl4030_led_set_value(int led, int value)
140 if (led) 144 if (led)
141 mask <<= 1; 145 mask <<= 1;
142 146
143 mutex_lock(&gpio_lock);
144 if (value) 147 if (value)
145 cached_leden &= ~mask; 148 cached_leden &= ~mask;
146 else 149 else
147 cached_leden |= mask; 150 cached_leden |= mask;
148 status = twl_i2c_write_u8(TWL4030_MODULE_LED, cached_leden, 151 status = twl_i2c_write_u8(TWL4030_MODULE_LED, cached_leden,
149 TWL4030_LED_LEDEN_REG); 152 TWL4030_LED_LEDEN_REG);
150 mutex_unlock(&gpio_lock);
151} 153}
152 154
153static int twl4030_set_gpio_direction(int gpio, int is_input) 155static int twl4030_set_gpio_direction(int gpio, int is_input)
@@ -158,7 +160,6 @@ static int twl4030_set_gpio_direction(int gpio, int is_input)
158 u8 base = REG_GPIODATADIR1 + d_bnk; 160 u8 base = REG_GPIODATADIR1 + d_bnk;
159 int ret = 0; 161 int ret = 0;
160 162
161 mutex_lock(&gpio_lock);
162 ret = gpio_twl4030_read(base); 163 ret = gpio_twl4030_read(base);
163 if (ret >= 0) { 164 if (ret >= 0) {
164 if (is_input) 165 if (is_input)
@@ -168,7 +169,6 @@ static int twl4030_set_gpio_direction(int gpio, int is_input)
168 169
169 ret = gpio_twl4030_write(base, reg); 170 ret = gpio_twl4030_write(base, reg);
170 } 171 }
171 mutex_unlock(&gpio_lock);
172 return ret; 172 return ret;
173} 173}
174 174
@@ -193,10 +193,6 @@ static int twl4030_get_gpio_datain(int gpio)
193 u8 base = 0; 193 u8 base = 0;
194 int ret = 0; 194 int ret = 0;
195 195
196 if (unlikely((gpio >= TWL4030_GPIO_MAX)
197 || !(gpio_usage_count & BIT(gpio))))
198 return -EPERM;
199
200 base = REG_GPIODATAIN1 + d_bnk; 196 base = REG_GPIODATAIN1 + d_bnk;
201 ret = gpio_twl4030_read(base); 197 ret = gpio_twl4030_read(base);
202 if (ret > 0) 198 if (ret > 0)
@@ -209,9 +205,10 @@ static int twl4030_get_gpio_datain(int gpio)
209 205
210static int twl_request(struct gpio_chip *chip, unsigned offset) 206static int twl_request(struct gpio_chip *chip, unsigned offset)
211{ 207{
208 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
212 int status = 0; 209 int status = 0;
213 210
214 mutex_lock(&gpio_lock); 211 mutex_lock(&priv->mutex);
215 212
216 /* Support the two LED outputs as output-only GPIOs. */ 213 /* Support the two LED outputs as output-only GPIOs. */
217 if (offset >= TWL4030_GPIO_MAX) { 214 if (offset >= TWL4030_GPIO_MAX) {
@@ -252,7 +249,7 @@ static int twl_request(struct gpio_chip *chip, unsigned offset)
252 } 249 }
253 250
254 /* on first use, turn GPIO module "on" */ 251 /* on first use, turn GPIO module "on" */
255 if (!gpio_usage_count) { 252 if (!priv->usage_count) {
256 struct twl4030_gpio_platform_data *pdata; 253 struct twl4030_gpio_platform_data *pdata;
257 u8 value = MASK_GPIO_CTRL_GPIO_ON; 254 u8 value = MASK_GPIO_CTRL_GPIO_ON;
258 255
@@ -266,79 +263,120 @@ static int twl_request(struct gpio_chip *chip, unsigned offset)
266 status = gpio_twl4030_write(REG_GPIO_CTRL, value); 263 status = gpio_twl4030_write(REG_GPIO_CTRL, value);
267 } 264 }
268 265
266done:
269 if (!status) 267 if (!status)
270 gpio_usage_count |= (0x1 << offset); 268 priv->usage_count |= BIT(offset);
271 269
272done: 270 mutex_unlock(&priv->mutex);
273 mutex_unlock(&gpio_lock);
274 return status; 271 return status;
275} 272}
276 273
277static void twl_free(struct gpio_chip *chip, unsigned offset) 274static void twl_free(struct gpio_chip *chip, unsigned offset)
278{ 275{
276 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
277
278 mutex_lock(&priv->mutex);
279 if (offset >= TWL4030_GPIO_MAX) { 279 if (offset >= TWL4030_GPIO_MAX) {
280 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, 1); 280 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, 1);
281 return; 281 goto out;
282 } 282 }
283 283
284 mutex_lock(&gpio_lock); 284 priv->usage_count &= ~BIT(offset);
285
286 gpio_usage_count &= ~BIT(offset);
287 285
288 /* on last use, switch off GPIO module */ 286 /* on last use, switch off GPIO module */
289 if (!gpio_usage_count) 287 if (!priv->usage_count)
290 gpio_twl4030_write(REG_GPIO_CTRL, 0x0); 288 gpio_twl4030_write(REG_GPIO_CTRL, 0x0);
291 289
292 mutex_unlock(&gpio_lock); 290out:
291 mutex_unlock(&priv->mutex);
293} 292}
294 293
295static int twl_direction_in(struct gpio_chip *chip, unsigned offset) 294static int twl_direction_in(struct gpio_chip *chip, unsigned offset)
296{ 295{
297 return (offset < TWL4030_GPIO_MAX) 296 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
298 ? twl4030_set_gpio_direction(offset, 1) 297 int ret;
299 : -EINVAL; 298
299 mutex_lock(&priv->mutex);
300 if (offset < TWL4030_GPIO_MAX)
301 ret = twl4030_set_gpio_direction(offset, 1);
302 else
303 ret = -EINVAL;
304
305 if (!ret)
306 priv->direction &= ~BIT(offset);
307
308 mutex_unlock(&priv->mutex);
309
310 return ret;
300} 311}
301 312
302static int twl_get(struct gpio_chip *chip, unsigned offset) 313static int twl_get(struct gpio_chip *chip, unsigned offset)
303{ 314{
315 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
316 int ret;
304 int status = 0; 317 int status = 0;
305 318
306 if (offset < TWL4030_GPIO_MAX) 319 mutex_lock(&priv->mutex);
307 status = twl4030_get_gpio_datain(offset); 320 if (!(priv->usage_count & BIT(offset))) {
308 else if (offset == TWL4030_GPIO_MAX) 321 ret = -EPERM;
309 status = cached_leden & LEDEN_LEDAON; 322 goto out;
323 }
324
325 if (priv->direction & BIT(offset))
326 status = priv->out_state & BIT(offset);
310 else 327 else
311 status = cached_leden & LEDEN_LEDBON; 328 status = twl4030_get_gpio_datain(offset);
312 return (status < 0) ? 0 : status; 329
330 ret = (status <= 0) ? 0 : 1;
331out:
332 mutex_unlock(&priv->mutex);
333 return ret;
313} 334}
314 335
315static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) 336static void twl_set(struct gpio_chip *chip, unsigned offset, int value)
316{ 337{
317 if (offset < TWL4030_GPIO_MAX) { 338 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
339
340 mutex_lock(&priv->mutex);
341 if (offset < TWL4030_GPIO_MAX)
318 twl4030_set_gpio_dataout(offset, value); 342 twl4030_set_gpio_dataout(offset, value);
319 return twl4030_set_gpio_direction(offset, 0); 343 else
320 } else {
321 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value); 344 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value);
322 return 0; 345
323 } 346 if (value)
347 priv->out_state |= BIT(offset);
348 else
349 priv->out_state &= ~BIT(offset);
350
351 mutex_unlock(&priv->mutex);
324} 352}
325 353
326static void twl_set(struct gpio_chip *chip, unsigned offset, int value) 354static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value)
327{ 355{
356 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
357
358 mutex_lock(&priv->mutex);
328 if (offset < TWL4030_GPIO_MAX) 359 if (offset < TWL4030_GPIO_MAX)
329 twl4030_set_gpio_dataout(offset, value); 360 twl4030_set_gpio_dataout(offset, value);
330 else 361
331 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value); 362 priv->direction |= BIT(offset);
363 mutex_unlock(&priv->mutex);
364
365 twl_set(chip, offset, value);
366
367 return 0;
332} 368}
333 369
334static int twl_to_irq(struct gpio_chip *chip, unsigned offset) 370static int twl_to_irq(struct gpio_chip *chip, unsigned offset)
335{ 371{
336 return (twl4030_gpio_irq_base && (offset < TWL4030_GPIO_MAX)) 372 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
337 ? (twl4030_gpio_irq_base + offset) 373
374 return (priv->irq_base && (offset < TWL4030_GPIO_MAX))
375 ? (priv->irq_base + offset)
338 : -EINVAL; 376 : -EINVAL;
339} 377}
340 378
341static struct gpio_chip twl_gpiochip = { 379static struct gpio_chip template_chip = {
342 .label = "twl4030", 380 .label = "twl4030",
343 .owner = THIS_MODULE, 381 .owner = THIS_MODULE,
344 .request = twl_request, 382 .request = twl_request,
@@ -424,8 +462,14 @@ static int gpio_twl4030_probe(struct platform_device *pdev)
424{ 462{
425 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; 463 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
426 struct device_node *node = pdev->dev.of_node; 464 struct device_node *node = pdev->dev.of_node;
465 struct gpio_twl4030_priv *priv;
427 int ret, irq_base; 466 int ret, irq_base;
428 467
468 priv = devm_kzalloc(&pdev->dev, sizeof(struct gpio_twl4030_priv),
469 GFP_KERNEL);
470 if (!priv)
471 return -ENOMEM;
472
429 /* maybe setup IRQs */ 473 /* maybe setup IRQs */
430 if (is_module()) { 474 if (is_module()) {
431 dev_err(&pdev->dev, "can't dispatch IRQs from modules\n"); 475 dev_err(&pdev->dev, "can't dispatch IRQs from modules\n");
@@ -445,12 +489,15 @@ static int gpio_twl4030_probe(struct platform_device *pdev)
445 if (ret < 0) 489 if (ret < 0)
446 return ret; 490 return ret;
447 491
448 twl4030_gpio_irq_base = irq_base; 492 priv->irq_base = irq_base;
449 493
450no_irqs: 494no_irqs:
451 twl_gpiochip.base = -1; 495 priv->gpio_chip = template_chip;
452 twl_gpiochip.ngpio = TWL4030_GPIO_MAX; 496 priv->gpio_chip.base = -1;
453 twl_gpiochip.dev = &pdev->dev; 497 priv->gpio_chip.ngpio = TWL4030_GPIO_MAX;
498 priv->gpio_chip.dev = &pdev->dev;
499
500 mutex_init(&priv->mutex);
454 501
455 if (node) 502 if (node)
456 pdata = of_gpio_twl4030(&pdev->dev); 503 pdata = of_gpio_twl4030(&pdev->dev);
@@ -481,23 +528,23 @@ no_irqs:
481 * is (still) clear if use_leds is set. 528 * is (still) clear if use_leds is set.
482 */ 529 */
483 if (pdata->use_leds) 530 if (pdata->use_leds)
484 twl_gpiochip.ngpio += 2; 531 priv->gpio_chip.ngpio += 2;
485 532
486 ret = gpiochip_add(&twl_gpiochip); 533 ret = gpiochip_add(&priv->gpio_chip);
487 if (ret < 0) { 534 if (ret < 0) {
488 dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); 535 dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret);
489 twl_gpiochip.ngpio = 0; 536 priv->gpio_chip.ngpio = 0;
490 gpio_twl4030_remove(pdev); 537 gpio_twl4030_remove(pdev);
491 goto out; 538 goto out;
492 } 539 }
493 540
494 twl4030_gpio_base = twl_gpiochip.base; 541 platform_set_drvdata(pdev, priv);
495 542
496 if (pdata && pdata->setup) { 543 if (pdata && pdata->setup) {
497 int status; 544 int status;
498 545
499 status = pdata->setup(&pdev->dev, 546 status = pdata->setup(&pdev->dev, priv->gpio_chip.base,
500 twl4030_gpio_base, TWL4030_GPIO_MAX); 547 TWL4030_GPIO_MAX);
501 if (status) 548 if (status)
502 dev_dbg(&pdev->dev, "setup --> %d\n", status); 549 dev_dbg(&pdev->dev, "setup --> %d\n", status);
503 } 550 }
@@ -510,18 +557,19 @@ out:
510static int gpio_twl4030_remove(struct platform_device *pdev) 557static int gpio_twl4030_remove(struct platform_device *pdev)
511{ 558{
512 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; 559 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
560 struct gpio_twl4030_priv *priv = platform_get_drvdata(pdev);
513 int status; 561 int status;
514 562
515 if (pdata && pdata->teardown) { 563 if (pdata && pdata->teardown) {
516 status = pdata->teardown(&pdev->dev, 564 status = pdata->teardown(&pdev->dev, priv->gpio_chip.base,
517 twl4030_gpio_base, TWL4030_GPIO_MAX); 565 TWL4030_GPIO_MAX);
518 if (status) { 566 if (status) {
519 dev_dbg(&pdev->dev, "teardown --> %d\n", status); 567 dev_dbg(&pdev->dev, "teardown --> %d\n", status);
520 return status; 568 return status;
521 } 569 }
522 } 570 }
523 571
524 status = gpiochip_remove(&twl_gpiochip); 572 status = gpiochip_remove(&priv->gpio_chip);
525 if (status < 0) 573 if (status < 0)
526 return status; 574 return status;
527 575
diff --git a/drivers/gpio/gpio-vt8500.c b/drivers/gpio/gpio-vt8500.c
index b53320a16fc8..9a7c434d2947 100644
--- a/drivers/gpio/gpio-vt8500.c
+++ b/drivers/gpio/gpio-vt8500.c
@@ -73,19 +73,20 @@ struct vt8500_gpio_data {
73static struct vt8500_gpio_data vt8500_data = { 73static struct vt8500_gpio_data vt8500_data = {
74 .num_banks = 7, 74 .num_banks = 7,
75 .banks = { 75 .banks = {
76 VT8500_BANK(NO_REG, 0x3C, 0x5C, 0x7C, 9),
76 VT8500_BANK(0x00, 0x20, 0x40, 0x60, 26), 77 VT8500_BANK(0x00, 0x20, 0x40, 0x60, 26),
77 VT8500_BANK(0x04, 0x24, 0x44, 0x64, 28), 78 VT8500_BANK(0x04, 0x24, 0x44, 0x64, 28),
78 VT8500_BANK(0x08, 0x28, 0x48, 0x68, 31), 79 VT8500_BANK(0x08, 0x28, 0x48, 0x68, 31),
79 VT8500_BANK(0x0C, 0x2C, 0x4C, 0x6C, 19), 80 VT8500_BANK(0x0C, 0x2C, 0x4C, 0x6C, 19),
80 VT8500_BANK(0x10, 0x30, 0x50, 0x70, 19), 81 VT8500_BANK(0x10, 0x30, 0x50, 0x70, 19),
81 VT8500_BANK(0x14, 0x34, 0x54, 0x74, 23), 82 VT8500_BANK(0x14, 0x34, 0x54, 0x74, 23),
82 VT8500_BANK(NO_REG, 0x3C, 0x5C, 0x7C, 9),
83 }, 83 },
84}; 84};
85 85
86static struct vt8500_gpio_data wm8505_data = { 86static struct vt8500_gpio_data wm8505_data = {
87 .num_banks = 10, 87 .num_banks = 10,
88 .banks = { 88 .banks = {
89 VT8500_BANK(0x64, 0x8C, 0xB4, 0xDC, 22),
89 VT8500_BANK(0x40, 0x68, 0x90, 0xB8, 8), 90 VT8500_BANK(0x40, 0x68, 0x90, 0xB8, 8),
90 VT8500_BANK(0x44, 0x6C, 0x94, 0xBC, 32), 91 VT8500_BANK(0x44, 0x6C, 0x94, 0xBC, 32),
91 VT8500_BANK(0x48, 0x70, 0x98, 0xC0, 6), 92 VT8500_BANK(0x48, 0x70, 0x98, 0xC0, 6),
@@ -95,7 +96,6 @@ static struct vt8500_gpio_data wm8505_data = {
95 VT8500_BANK(0x58, 0x80, 0xA8, 0xD0, 5), 96 VT8500_BANK(0x58, 0x80, 0xA8, 0xD0, 5),
96 VT8500_BANK(0x5C, 0x84, 0xAC, 0xD4, 12), 97 VT8500_BANK(0x5C, 0x84, 0xAC, 0xD4, 12),
97 VT8500_BANK(0x60, 0x88, 0xB0, 0xD8, 16), 98 VT8500_BANK(0x60, 0x88, 0xB0, 0xD8, 16),
98 VT8500_BANK(0x64, 0x8C, 0xB4, 0xDC, 22),
99 VT8500_BANK(0x500, 0x504, 0x508, 0x50C, 6), 99 VT8500_BANK(0x500, 0x504, 0x508, 0x50C, 6),
100 }, 100 },
101}; 101};
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index cbad6e908d30..a063eb04b6ce 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c
@@ -15,6 +15,7 @@
15#include <linux/export.h> 15#include <linux/export.h>
16#include <linux/acpi_gpio.h> 16#include <linux/acpi_gpio.h>
17#include <linux/acpi.h> 17#include <linux/acpi.h>
18#include <linux/interrupt.h>
18 19
19static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) 20static int acpi_gpiochip_find(struct gpio_chip *gc, void *data)
20{ 21{
@@ -52,3 +53,89 @@ int acpi_get_gpio(char *path, int pin)
52 return chip->base + pin; 53 return chip->base + pin;
53} 54}
54EXPORT_SYMBOL_GPL(acpi_get_gpio); 55EXPORT_SYMBOL_GPL(acpi_get_gpio);
56
57
58static irqreturn_t acpi_gpio_irq_handler(int irq, void *data)
59{
60 acpi_handle handle = data;
61
62 acpi_evaluate_object(handle, NULL, NULL, NULL);
63
64 return IRQ_HANDLED;
65}
66
67/**
68 * acpi_gpiochip_request_interrupts() - Register isr for gpio chip ACPI events
69 * @chip: gpio chip
70 *
71 * ACPI5 platforms can use GPIO signaled ACPI events. These GPIO interrupts are
72 * handled by ACPI event methods which need to be called from the GPIO
73 * chip's interrupt handler. acpi_gpiochip_request_interrupts finds out which
74 * gpio pins have acpi event methods and assigns interrupt handlers that calls
75 * the acpi event methods for those pins.
76 *
77 * Interrupts are automatically freed on driver detach
78 */
79
80void acpi_gpiochip_request_interrupts(struct gpio_chip *chip)
81{
82 struct acpi_buffer buf = {ACPI_ALLOCATE_BUFFER, NULL};
83 struct acpi_resource *res;
84 acpi_handle handle, ev_handle;
85 acpi_status status;
86 unsigned int pin;
87 int irq, ret;
88 char ev_name[5];
89
90 if (!chip->dev || !chip->to_irq)
91 return;
92
93 handle = ACPI_HANDLE(chip->dev);
94 if (!handle)
95 return;
96
97 status = acpi_get_event_resources(handle, &buf);
98 if (ACPI_FAILURE(status))
99 return;
100
101 /* If a gpio interrupt has an acpi event handler method, then
102 * set up an interrupt handler that calls the acpi event handler
103 */
104
105 for (res = buf.pointer;
106 res && (res->type != ACPI_RESOURCE_TYPE_END_TAG);
107 res = ACPI_NEXT_RESOURCE(res)) {
108
109 if (res->type != ACPI_RESOURCE_TYPE_GPIO ||
110 res->data.gpio.connection_type !=
111 ACPI_RESOURCE_GPIO_TYPE_INT)
112 continue;
113
114 pin = res->data.gpio.pin_table[0];
115 if (pin > chip->ngpio)
116 continue;
117
118 sprintf(ev_name, "_%c%02X",
119 res->data.gpio.triggering ? 'E' : 'L', pin);
120
121 status = acpi_get_handle(handle, ev_name, &ev_handle);
122 if (ACPI_FAILURE(status))
123 continue;
124
125 irq = chip->to_irq(chip, pin);
126 if (irq < 0)
127 continue;
128
129 /* Assume BIOS sets the triggering, so no flags */
130 ret = devm_request_threaded_irq(chip->dev, irq, NULL,
131 acpi_gpio_irq_handler,
132 0,
133 "GPIO-signaled-ACPI-event",
134 ev_handle);
135 if (ret)
136 dev_err(chip->dev,
137 "Failed to request IRQ %d ACPI event handler\n",
138 irq);
139 }
140}
141EXPORT_SYMBOL(acpi_gpiochip_request_interrupts);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 199fca15f270..e14eb88bbe8d 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -52,14 +52,13 @@ struct gpio_desc {
52/* flag symbols are bit numbers */ 52/* flag symbols are bit numbers */
53#define FLAG_REQUESTED 0 53#define FLAG_REQUESTED 0
54#define FLAG_IS_OUT 1 54#define FLAG_IS_OUT 1
55#define FLAG_RESERVED 2 55#define FLAG_EXPORT 2 /* protected by sysfs_lock */
56#define FLAG_EXPORT 3 /* protected by sysfs_lock */ 56#define FLAG_SYSFS 3 /* exported via /sys/class/gpio/control */
57#define FLAG_SYSFS 4 /* exported via /sys/class/gpio/control */ 57#define FLAG_TRIG_FALL 4 /* trigger on falling edge */
58#define FLAG_TRIG_FALL 5 /* trigger on falling edge */ 58#define FLAG_TRIG_RISE 5 /* trigger on rising edge */
59#define FLAG_TRIG_RISE 6 /* trigger on rising edge */ 59#define FLAG_ACTIVE_LOW 6 /* sysfs value has active low */
60#define FLAG_ACTIVE_LOW 7 /* sysfs value has active low */ 60#define FLAG_OPEN_DRAIN 7 /* Gpio is open drain type */
61#define FLAG_OPEN_DRAIN 8 /* Gpio is open drain type */ 61#define FLAG_OPEN_SOURCE 8 /* Gpio is open source type */
62#define FLAG_OPEN_SOURCE 9 /* Gpio is open source type */
63 62
64#define ID_SHIFT 16 /* add new flags before this one */ 63#define ID_SHIFT 16 /* add new flags before this one */
65 64
@@ -132,7 +131,7 @@ static int gpiochip_find_base(int ngpio)
132 struct gpio_desc *desc = &gpio_desc[i]; 131 struct gpio_desc *desc = &gpio_desc[i];
133 struct gpio_chip *chip = desc->chip; 132 struct gpio_chip *chip = desc->chip;
134 133
135 if (!chip && !test_bit(FLAG_RESERVED, &desc->flags)) { 134 if (!chip) {
136 spare++; 135 spare++;
137 if (spare == ngpio) { 136 if (spare == ngpio) {
138 base = i; 137 base = i;
@@ -150,47 +149,6 @@ static int gpiochip_find_base(int ngpio)
150 return base; 149 return base;
151} 150}
152 151
153/**
154 * gpiochip_reserve() - reserve range of gpios to use with platform code only
155 * @start: starting gpio number
156 * @ngpio: number of gpios to reserve
157 * Context: platform init, potentially before irqs or kmalloc will work
158 *
159 * Returns a negative errno if any gpio within the range is already reserved
160 * or registered, else returns zero as a success code. Use this function
161 * to mark a range of gpios as unavailable for dynamic gpio number allocation,
162 * for example because its driver support is not yet loaded.
163 */
164int __init gpiochip_reserve(int start, int ngpio)
165{
166 int ret = 0;
167 unsigned long flags;
168 int i;
169
170 if (!gpio_is_valid(start) || !gpio_is_valid(start + ngpio - 1))
171 return -EINVAL;
172
173 spin_lock_irqsave(&gpio_lock, flags);
174
175 for (i = start; i < start + ngpio; i++) {
176 struct gpio_desc *desc = &gpio_desc[i];
177
178 if (desc->chip || test_bit(FLAG_RESERVED, &desc->flags)) {
179 ret = -EBUSY;
180 goto err;
181 }
182
183 set_bit(FLAG_RESERVED, &desc->flags);
184 }
185
186 pr_debug("%s: reserved gpios from %d to %d\n",
187 __func__, start, start + ngpio - 1);
188err:
189 spin_unlock_irqrestore(&gpio_lock, flags);
190
191 return ret;
192}
193
194/* caller ensures gpio is valid and requested, chip->get_direction may sleep */ 152/* caller ensures gpio is valid and requested, chip->get_direction may sleep */
195static int gpio_get_direction(unsigned gpio) 153static int gpio_get_direction(unsigned gpio)
196{ 154{
@@ -254,13 +212,14 @@ static ssize_t gpio_direction_show(struct device *dev,
254 212
255 mutex_lock(&sysfs_lock); 213 mutex_lock(&sysfs_lock);
256 214
257 if (!test_bit(FLAG_EXPORT, &desc->flags)) 215 if (!test_bit(FLAG_EXPORT, &desc->flags)) {
258 status = -EIO; 216 status = -EIO;
259 else 217 } else {
260 gpio_get_direction(gpio); 218 gpio_get_direction(gpio);
261 status = sprintf(buf, "%s\n", 219 status = sprintf(buf, "%s\n",
262 test_bit(FLAG_IS_OUT, &desc->flags) 220 test_bit(FLAG_IS_OUT, &desc->flags)
263 ? "out" : "in"); 221 ? "out" : "in");
222 }
264 223
265 mutex_unlock(&sysfs_lock); 224 mutex_unlock(&sysfs_lock);
266 return status; 225 return status;
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 20ca7663975f..2034e691c7ab 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -152,7 +152,6 @@ struct gpio_chip {
152extern const char *gpiochip_is_requested(struct gpio_chip *chip, 152extern const char *gpiochip_is_requested(struct gpio_chip *chip,
153 unsigned offset); 153 unsigned offset);
154extern struct gpio_chip *gpio_to_chip(unsigned gpio); 154extern struct gpio_chip *gpio_to_chip(unsigned gpio);
155extern int __must_check gpiochip_reserve(int start, int ngpio);
156 155
157/* add/remove chips */ 156/* add/remove chips */
158extern int gpiochip_add(struct gpio_chip *chip); 157extern int gpiochip_add(struct gpio_chip *chip);
@@ -192,12 +191,6 @@ extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *labe
192extern int gpio_request_array(const struct gpio *array, size_t num); 191extern int gpio_request_array(const struct gpio *array, size_t num);
193extern void gpio_free_array(const struct gpio *array, size_t num); 192extern void gpio_free_array(const struct gpio *array, size_t num);
194 193
195/* bindings for managed devices that want to request gpios */
196int devm_gpio_request(struct device *dev, unsigned gpio, const char *label);
197int devm_gpio_request_one(struct device *dev, unsigned gpio,
198 unsigned long flags, const char *label);
199void devm_gpio_free(struct device *dev, unsigned int gpio);
200
201#ifdef CONFIG_GPIO_SYSFS 194#ifdef CONFIG_GPIO_SYSFS
202 195
203/* 196/*
@@ -212,6 +205,43 @@ extern void gpio_unexport(unsigned gpio);
212 205
213#endif /* CONFIG_GPIO_SYSFS */ 206#endif /* CONFIG_GPIO_SYSFS */
214 207
208#ifdef CONFIG_PINCTRL
209
210/**
211 * struct gpio_pin_range - pin range controlled by a gpio chip
212 * @head: list for maintaining set of pin ranges, used internally
213 * @pctldev: pinctrl device which handles corresponding pins
214 * @range: actual range of pins controlled by a gpio controller
215 */
216
217struct gpio_pin_range {
218 struct list_head node;
219 struct pinctrl_dev *pctldev;
220 struct pinctrl_gpio_range range;
221};
222
223int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
224 unsigned int gpio_offset, unsigned int pin_offset,
225 unsigned int npins);
226void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
227
228#else
229
230static inline int
231gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
232 unsigned int gpio_offset, unsigned int pin_offset,
233 unsigned int npins)
234{
235 return 0;
236}
237
238static inline void
239gpiochip_remove_pin_ranges(struct gpio_chip *chip)
240{
241}
242
243#endif /* CONFIG_PINCTRL */
244
215#else /* !CONFIG_GPIOLIB */ 245#else /* !CONFIG_GPIOLIB */
216 246
217static inline bool gpio_is_valid(int number) 247static inline bool gpio_is_valid(int number)
@@ -270,41 +300,4 @@ static inline void gpio_unexport(unsigned gpio)
270} 300}
271#endif /* CONFIG_GPIO_SYSFS */ 301#endif /* CONFIG_GPIO_SYSFS */
272 302
273#ifdef CONFIG_PINCTRL
274
275/**
276 * struct gpio_pin_range - pin range controlled by a gpio chip
277 * @head: list for maintaining set of pin ranges, used internally
278 * @pctldev: pinctrl device which handles corresponding pins
279 * @range: actual range of pins controlled by a gpio controller
280 */
281
282struct gpio_pin_range {
283 struct list_head node;
284 struct pinctrl_dev *pctldev;
285 struct pinctrl_gpio_range range;
286};
287
288int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
289 unsigned int gpio_offset, unsigned int pin_offset,
290 unsigned int npins);
291void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
292
293#else
294
295static inline int
296gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
297 unsigned int gpio_offset, unsigned int pin_offset,
298 unsigned int npins)
299{
300 return 0;
301}
302
303static inline void
304gpiochip_remove_pin_ranges(struct gpio_chip *chip)
305{
306}
307
308#endif /* CONFIG_PINCTRL */
309
310#endif /* _ASM_GENERIC_GPIO_H */ 303#endif /* _ASM_GENERIC_GPIO_H */
diff --git a/include/linux/acpi_gpio.h b/include/linux/acpi_gpio.h
index 91615a389b65..b76ebd08ff8e 100644
--- a/include/linux/acpi_gpio.h
+++ b/include/linux/acpi_gpio.h
@@ -2,10 +2,12 @@
2#define _LINUX_ACPI_GPIO_H_ 2#define _LINUX_ACPI_GPIO_H_
3 3
4#include <linux/errno.h> 4#include <linux/errno.h>
5#include <linux/gpio.h>
5 6
6#ifdef CONFIG_GPIO_ACPI 7#ifdef CONFIG_GPIO_ACPI
7 8
8int acpi_get_gpio(char *path, int pin); 9int acpi_get_gpio(char *path, int pin);
10void acpi_gpiochip_request_interrupts(struct gpio_chip *chip);
9 11
10#else /* CONFIG_GPIO_ACPI */ 12#else /* CONFIG_GPIO_ACPI */
11 13
@@ -14,6 +16,8 @@ static inline int acpi_get_gpio(char *path, int pin)
14 return -ENODEV; 16 return -ENODEV;
15} 17}
16 18
19static inline void acpi_gpiochip_request_interrupts(struct gpio_chip *chip) { }
20
17#endif /* CONFIG_GPIO_ACPI */ 21#endif /* CONFIG_GPIO_ACPI */
18 22
19#endif /* _LINUX_ACPI_GPIO_H_ */ 23#endif /* _LINUX_ACPI_GPIO_H_ */
diff --git a/include/linux/gpio.h b/include/linux/gpio.h
index bfe665621536..f6c7ae3e223b 100644
--- a/include/linux/gpio.h
+++ b/include/linux/gpio.h
@@ -94,24 +94,12 @@ static inline int gpio_request(unsigned gpio, const char *label)
94 return -ENOSYS; 94 return -ENOSYS;
95} 95}
96 96
97static inline int devm_gpio_request(struct device *dev, unsigned gpio,
98 const char *label)
99{
100 return -ENOSYS;
101}
102
103static inline int gpio_request_one(unsigned gpio, 97static inline int gpio_request_one(unsigned gpio,
104 unsigned long flags, const char *label) 98 unsigned long flags, const char *label)
105{ 99{
106 return -ENOSYS; 100 return -ENOSYS;
107} 101}
108 102
109static inline int devm_gpio_request_one(struct device *dev, unsigned gpio,
110 unsigned long flags, const char *label)
111{
112 return -ENOSYS;
113}
114
115static inline int gpio_request_array(const struct gpio *array, size_t num) 103static inline int gpio_request_array(const struct gpio *array, size_t num)
116{ 104{
117 return -ENOSYS; 105 return -ENOSYS;
@@ -125,14 +113,6 @@ static inline void gpio_free(unsigned gpio)
125 WARN_ON(1); 113 WARN_ON(1);
126} 114}
127 115
128static inline void devm_gpio_free(struct device *dev, unsigned gpio)
129{
130 might_sleep();
131
132 /* GPIO can never have been requested */
133 WARN_ON(1);
134}
135
136static inline void gpio_free_array(const struct gpio *array, size_t num) 116static inline void gpio_free_array(const struct gpio *array, size_t num)
137{ 117{
138 might_sleep(); 118 might_sleep();
@@ -248,4 +228,12 @@ gpiochip_remove_pin_ranges(struct gpio_chip *chip)
248 228
249#endif /* ! CONFIG_GENERIC_GPIO */ 229#endif /* ! CONFIG_GENERIC_GPIO */
250 230
231struct device;
232
233/* bindings for managed devices that want to request gpios */
234int devm_gpio_request(struct device *dev, unsigned gpio, const char *label);
235int devm_gpio_request_one(struct device *dev, unsigned gpio,
236 unsigned long flags, const char *label);
237void devm_gpio_free(struct device *dev, unsigned int gpio);
238
251#endif /* __LINUX_GPIO_H */ 239#endif /* __LINUX_GPIO_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 19:19:41 -0400