6 files changed, 25 insertions, 6 deletions

diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index 892728412e9d..24f553673b72 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -932,7 +932,7 @@ static unsigned long si5351_clkout_recalc_rate(struct clk_hw *hw,
         unsigned char reg;
         unsigned char rdiv;
 
-        if (hwdata->num > 5)
+        if (hwdata->num <= 5)
                 reg = si5351_msynth_params_address(hwdata->num) + 2;
         else
                 reg = SI5351_CLK6_7_OUTPUT_DIVIDER;
@@ -1477,6 +1477,16 @@ static int si5351_i2c_probe(struct i2c_client *client,
                         return -EINVAL;
                 }
                 drvdata->onecell.clks[n] = clk;
+
+                /* set initial clkout rate */
+                if (pdata->clkout[n].rate != 0) {
+                        int ret;
+                        ret = clk_set_rate(clk, pdata->clkout[n].rate);
+                        if (ret != 0) {
+                                dev_err(&client->dev, "Cannot set rate : %d\n",
+                                        ret);
+                        }
+                }
         }
 
         ret = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get,
diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c
index debf688afa8e..553ac35bcc91 100644
--- a/drivers/clk/clk-vt8500.c
+++ b/drivers/clk/clk-vt8500.c
@@ -183,7 +183,7 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate,
         writel(divisor, cdev->div_reg);
         vt8500_pmc_wait_busy();
 
-        spin_lock_irqsave(cdev->lock, flags);
+        spin_unlock_irqrestore(cdev->lock, flags);
 
         return 0;
 }
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index d0e5eed146de..4faf0afc44cd 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/clk.h>
+#include <linux/clk/mxs.h>
 #include <linux/clkdev.h>
 #include <linux/err.h>
 #include <linux/init.h>
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index d0940e69d034..3c1f88868f29 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -791,7 +791,8 @@ struct samsung_gate_clock exynos4210_gate_clks[] __initdata = {
         GATE(smmu_pcie, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0),
         GATE(modemif, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0),
         GATE(chipid, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0),
-        GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0),
+        GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0,
+                        CLK_IGNORE_UNUSED, 0),
         GATE(hdmi_cec, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0, 0),
         GATE(smmu_rotator, "smmu_rotator", "aclk200",
                         E4210_GATE_IP_IMAGE, 4, 0, 0),
@@ -819,7 +820,8 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = {
         GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0, 0),
         GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0),
         GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0),
-        GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, 0, 0),
+        GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1,
+                        CLK_IGNORE_UNUSED, 0),
         GATE(hdmi_cec, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0, 0),
         GATE(sclk_mdnie0, "sclk_mdnie0", "div_mdnie0",
                         SRC_MASK_LCD0, 4, CLK_SET_RATE_PARENT, 0),
diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c
index bc7e9bde792b..e364c9d4aa60 100644
--- a/drivers/clk/ux500/clk-sysctrl.c
+++ b/drivers/clk/ux500/clk-sysctrl.c
@@ -145,7 +145,13 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
                 return ERR_PTR(-ENOMEM);
         }
 
-        for (i = 0; i < num_parents; i++) {
+        /* set main clock registers */
+        clk->reg_sel[0] = reg_sel[0];
+        clk->reg_bits[0] = reg_bits[0];
+        clk->reg_mask[0] = reg_mask[0];
+
+        /* handle clocks with more than one parent */
+        for (i = 1; i < num_parents; i++) {
                 clk->reg_sel[i] = reg_sel[i];
                 clk->reg_bits[i] = reg_bits[i];
                 clk->reg_mask[i] = reg_mask[i];
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 0b4f35a5ffc2..80069c370a47 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -325,7 +325,7 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
         clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base,
                                 BIT(0), 0);
         clk_register_clkdev(clk, "fsmc", NULL);
-        clk_register_clkdev(clk, NULL, "smsc911x");
+        clk_register_clkdev(clk, NULL, "smsc911x.0");
 
         clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base,
                                 BIT(1), 0);