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-rw-r--r--arch/ppc/mm/44x_mmu.c4
-rw-r--r--include/asm-ppc/ibm44x.h2
-rw-r--r--include/asm-ppc/mpc8xx.h2
-rw-r--r--include/asm-ppc/pgtable.h6
4 files changed, 8 insertions, 6 deletions
diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c
index 3d79ce281b67..e0152a9b26e6 100644
--- a/arch/ppc/mm/44x_mmu.c
+++ b/arch/ppc/mm/44x_mmu.c
@@ -104,7 +104,7 @@ unsigned long __init mmu_mapin_ram(void)
104 104
105 /* Determine number of entries necessary to cover lowmem */ 105 /* Determine number of entries necessary to cover lowmem */
106 pinned_tlbs = (unsigned int) 106 pinned_tlbs = (unsigned int)
107 (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT); 107 (_ALIGN(total_lowmem, PPC_PIN_SIZE) >> PPC44x_PIN_SHIFT);
108 108
109 /* Write upper watermark to save location */ 109 /* Write upper watermark to save location */
110 tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs; 110 tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
@@ -112,7 +112,7 @@ unsigned long __init mmu_mapin_ram(void)
112 /* If necessary, set additional pinned TLBs */ 112 /* If necessary, set additional pinned TLBs */
113 if (pinned_tlbs > 1) 113 if (pinned_tlbs > 1)
114 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) { 114 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
115 unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE; 115 unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC_PIN_SIZE;
116 ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr); 116 ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
117 } 117 }
118 118
diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h
index f835066fb3ca..3acc382cc83f 100644
--- a/include/asm-ppc/ibm44x.h
+++ b/include/asm-ppc/ibm44x.h
@@ -29,7 +29,7 @@
29 29
30/* TLB entry offset/size used for pinning kernel lowmem */ 30/* TLB entry offset/size used for pinning kernel lowmem */
31#define PPC44x_PIN_SHIFT 28 31#define PPC44x_PIN_SHIFT 28
32#define PPC44x_PIN_SIZE (1 << PPC44x_PIN_SHIFT) 32#define PPC_PIN_SIZE (1 << PPC44x_PIN_SHIFT)
33 33
34/* Lowest TLB slot consumed by the default pinned TLBs */ 34/* Lowest TLB slot consumed by the default pinned TLBs */
35#define PPC44x_LOW_SLOT 63 35#define PPC44x_LOW_SLOT 63
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index 46f159cf589e..73ec9a6db0b1 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -113,6 +113,8 @@ enum ppc_sys_devices {
113 MPC8xx_CPM_USB, 113 MPC8xx_CPM_USB,
114}; 114};
115 115
116#define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */
117
116#ifndef BOARD_CHIP_NAME 118#ifndef BOARD_CHIP_NAME
117#define BOARD_CHIP_NAME "" 119#define BOARD_CHIP_NAME ""
118#endif 120#endif
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index 6d1c39e8a6af..e1c62da12e74 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -12,6 +12,7 @@
12#include <asm/processor.h> /* For TASK_SIZE */ 12#include <asm/processor.h> /* For TASK_SIZE */
13#include <asm/mmu.h> 13#include <asm/mmu.h>
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/io.h> /* For sub-arch specific PPC_PIN_SIZE */
15struct mm_struct; 16struct mm_struct;
16 17
17extern unsigned long va_to_phys(unsigned long address); 18extern unsigned long va_to_phys(unsigned long address);
@@ -127,9 +128,8 @@ extern unsigned long ioremap_bot, ioremap_base;
127 * of RAM. -- Cort 128 * of RAM. -- Cort
128 */ 129 */
129#define VMALLOC_OFFSET (0x1000000) /* 16M */ 130#define VMALLOC_OFFSET (0x1000000) /* 16M */
130#ifdef CONFIG_44x 131#ifdef PPC_PIN_SIZE
131#include <asm/ibm44x.h> 132#define VMALLOC_START (((_ALIGN((long)high_memory, PPC_PIN_SIZE) + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)))
132#define VMALLOC_START (((_ALIGN((long)high_memory, PPC44x_PIN_SIZE) + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)))
133#else 133#else
134#define VMALLOC_START ((((long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))) 134#define VMALLOC_START ((((long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)))
135#endif 135#endif