diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreend.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/rv770d.h | 1 |
4 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 5d9c2c64a8e2..0408ac27a863 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -1029,6 +1029,11 @@ int evergreen_pcie_gart_enable(struct radeon_device *rdev) | |||
| 1029 | WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); | 1029 | WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); |
| 1030 | WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp); | 1030 | WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp); |
| 1031 | WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); | 1031 | WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); |
| 1032 | if ((rdev->family == CHIP_JUNIPER) || | ||
| 1033 | (rdev->family == CHIP_CYPRESS) || | ||
| 1034 | (rdev->family == CHIP_HEMLOCK) || | ||
| 1035 | (rdev->family == CHIP_BARTS)) | ||
| 1036 | WREG32(MC_VM_MD_L1_TLB3_CNTL, tmp); | ||
| 1032 | } | 1037 | } |
| 1033 | WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); | 1038 | WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); |
| 1034 | WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp); | 1039 | WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp); |
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index 79130bfd1d6f..3dd43e760362 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
| @@ -452,6 +452,7 @@ | |||
| 452 | #define MC_VM_MD_L1_TLB0_CNTL 0x2654 | 452 | #define MC_VM_MD_L1_TLB0_CNTL 0x2654 |
| 453 | #define MC_VM_MD_L1_TLB1_CNTL 0x2658 | 453 | #define MC_VM_MD_L1_TLB1_CNTL 0x2658 |
| 454 | #define MC_VM_MD_L1_TLB2_CNTL 0x265C | 454 | #define MC_VM_MD_L1_TLB2_CNTL 0x265C |
| 455 | #define MC_VM_MD_L1_TLB3_CNTL 0x2698 | ||
| 455 | 456 | ||
| 456 | #define FUS_MC_VM_MD_L1_TLB0_CNTL 0x265C | 457 | #define FUS_MC_VM_MD_L1_TLB0_CNTL 0x265C |
| 457 | #define FUS_MC_VM_MD_L1_TLB1_CNTL 0x2660 | 458 | #define FUS_MC_VM_MD_L1_TLB1_CNTL 0x2660 |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index c824d49305a4..c12349dba3a2 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
| @@ -151,6 +151,8 @@ int rv770_pcie_gart_enable(struct radeon_device *rdev) | |||
| 151 | WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); | 151 | WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); |
| 152 | WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp); | 152 | WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp); |
| 153 | WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); | 153 | WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); |
| 154 | if (rdev->family == CHIP_RV740) | ||
| 155 | WREG32(MC_VM_MD_L1_TLB3_CNTL, tmp); | ||
| 154 | WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); | 156 | WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp); |
| 155 | WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp); | 157 | WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp); |
| 156 | WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp); | 158 | WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp); |
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h index 9c549f702f2f..7addbef54b42 100644 --- a/drivers/gpu/drm/radeon/rv770d.h +++ b/drivers/gpu/drm/radeon/rv770d.h | |||
| @@ -174,6 +174,7 @@ | |||
| 174 | #define MC_VM_MD_L1_TLB0_CNTL 0x2654 | 174 | #define MC_VM_MD_L1_TLB0_CNTL 0x2654 |
| 175 | #define MC_VM_MD_L1_TLB1_CNTL 0x2658 | 175 | #define MC_VM_MD_L1_TLB1_CNTL 0x2658 |
| 176 | #define MC_VM_MD_L1_TLB2_CNTL 0x265C | 176 | #define MC_VM_MD_L1_TLB2_CNTL 0x265C |
| 177 | #define MC_VM_MD_L1_TLB3_CNTL 0x2698 | ||
| 177 | #define MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203C | 178 | #define MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203C |
| 178 | #define MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038 | 179 | #define MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038 |
| 179 | #define MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034 | 180 | #define MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034 |
