diff options
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 16 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 28 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 20 |
3 files changed, 27 insertions, 37 deletions
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c index 732087dcac91..5c50aa8a8908 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | |||
| @@ -141,8 +141,6 @@ static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p, | |||
| 141 | static int set_queue_properties_from_user(struct queue_properties *q_properties, | 141 | static int set_queue_properties_from_user(struct queue_properties *q_properties, |
| 142 | struct kfd_ioctl_create_queue_args *args) | 142 | struct kfd_ioctl_create_queue_args *args) |
| 143 | { | 143 | { |
| 144 | void *tmp; | ||
| 145 | |||
| 146 | if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) { | 144 | if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) { |
| 147 | pr_err("kfd: queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); | 145 | pr_err("kfd: queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n"); |
| 148 | return -EINVAL; | 146 | return -EINVAL; |
| @@ -180,16 +178,18 @@ static int set_queue_properties_from_user(struct queue_properties *q_properties, | |||
| 180 | return -EFAULT; | 178 | return -EFAULT; |
| 181 | } | 179 | } |
| 182 | 180 | ||
| 183 | tmp = (void *)(uintptr_t)args->eop_buffer_address; | 181 | if (args->eop_buffer_address && |
| 184 | if (tmp != NULL && | 182 | !access_ok(VERIFY_WRITE, |
| 185 | !access_ok(VERIFY_WRITE, tmp, sizeof(uint32_t))) { | 183 | (const void __user *) args->eop_buffer_address, |
| 184 | sizeof(uint32_t))) { | ||
| 186 | pr_debug("kfd: can't access eop buffer"); | 185 | pr_debug("kfd: can't access eop buffer"); |
| 187 | return -EFAULT; | 186 | return -EFAULT; |
| 188 | } | 187 | } |
| 189 | 188 | ||
| 190 | tmp = (void *)(uintptr_t)args->ctx_save_restore_address; | 189 | if (args->ctx_save_restore_address && |
| 191 | if (tmp != NULL && | 190 | !access_ok(VERIFY_WRITE, |
| 192 | !access_ok(VERIFY_WRITE, tmp, sizeof(uint32_t))) { | 191 | (const void __user *) args->ctx_save_restore_address, |
| 192 | sizeof(uint32_t))) { | ||
| 193 | pr_debug("kfd: can't access ctx save restore buffer"); | 193 | pr_debug("kfd: can't access ctx save restore buffer"); |
| 194 | return -EFAULT; | 194 | return -EFAULT; |
| 195 | } | 195 | } |
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c index 99e2dbbb4862..b189f9791c90 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | |||
| @@ -62,12 +62,6 @@ enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type) | |||
| 62 | return KFD_MQD_TYPE_CP; | 62 | return KFD_MQD_TYPE_CP; |
| 63 | } | 63 | } |
| 64 | 64 | ||
| 65 | inline unsigned int get_pipes_num(struct device_queue_manager *dqm) | ||
| 66 | { | ||
| 67 | BUG_ON(!dqm || !dqm->dev); | ||
| 68 | return dqm->dev->shared_resources.compute_pipe_count; | ||
| 69 | } | ||
| 70 | |||
| 71 | static inline unsigned int get_first_pipe(struct device_queue_manager *dqm) | 65 | static inline unsigned int get_first_pipe(struct device_queue_manager *dqm) |
| 72 | { | 66 | { |
| 73 | BUG_ON(!dqm); | 67 | BUG_ON(!dqm); |
| @@ -79,25 +73,6 @@ static inline unsigned int get_pipes_num_cpsch(void) | |||
| 79 | return PIPE_PER_ME_CP_SCHEDULING; | 73 | return PIPE_PER_ME_CP_SCHEDULING; |
| 80 | } | 74 | } |
| 81 | 75 | ||
| 82 | inline unsigned int | ||
| 83 | get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd) | ||
| 84 | { | ||
| 85 | uint32_t nybble; | ||
| 86 | |||
| 87 | nybble = (pdd->lds_base >> 60) & 0x0E; | ||
| 88 | |||
| 89 | return nybble; | ||
| 90 | } | ||
| 91 | |||
| 92 | inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd) | ||
| 93 | { | ||
| 94 | unsigned int shared_base; | ||
| 95 | |||
| 96 | shared_base = (pdd->lds_base >> 16) & 0xFF; | ||
| 97 | |||
| 98 | return shared_base; | ||
| 99 | } | ||
| 100 | |||
| 101 | void program_sh_mem_settings(struct device_queue_manager *dqm, | 76 | void program_sh_mem_settings(struct device_queue_manager *dqm, |
| 102 | struct qcm_process_device *qpd) | 77 | struct qcm_process_device *qpd) |
| 103 | { | 78 | { |
| @@ -336,7 +311,8 @@ static int update_queue(struct device_queue_manager *dqm, struct queue *q) | |||
| 336 | BUG_ON(!dqm || !q || !q->mqd); | 311 | BUG_ON(!dqm || !q || !q->mqd); |
| 337 | 312 | ||
| 338 | mutex_lock(&dqm->lock); | 313 | mutex_lock(&dqm->lock); |
| 339 | mqd = dqm->ops.get_mqd_manager(dqm, q->properties.type); | 314 | mqd = dqm->ops.get_mqd_manager(dqm, |
| 315 | get_mqd_type_from_queue_type(q->properties.type)); | ||
| 340 | if (mqd == NULL) { | 316 | if (mqd == NULL) { |
| 341 | mutex_unlock(&dqm->lock); | 317 | mutex_unlock(&dqm->lock); |
| 342 | return -ENOMEM; | 318 | return -ENOMEM; |
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h index 19347956eeb9..e7b17b28330e 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | |||
| @@ -160,10 +160,24 @@ void device_queue_manager_init_cik(struct device_queue_manager_ops *ops); | |||
| 160 | void device_queue_manager_init_vi(struct device_queue_manager_ops *ops); | 160 | void device_queue_manager_init_vi(struct device_queue_manager_ops *ops); |
| 161 | void program_sh_mem_settings(struct device_queue_manager *dqm, | 161 | void program_sh_mem_settings(struct device_queue_manager *dqm, |
| 162 | struct qcm_process_device *qpd); | 162 | struct qcm_process_device *qpd); |
| 163 | inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *qpd); | ||
| 164 | inline unsigned int get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd); | ||
| 165 | int init_pipelines(struct device_queue_manager *dqm, | 163 | int init_pipelines(struct device_queue_manager *dqm, |
| 166 | unsigned int pipes_num, unsigned int first_pipe); | 164 | unsigned int pipes_num, unsigned int first_pipe); |
| 167 | inline unsigned int get_pipes_num(struct device_queue_manager *dqm); | 165 | |
| 166 | extern inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd) | ||
| 167 | { | ||
| 168 | return (pdd->lds_base >> 16) & 0xFF; | ||
| 169 | } | ||
| 170 | |||
| 171 | extern inline unsigned int | ||
| 172 | get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd) | ||
| 173 | { | ||
| 174 | return (pdd->lds_base >> 60) & 0x0E; | ||
| 175 | } | ||
| 176 | |||
| 177 | extern inline unsigned int get_pipes_num(struct device_queue_manager *dqm) | ||
| 178 | { | ||
| 179 | BUG_ON(!dqm || !dqm->dev); | ||
| 180 | return dqm->dev->shared_resources.compute_pipe_count; | ||
| 181 | } | ||
| 168 | 182 | ||
| 169 | #endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */ | 183 | #endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */ |
