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-rw-r--r--Documentation/mips/00-INDEX2
-rw-r--r--Documentation/mips/time.README173
-rw-r--r--arch/mips/bcm47xx/time.c7
-rw-r--r--arch/mips/configs/mipssim_defconfig532
-rw-r--r--arch/mips/emma2rh/markeins/setup.c6
-rw-r--r--arch/mips/kernel/cevt-r4k.c1
-rw-r--r--arch/mips/kernel/time.c92
-rw-r--r--arch/mips/lemote/lm2e/setup.c5
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_time.c3
-rw-r--r--arch/mips/pmc-sierra/yosemite/setup.c5
-rw-r--r--arch/mips/sibyte/bcm1480/smp.c5
-rw-r--r--arch/mips/sibyte/bcm1480/time.c74
-rw-r--r--arch/mips/sibyte/sb1250/irq.c36
-rw-r--r--arch/mips/sibyte/sb1250/smp.c5
-rw-r--r--arch/mips/sibyte/sb1250/time.c104
-rw-r--r--arch/mips/sibyte/swarm/setup.c25
-rw-r--r--arch/mips/sni/time.c18
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c16
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c10
-rw-r--r--arch/mips/tx4938/common/setup.c5
-rw-r--r--arch/mips/vr41xx/common/init.c5
-rw-r--r--include/asm-mips/sni.h2
-rw-r--r--include/asm-mips/time.h5
23 files changed, 254 insertions, 882 deletions
diff --git a/Documentation/mips/00-INDEX b/Documentation/mips/00-INDEX
index 9df8a2eac7b4..3f13bf8043d2 100644
--- a/Documentation/mips/00-INDEX
+++ b/Documentation/mips/00-INDEX
@@ -4,5 +4,3 @@ AU1xxx_IDE.README
4 - README for MIPS AU1XXX IDE driver. 4 - README for MIPS AU1XXX IDE driver.
5GT64120.README 5GT64120.README
6 - README for dir with info on MIPS boards using GT-64120 or GT-64120A. 6 - README for dir with info on MIPS boards using GT-64120 or GT-64120A.
7time.README
8 - README for MIPS time services.
diff --git a/Documentation/mips/time.README b/Documentation/mips/time.README
deleted file mode 100644
index a4ce603ed3b3..000000000000
--- a/Documentation/mips/time.README
+++ /dev/null
@@ -1,173 +0,0 @@
1README for MIPS time services
2
3Jun Sun
4jsun@mvista.com or jsun@junsun.net
5
6
7ABOUT
8-----
9This file describes the new arch/mips/kernel/time.c, related files and the
10services they provide.
11
12If you are short in patience and just want to know how to use time.c for a
13new board or convert an existing board, go to the last section.
14
15
16FILES, COMPATABILITY AND CONFIGS
17---------------------------------
18
19The old arch/mips/kernel/time.c is renamed to old-time.c.
20
21A new time.c is put there, together with include/asm-mips/time.h.
22
23Two configs variables are introduced, CONFIG_OLD_TIME_C and CONFIG_NEW_TIME_C.
24So we allow boards using
25
26 1) old time.c (CONFIG_OLD_TIME_C)
27 2) new time.c (CONFIG_NEW_TIME_C)
28 3) neither (their own private time.c)
29
30However, it is expected every board will move to the new time.c in the near
31future.
32
33
34WHAT THE NEW CODE PROVIDES?
35---------------------------
36
37The new time code provide the following services:
38
39 a) Implements functions required by Linux common code:
40 time_init
41
42 b) provides an abstraction of RTC and null RTC implementation as default.
43 extern unsigned long (*rtc_get_time)(void);
44 extern int (*rtc_set_time)(unsigned long);
45
46 c) high-level and low-level timer interrupt routines where the timer
47 interrupt source may or may not be the CPU timer. The high-level
48 routine is dispatched through do_IRQ() while the low-level is
49 dispatched in assemably code (usually int-handler.S)
50
51
52WHAT THE NEW CODE REQUIRES?
53---------------------------
54
55For the new code to work properly, each board implementation needs to supply
56the following functions or values:
57
58 a) board_time_init - a function pointer. Invoked at the beginnig of
59 time_init(). It is optional.
60 1. (optional) set up RTC routines
61 2. (optional) calibrate and set the mips_hpt_frequency
62
63 b) plat_timer_setup - a function pointer. Invoked at the end of time_init()
64 1. (optional) over-ride any decisions made in time_init()
65 2. set up the irqaction for timer interrupt.
66 3. enable the timer interrupt
67
68 c) (optional) board-specific RTC routines.
69
70 d) (optional) mips_hpt_frequency - It must be definied if the board
71 is using CPU counter for timer interrupt.
72
73
74PORTING GUIDE
75-------------
76
77Step 1: decide how you like to implement the time services.
78
79 a) does this board have a RTC? If yes, implement the two RTC funcs.
80
81 b) does the CPU have counter/compare registers?
82
83 If the answer is no, you need a timer to provide the timer interrupt
84 at 100 HZ speed.
85
86 c) The following sub steps assume your CPU has counter register.
87 Do you plan to use the CPU counter register as the timer interrupt
88 or use an exnternal timer?
89
90 In order to use CPU counter register as the timer interrupt source, you
91 must know the counter speed (mips_hpt_frequency). It is usually the
92 same as the CPU speed or an integral divisor of it.
93
94 d) decide on whether you want to use high-level or low-level timer
95 interrupt routines. The low-level one is presumably faster, but should
96 not make too mcuh difference.
97
98
99Step 2: the machine setup() function
100
101 If you supply board_time_init(), set the function poointer.
102
103
104Step 3: implement rtc routines, board_time_init() and plat_timer_setup()
105 if needed.
106
107 board_time_init() -
108 a) (optional) set up RTC routines,
109 b) (optional) calibrate and set the mips_hpt_frequency
110 (only needed if you intended to use cpu counter as timer interrupt
111 source)
112
113 plat_timer_setup() -
114 a) (optional) over-write any choices made above by time_init().
115 b) machine specific code should setup the timer irqaction.
116 c) enable the timer interrupt
117
118
119 If the RTC chip is a common chip, I suggest the routines are put under
120 arch/mips/libs. For example, for DS1386 chip, one would create
121 rtc-ds1386.c under arch/mips/lib directory. Add the following line to
122 the arch/mips/lib/Makefile:
123
124 obj-$(CONFIG_DDB5476) += rtc-ds1386.o
125
126Step 4: if you are using low-level timer interrupt, change your interrupt
127 dispathcing code to check for timer interrupt and jump to
128 ll_timer_interrupt() directly if one is detected.
129
130Step 5: Modify arch/mips/config.in and add CONFIG_NEW_TIME_C to your machine.
131 Modify the appropriate defconfig if applicable.
132
133Final notes:
134
135For some tricky cases, you may need to add your own wrapper functions
136for some of the functions in time.c.
137
138For example, you may define your own timer interrupt routine, which does
139some of its own processing and then calls timer_interrupt().
140
141You can also over-ride any of the built-in functions (RTC routines
142and/or timer interrupt routine).
143
144
145PORTING NOTES FOR SMP
146----------------------
147
148If you have a SMP box, things are slightly more complicated.
149
150The time service running every jiffy is logically divided into two parts:
151
152 1) the one for the whole system (defined in timer_interrupt())
153 2) the one that should run for each CPU (defined in local_timer_interrupt())
154
155You need to decide on your timer interrupt sources.
156
157 case 1) - whole system has only one timer interrupt delivered to one CPU
158
159 In this case, you set up timer interrupt as in UP systems. In addtion,
160 you need to set emulate_local_timer_interrupt to 1 so that other
161 CPUs get to call local_timer_interrupt().
162
163 THIS IS CURRENTLY NOT IMPLEMNETED. However, it is rather easy to write
164 one should such a need arise. You simply make a IPI call.
165
166 case 2) - each CPU has a separate timer interrupt
167
168 In this case, you need to set up IRQ such that each of them will
169 call local_timer_interrupt(). In addition, you need to arrange
170 one and only one of them to call timer_interrupt().
171
172 You can also do the low-level version of those interrupt routines,
173 following similar dispatching routes described above.
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
index 0ab4676c8bd3..0c6f47b3fd94 100644
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -46,10 +46,3 @@ void __init plat_time_init(void)
46 /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */ 46 /* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
47 mips_hpt_frequency = hz; 47 mips_hpt_frequency = hz;
48} 48}
49
50void __init
51plat_timer_setup(struct irqaction *irq)
52{
53 /* Enable the timer interrupt */
54 setup_irq(7, irq);
55}
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index 86dcb7464353..61b72f5a953e 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -1,71 +1,68 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20 3# Linux kernel version: 2.6.23
4# Tue Feb 20 21:47:35 2007 4# Thu Oct 18 22:45:52 2007
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
8# 8#
9# Machine selection 9# Machine selection
10# 10#
11CONFIG_ZONE_DMA=y 11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_MIPS_MTX1 is not set
13# CONFIG_MIPS_BOSPORUS is not set
14# CONFIG_MIPS_PB1000 is not set
15# CONFIG_MIPS_PB1100 is not set
16# CONFIG_MIPS_PB1500 is not set
17# CONFIG_MIPS_PB1550 is not set
18# CONFIG_MIPS_PB1200 is not set
19# CONFIG_MIPS_DB1000 is not set
20# CONFIG_MIPS_DB1100 is not set
21# CONFIG_MIPS_DB1500 is not set
22# CONFIG_MIPS_DB1550 is not set
23# CONFIG_MIPS_DB1200 is not set
24# CONFIG_MIPS_MIRAGE is not set
25# CONFIG_BASLER_EXCITE is not set 12# CONFIG_BASLER_EXCITE is not set
13# CONFIG_BCM47XX is not set
26# CONFIG_MIPS_COBALT is not set 14# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set 15# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MACH_JAZZ is not set 16# CONFIG_MACH_JAZZ is not set
17# CONFIG_LASAT is not set
18# CONFIG_LEMOTE_FULONG is not set
29# CONFIG_MIPS_ATLAS is not set 19# CONFIG_MIPS_ATLAS is not set
30# CONFIG_MIPS_MALTA is not set 20# CONFIG_MIPS_MALTA is not set
31# CONFIG_MIPS_SEAD is not set 21# CONFIG_MIPS_SEAD is not set
32# CONFIG_WR_PPMC is not set
33CONFIG_MIPS_SIM=y 22CONFIG_MIPS_SIM=y
34# CONFIG_MOMENCO_JAGUAR_ATX is not set 23# CONFIG_MARKEINS is not set
35# CONFIG_MIPS_XXS1500 is not set 24# CONFIG_MACH_VR41XX is not set
36# CONFIG_PNX8550_JBS is not set 25# CONFIG_PNX8550_JBS is not set
37# CONFIG_PNX8550_STB810 is not set 26# CONFIG_PNX8550_STB810 is not set
38# CONFIG_MACH_VR41XX is not set 27# CONFIG_PMC_MSP is not set
39# CONFIG_PMC_YOSEMITE is not set 28# CONFIG_PMC_YOSEMITE is not set
40# CONFIG_QEMU is not set 29# CONFIG_QEMU is not set
41# CONFIG_MARKEINS is not set
42# CONFIG_SGI_IP22 is not set 30# CONFIG_SGI_IP22 is not set
43# CONFIG_SGI_IP27 is not set 31# CONFIG_SGI_IP27 is not set
44# CONFIG_SGI_IP32 is not set 32# CONFIG_SGI_IP32 is not set
45# CONFIG_SIBYTE_BIGSUR is not set 33# CONFIG_SIBYTE_CRHINE is not set
34# CONFIG_SIBYTE_CARMEL is not set
35# CONFIG_SIBYTE_CRHONE is not set
36# CONFIG_SIBYTE_RHONE is not set
46# CONFIG_SIBYTE_SWARM is not set 37# CONFIG_SIBYTE_SWARM is not set
38# CONFIG_SIBYTE_LITTLESUR is not set
47# CONFIG_SIBYTE_SENTOSA is not set 39# CONFIG_SIBYTE_SENTOSA is not set
48# CONFIG_SIBYTE_RHONE is not set
49# CONFIG_SIBYTE_CARMEL is not set
50# CONFIG_SIBYTE_PTSWARM is not set 40# CONFIG_SIBYTE_PTSWARM is not set
51# CONFIG_SIBYTE_LITTLESUR is not set 41# CONFIG_SIBYTE_BIGSUR is not set
52# CONFIG_SIBYTE_CRHINE is not set
53# CONFIG_SIBYTE_CRHONE is not set
54# CONFIG_SNI_RM is not set 42# CONFIG_SNI_RM is not set
55# CONFIG_TOSHIBA_JMR3927 is not set 43# CONFIG_TOSHIBA_JMR3927 is not set
56# CONFIG_TOSHIBA_RBTX4927 is not set 44# CONFIG_TOSHIBA_RBTX4927 is not set
57# CONFIG_TOSHIBA_RBTX4938 is not set 45# CONFIG_TOSHIBA_RBTX4938 is not set
46# CONFIG_WR_PPMC is not set
58CONFIG_RWSEM_GENERIC_SPINLOCK=y 47CONFIG_RWSEM_GENERIC_SPINLOCK=y
59# CONFIG_ARCH_HAS_ILOG2_U32 is not set 48# CONFIG_ARCH_HAS_ILOG2_U32 is not set
60# CONFIG_ARCH_HAS_ILOG2_U64 is not set 49# CONFIG_ARCH_HAS_ILOG2_U64 is not set
61CONFIG_GENERIC_FIND_NEXT_BIT=y 50CONFIG_GENERIC_FIND_NEXT_BIT=y
62CONFIG_GENERIC_HWEIGHT=y 51CONFIG_GENERIC_HWEIGHT=y
63CONFIG_GENERIC_CALIBRATE_DELAY=y 52CONFIG_GENERIC_CALIBRATE_DELAY=y
53CONFIG_GENERIC_CLOCKEVENTS=y
64CONFIG_GENERIC_TIME=y 54CONFIG_GENERIC_TIME=y
55CONFIG_GENERIC_CMOS_UPDATE=y
65CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 56CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
66# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 57# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
58CONFIG_BOOT_RAW=y
59CONFIG_CEVT_R4K=y
67CONFIG_DMA_NONCOHERENT=y 60CONFIG_DMA_NONCOHERENT=y
68CONFIG_DMA_NEED_PCI_MAP_STATE=y 61CONFIG_DMA_NEED_PCI_MAP_STATE=y
62CONFIG_EARLY_PRINTK=y
63CONFIG_SYS_HAS_EARLY_PRINTK=y
64# CONFIG_HOTPLUG_CPU is not set
65# CONFIG_NO_IOPORT is not set
69# CONFIG_CPU_BIG_ENDIAN is not set 66# CONFIG_CPU_BIG_ENDIAN is not set
70CONFIG_CPU_LITTLE_ENDIAN=y 67CONFIG_CPU_LITTLE_ENDIAN=y
71CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y 68CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
@@ -76,6 +73,11 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
76# 73#
77# CPU selection 74# CPU selection
78# 75#
76# CONFIG_TICK_ONESHOT is not set
77# CONFIG_NO_HZ is not set
78# CONFIG_HIGH_RES_TIMERS is not set
79CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
80# CONFIG_CPU_LOONGSON2 is not set
79CONFIG_CPU_MIPS32_R1=y 81CONFIG_CPU_MIPS32_R1=y
80# CONFIG_CPU_MIPS32_R2 is not set 82# CONFIG_CPU_MIPS32_R2 is not set
81# CONFIG_CPU_MIPS64_R1 is not set 83# CONFIG_CPU_MIPS64_R1 is not set
@@ -115,8 +117,8 @@ CONFIG_CPU_HAS_PREFETCH=y
115CONFIG_MIPS_MT_DISABLED=y 117CONFIG_MIPS_MT_DISABLED=y
116# CONFIG_MIPS_MT_SMP is not set 118# CONFIG_MIPS_MT_SMP is not set
117# CONFIG_MIPS_MT_SMTC is not set 119# CONFIG_MIPS_MT_SMTC is not set
120CONFIG_SYS_SUPPORTS_MULTITHREADING=y
118# CONFIG_MIPS_VPE_LOADER is not set 121# CONFIG_MIPS_VPE_LOADER is not set
119# CONFIG_64BIT_PHYS_ADDR is not set
120CONFIG_CPU_HAS_LLSC=y 122CONFIG_CPU_HAS_LLSC=y
121CONFIG_CPU_HAS_SYNC=y 123CONFIG_CPU_HAS_SYNC=y
122CONFIG_GENERIC_HARDIRQS=y 124CONFIG_GENERIC_HARDIRQS=y
@@ -130,50 +132,52 @@ CONFIG_FLATMEM_MANUAL=y
130CONFIG_FLATMEM=y 132CONFIG_FLATMEM=y
131CONFIG_FLAT_NODE_MEM_MAP=y 133CONFIG_FLAT_NODE_MEM_MAP=y
132# CONFIG_SPARSEMEM_STATIC is not set 134# CONFIG_SPARSEMEM_STATIC is not set
135# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
133CONFIG_SPLIT_PTLOCK_CPUS=4 136CONFIG_SPLIT_PTLOCK_CPUS=4
134# CONFIG_RESOURCES_64BIT is not set 137# CONFIG_RESOURCES_64BIT is not set
135CONFIG_ZONE_DMA_FLAG=1 138CONFIG_ZONE_DMA_FLAG=0
139CONFIG_VIRT_TO_BUS=y
136# CONFIG_HZ_48 is not set 140# CONFIG_HZ_48 is not set
137# CONFIG_HZ_100 is not set 141CONFIG_HZ_100=y
138# CONFIG_HZ_128 is not set 142# CONFIG_HZ_128 is not set
139# CONFIG_HZ_250 is not set 143# CONFIG_HZ_250 is not set
140# CONFIG_HZ_256 is not set 144# CONFIG_HZ_256 is not set
141CONFIG_HZ_1000=y 145# CONFIG_HZ_1000 is not set
142# CONFIG_HZ_1024 is not set 146# CONFIG_HZ_1024 is not set
143CONFIG_SYS_SUPPORTS_ARBIT_HZ=y 147CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
144CONFIG_HZ=1000 148CONFIG_HZ=100
145CONFIG_PREEMPT_NONE=y 149CONFIG_PREEMPT_NONE=y
146# CONFIG_PREEMPT_VOLUNTARY is not set 150# CONFIG_PREEMPT_VOLUNTARY is not set
147# CONFIG_PREEMPT is not set 151# CONFIG_PREEMPT is not set
148# CONFIG_KEXEC is not set 152# CONFIG_KEXEC is not set
153# CONFIG_SECCOMP is not set
149CONFIG_LOCKDEP_SUPPORT=y 154CONFIG_LOCKDEP_SUPPORT=y
150CONFIG_STACKTRACE_SUPPORT=y 155CONFIG_STACKTRACE_SUPPORT=y
151CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 156CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
152 157
153# 158#
154# Code maturity level options 159# General setup
155# 160#
156CONFIG_EXPERIMENTAL=y 161CONFIG_EXPERIMENTAL=y
157CONFIG_BROKEN_ON_SMP=y 162CONFIG_BROKEN_ON_SMP=y
158CONFIG_INIT_ENV_ARG_LIMIT=32 163CONFIG_INIT_ENV_ARG_LIMIT=32
159
160#
161# General setup
162#
163CONFIG_LOCALVERSION="" 164CONFIG_LOCALVERSION=""
164CONFIG_LOCALVERSION_AUTO=y 165CONFIG_LOCALVERSION_AUTO=y
165CONFIG_SWAP=y 166# CONFIG_SWAP is not set
166CONFIG_SYSVIPC=y 167CONFIG_SYSVIPC=y
167# CONFIG_IPC_NS is not set
168CONFIG_SYSVIPC_SYSCTL=y 168CONFIG_SYSVIPC_SYSCTL=y
169# CONFIG_POSIX_MQUEUE is not set 169# CONFIG_POSIX_MQUEUE is not set
170# CONFIG_BSD_PROCESS_ACCT is not set 170# CONFIG_BSD_PROCESS_ACCT is not set
171# CONFIG_TASKSTATS is not set 171# CONFIG_TASKSTATS is not set
172# CONFIG_UTS_NS is not set 172# CONFIG_USER_NS is not set
173# CONFIG_AUDIT is not set 173# CONFIG_AUDIT is not set
174# CONFIG_IKCONFIG is not set 174# CONFIG_IKCONFIG is not set
175CONFIG_LOG_BUF_SHIFT=14
176CONFIG_FAIR_GROUP_SCHED=y
177CONFIG_FAIR_USER_SCHED=y
175CONFIG_SYSFS_DEPRECATED=y 178CONFIG_SYSFS_DEPRECATED=y
176# CONFIG_RELAY is not set 179# CONFIG_RELAY is not set
180# CONFIG_BLK_DEV_INITRD is not set
177# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 181# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
178CONFIG_SYSCTL=y 182CONFIG_SYSCTL=y
179CONFIG_EMBEDDED=y 183CONFIG_EMBEDDED=y
@@ -187,31 +191,29 @@ CONFIG_BUG=y
187CONFIG_ELF_CORE=y 191CONFIG_ELF_CORE=y
188CONFIG_BASE_FULL=y 192CONFIG_BASE_FULL=y
189CONFIG_FUTEX=y 193CONFIG_FUTEX=y
194CONFIG_ANON_INODES=y
190CONFIG_EPOLL=y 195CONFIG_EPOLL=y
196CONFIG_SIGNALFD=y
197CONFIG_EVENTFD=y
191CONFIG_SHMEM=y 198CONFIG_SHMEM=y
192CONFIG_SLAB=y
193CONFIG_VM_EVENT_COUNTERS=y 199CONFIG_VM_EVENT_COUNTERS=y
200CONFIG_SLAB=y
201# CONFIG_SLUB is not set
202# CONFIG_SLOB is not set
194CONFIG_RT_MUTEXES=y 203CONFIG_RT_MUTEXES=y
195# CONFIG_TINY_SHMEM is not set 204# CONFIG_TINY_SHMEM is not set
196CONFIG_BASE_SMALL=0 205CONFIG_BASE_SMALL=0
197# CONFIG_SLOB is not set
198
199#
200# Loadable module support
201#
202CONFIG_MODULES=y 206CONFIG_MODULES=y
203CONFIG_MODULE_UNLOAD=y 207CONFIG_MODULE_UNLOAD=y
204# CONFIG_MODULE_FORCE_UNLOAD is not set 208# CONFIG_MODULE_FORCE_UNLOAD is not set
205CONFIG_MODVERSIONS=y 209CONFIG_MODVERSIONS=y
206CONFIG_MODULE_SRCVERSION_ALL=y 210CONFIG_MODULE_SRCVERSION_ALL=y
207CONFIG_KMOD=y 211CONFIG_KMOD=y
208
209#
210# Block layer
211#
212CONFIG_BLOCK=y 212CONFIG_BLOCK=y
213# CONFIG_LBD is not set 213# CONFIG_LBD is not set
214# CONFIG_BLK_DEV_IO_TRACE is not set
214# CONFIG_LSF is not set 215# CONFIG_LSF is not set
216# CONFIG_BLK_DEV_BSG is not set
215 217
216# 218#
217# IO Schedulers 219# IO Schedulers
@@ -229,18 +231,11 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
229# 231#
230# Bus options (PCI, PCMCIA, EISA, ISA, TC) 232# Bus options (PCI, PCMCIA, EISA, ISA, TC)
231# 233#
234# CONFIG_ARCH_SUPPORTS_MSI is not set
232CONFIG_MMU=y 235CONFIG_MMU=y
233
234#
235# PCCARD (PCMCIA/CardBus) support
236#
237# CONFIG_PCCARD is not set 236# CONFIG_PCCARD is not set
238 237
239# 238#
240# PCI Hotplug Support
241#
242
243#
244# Executable file formats 239# Executable file formats
245# 240#
246CONFIG_BINFMT_ELF=y 241CONFIG_BINFMT_ELF=y
@@ -250,9 +245,8 @@ CONFIG_TRAD_SIGNALS=y
250# 245#
251# Power management options 246# Power management options
252# 247#
253CONFIG_PM=y 248# CONFIG_PM is not set
254# CONFIG_PM_LEGACY is not set 249CONFIG_SUSPEND_UP_POSSIBLE=y
255# CONFIG_PM_DEBUG is not set
256 250
257# 251#
258# Networking 252# Networking
@@ -262,75 +256,50 @@ CONFIG_NET=y
262# 256#
263# Networking options 257# Networking options
264# 258#
265# CONFIG_NETDEBUG is not set
266CONFIG_PACKET=y 259CONFIG_PACKET=y
267CONFIG_PACKET_MMAP=y 260CONFIG_PACKET_MMAP=y
268CONFIG_UNIX=y 261CONFIG_UNIX=y
269CONFIG_XFRM=y 262# CONFIG_NET_KEY is not set
270# CONFIG_XFRM_USER is not set
271# CONFIG_XFRM_SUB_POLICY is not set
272CONFIG_XFRM_MIGRATE=y
273CONFIG_NET_KEY=y
274CONFIG_NET_KEY_MIGRATE=y
275CONFIG_INET=y 263CONFIG_INET=y
276CONFIG_IP_MULTICAST=y 264CONFIG_IP_MULTICAST=y
277CONFIG_IP_ADVANCED_ROUTER=y 265CONFIG_IP_ADVANCED_ROUTER=y
278CONFIG_ASK_IP_FIB_HASH=y 266CONFIG_ASK_IP_FIB_HASH=y
279# CONFIG_IP_FIB_TRIE is not set 267# CONFIG_IP_FIB_TRIE is not set
280CONFIG_IP_FIB_HASH=y 268CONFIG_IP_FIB_HASH=y
281CONFIG_IP_MULTIPLE_TABLES=y 269# CONFIG_IP_MULTIPLE_TABLES is not set
282CONFIG_IP_ROUTE_MULTIPATH=y 270# CONFIG_IP_ROUTE_MULTIPATH is not set
283# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set 271# CONFIG_IP_ROUTE_VERBOSE is not set
284CONFIG_IP_ROUTE_VERBOSE=y
285CONFIG_IP_PNP=y 272CONFIG_IP_PNP=y
286CONFIG_IP_PNP_DHCP=y 273CONFIG_IP_PNP_DHCP=y
287CONFIG_IP_PNP_BOOTP=y 274CONFIG_IP_PNP_BOOTP=y
288# CONFIG_IP_PNP_RARP is not set 275# CONFIG_IP_PNP_RARP is not set
289# CONFIG_NET_IPIP is not set 276# CONFIG_NET_IPIP is not set
290# CONFIG_NET_IPGRE is not set 277# CONFIG_NET_IPGRE is not set
291CONFIG_IP_MROUTE=y 278# CONFIG_IP_MROUTE is not set
292CONFIG_IP_PIMSM_V1=y
293CONFIG_IP_PIMSM_V2=y
294# CONFIG_ARPD is not set 279# CONFIG_ARPD is not set
295CONFIG_SYN_COOKIES=y 280# CONFIG_SYN_COOKIES is not set
296# CONFIG_INET_AH is not set 281# CONFIG_INET_AH is not set
297# CONFIG_INET_ESP is not set 282# CONFIG_INET_ESP is not set
298# CONFIG_INET_IPCOMP is not set 283# CONFIG_INET_IPCOMP is not set
299# CONFIG_INET_XFRM_TUNNEL is not set 284# CONFIG_INET_XFRM_TUNNEL is not set
300# CONFIG_INET_TUNNEL is not set 285# CONFIG_INET_TUNNEL is not set
301CONFIG_INET_XFRM_MODE_TRANSPORT=m 286# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
302CONFIG_INET_XFRM_MODE_TUNNEL=m 287# CONFIG_INET_XFRM_MODE_TUNNEL is not set
303CONFIG_INET_XFRM_MODE_BEET=m 288# CONFIG_INET_XFRM_MODE_BEET is not set
289# CONFIG_INET_LRO is not set
304CONFIG_INET_DIAG=y 290CONFIG_INET_DIAG=y
305CONFIG_INET_TCP_DIAG=y 291CONFIG_INET_TCP_DIAG=y
306# CONFIG_TCP_CONG_ADVANCED is not set 292# CONFIG_TCP_CONG_ADVANCED is not set
307CONFIG_TCP_CONG_CUBIC=y 293CONFIG_TCP_CONG_CUBIC=y
308CONFIG_DEFAULT_TCP_CONG="cubic" 294CONFIG_DEFAULT_TCP_CONG="cubic"
309CONFIG_TCP_MD5SIG=y 295# CONFIG_TCP_MD5SIG is not set
310# CONFIG_IPV6 is not set 296# CONFIG_IPV6 is not set
311# CONFIG_INET6_XFRM_TUNNEL is not set 297# CONFIG_INET6_XFRM_TUNNEL is not set
312# CONFIG_INET6_TUNNEL is not set 298# CONFIG_INET6_TUNNEL is not set
313CONFIG_NETWORK_SECMARK=y 299# CONFIG_NETWORK_SECMARK is not set
314# CONFIG_NETFILTER is not set 300# CONFIG_NETFILTER is not set
315
316#
317# DCCP Configuration (EXPERIMENTAL)
318#
319# CONFIG_IP_DCCP is not set 301# CONFIG_IP_DCCP is not set
320 302# CONFIG_IP_SCTP is not set
321#
322# SCTP Configuration (EXPERIMENTAL)
323#
324CONFIG_IP_SCTP=m
325# CONFIG_SCTP_DBG_MSG is not set
326# CONFIG_SCTP_DBG_OBJCNT is not set
327# CONFIG_SCTP_HMAC_NONE is not set
328# CONFIG_SCTP_HMAC_SHA1 is not set
329CONFIG_SCTP_HMAC_MD5=y
330
331#
332# TIPC Configuration (EXPERIMENTAL)
333#
334# CONFIG_TIPC is not set 303# CONFIG_TIPC is not set
335# CONFIG_ATM is not set 304# CONFIG_ATM is not set
336# CONFIG_BRIDGE is not set 305# CONFIG_BRIDGE is not set
@@ -347,44 +316,7 @@ CONFIG_SCTP_HMAC_MD5=y
347# 316#
348# QoS and/or fair queueing 317# QoS and/or fair queueing
349# 318#
350CONFIG_NET_SCHED=y 319# CONFIG_NET_SCHED is not set
351CONFIG_NET_SCH_FIFO=y
352CONFIG_NET_SCH_CLK_JIFFIES=y
353# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
354# CONFIG_NET_SCH_CLK_CPU is not set
355
356#
357# Queueing/Scheduling
358#
359CONFIG_NET_SCH_CBQ=m
360CONFIG_NET_SCH_HTB=m
361CONFIG_NET_SCH_HFSC=m
362CONFIG_NET_SCH_PRIO=m
363CONFIG_NET_SCH_RED=m
364CONFIG_NET_SCH_SFQ=m
365CONFIG_NET_SCH_TEQL=m
366CONFIG_NET_SCH_TBF=m
367CONFIG_NET_SCH_GRED=m
368CONFIG_NET_SCH_DSMARK=m
369CONFIG_NET_SCH_NETEM=m
370CONFIG_NET_SCH_INGRESS=m
371
372#
373# Classification
374#
375CONFIG_NET_CLS=y
376CONFIG_NET_CLS_BASIC=m
377CONFIG_NET_CLS_TCINDEX=m
378CONFIG_NET_CLS_ROUTE4=m
379CONFIG_NET_CLS_ROUTE=y
380# CONFIG_NET_CLS_FW is not set
381# CONFIG_NET_CLS_U32 is not set
382# CONFIG_NET_CLS_RSVP is not set
383# CONFIG_NET_CLS_RSVP6 is not set
384# CONFIG_NET_EMATCH is not set
385# CONFIG_NET_CLS_ACT is not set
386# CONFIG_NET_CLS_POLICE is not set
387CONFIG_NET_ESTIMATOR=y
388 320
389# 321#
390# Network testing 322# Network testing
@@ -393,8 +325,17 @@ CONFIG_NET_ESTIMATOR=y
393# CONFIG_HAMRADIO is not set 325# CONFIG_HAMRADIO is not set
394# CONFIG_IRDA is not set 326# CONFIG_IRDA is not set
395# CONFIG_BT is not set 327# CONFIG_BT is not set
328# CONFIG_AF_RXRPC is not set
329
330#
331# Wireless
332#
333# CONFIG_CFG80211 is not set
334# CONFIG_WIRELESS_EXT is not set
335# CONFIG_MAC80211 is not set
396# CONFIG_IEEE80211 is not set 336# CONFIG_IEEE80211 is not set
397CONFIG_FIB_RULES=y 337# CONFIG_RFKILL is not set
338# CONFIG_NET_9P is not set
398 339
399# 340#
400# Device Drivers 341# Device Drivers
@@ -403,52 +344,25 @@ CONFIG_FIB_RULES=y
403# 344#
404# Generic Driver Options 345# Generic Driver Options
405# 346#
347CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
406# CONFIG_STANDALONE is not set 348# CONFIG_STANDALONE is not set
407# CONFIG_PREVENT_FIRMWARE_BUILD is not set 349# CONFIG_PREVENT_FIRMWARE_BUILD is not set
408# CONFIG_FW_LOADER is not set 350# CONFIG_FW_LOADER is not set
409# CONFIG_DEBUG_DRIVER is not set 351# CONFIG_DEBUG_DRIVER is not set
410# CONFIG_DEBUG_DEVRES is not set 352# CONFIG_DEBUG_DEVRES is not set
411# CONFIG_SYS_HYPERVISOR is not set 353# CONFIG_SYS_HYPERVISOR is not set
412
413#
414# Connector - unified userspace <-> kernelspace linker
415#
416# CONFIG_CONNECTOR is not set 354# CONFIG_CONNECTOR is not set
417
418#
419# Memory Technology Devices (MTD)
420#
421# CONFIG_MTD is not set 355# CONFIG_MTD is not set
422
423#
424# Parallel port support
425#
426# CONFIG_PARPORT is not set 356# CONFIG_PARPORT is not set
427 357CONFIG_BLK_DEV=y
428#
429# Plug and Play support
430#
431# CONFIG_PNPACPI is not set
432
433#
434# Block devices
435#
436# CONFIG_BLK_DEV_COW_COMMON is not set 358# CONFIG_BLK_DEV_COW_COMMON is not set
437CONFIG_BLK_DEV_LOOP=y 359CONFIG_BLK_DEV_LOOP=y
438# CONFIG_BLK_DEV_CRYPTOLOOP is not set 360# CONFIG_BLK_DEV_CRYPTOLOOP is not set
439CONFIG_BLK_DEV_NBD=y 361CONFIG_BLK_DEV_NBD=y
440# CONFIG_BLK_DEV_RAM is not set 362# CONFIG_BLK_DEV_RAM is not set
441# CONFIG_BLK_DEV_INITRD is not set
442# CONFIG_CDROM_PKTCDVD is not set 363# CONFIG_CDROM_PKTCDVD is not set
443# CONFIG_ATA_OVER_ETH is not set 364# CONFIG_ATA_OVER_ETH is not set
444 365# CONFIG_MISC_DEVICES is not set
445#
446# Misc devices
447#
448
449#
450# ATA/ATAPI/MFM/RLL support
451#
452# CONFIG_IDE is not set 366# CONFIG_IDE is not set
453 367
454# 368#
@@ -456,48 +370,29 @@ CONFIG_BLK_DEV_NBD=y
456# 370#
457# CONFIG_RAID_ATTRS is not set 371# CONFIG_RAID_ATTRS is not set
458# CONFIG_SCSI is not set 372# CONFIG_SCSI is not set
373# CONFIG_SCSI_DMA is not set
459# CONFIG_SCSI_NETLINK is not set 374# CONFIG_SCSI_NETLINK is not set
460
461#
462# Serial ATA (prod) and Parallel ATA (experimental) drivers
463#
464# CONFIG_ATA is not set 375# CONFIG_ATA is not set
465
466#
467# Multi-device support (RAID and LVM)
468#
469# CONFIG_MD is not set 376# CONFIG_MD is not set
470
471#
472# Fusion MPT device support
473#
474# CONFIG_FUSION is not set
475
476#
477# IEEE 1394 (FireWire) support
478#
479
480#
481# I2O device support
482#
483
484#
485# Network device support
486#
487CONFIG_NETDEVICES=y 377CONFIG_NETDEVICES=y
378# CONFIG_NETDEVICES_MULTIQUEUE is not set
488# CONFIG_DUMMY is not set 379# CONFIG_DUMMY is not set
489# CONFIG_BONDING is not set 380# CONFIG_BONDING is not set
381# CONFIG_MACVLAN is not set
490# CONFIG_EQUALIZER is not set 382# CONFIG_EQUALIZER is not set
491# CONFIG_TUN is not set 383# CONFIG_TUN is not set
384# CONFIG_VETH is not set
492# CONFIG_PHYLIB is not set 385# CONFIG_PHYLIB is not set
493
494#
495# Ethernet (10 or 100Mbit)
496#
497CONFIG_NET_ETHERNET=y 386CONFIG_NET_ETHERNET=y
498# CONFIG_MII is not set 387# CONFIG_MII is not set
388# CONFIG_AX88796 is not set
499CONFIG_MIPS_SIM_NET=y 389CONFIG_MIPS_SIM_NET=y
500# CONFIG_DM9000 is not set 390# CONFIG_DM9000 is not set
391# CONFIG_IBM_NEW_EMAC_ZMII is not set
392# CONFIG_IBM_NEW_EMAC_RGMII is not set
393# CONFIG_IBM_NEW_EMAC_TAH is not set
394# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
395# CONFIG_B44 is not set
501# CONFIG_NETDEV_1000 is not set 396# CONFIG_NETDEV_1000 is not set
502# CONFIG_NETDEV_10000 is not set 397# CONFIG_NETDEV_10000 is not set
503 398
@@ -513,49 +408,18 @@ CONFIG_MIPS_SIM_NET=y
513# CONFIG_NETCONSOLE is not set 408# CONFIG_NETCONSOLE is not set
514# CONFIG_NETPOLL is not set 409# CONFIG_NETPOLL is not set
515# CONFIG_NET_POLL_CONTROLLER is not set 410# CONFIG_NET_POLL_CONTROLLER is not set
516
517#
518# ISDN subsystem
519#
520# CONFIG_ISDN is not set 411# CONFIG_ISDN is not set
521
522#
523# Telephony Support
524#
525# CONFIG_PHONE is not set 412# CONFIG_PHONE is not set
526 413
527# 414#
528# Input device support 415# Input device support
529# 416#
530CONFIG_INPUT=y 417# CONFIG_INPUT is not set
531# CONFIG_INPUT_FF_MEMLESS is not set
532
533#
534# Userland interfaces
535#
536# CONFIG_INPUT_MOUSEDEV is not set
537# CONFIG_INPUT_JOYDEV is not set
538# CONFIG_INPUT_TSDEV is not set
539# CONFIG_INPUT_EVDEV is not set
540# CONFIG_INPUT_EVBUG is not set
541
542#
543# Input Device Drivers
544#
545# CONFIG_INPUT_KEYBOARD is not set
546# CONFIG_INPUT_MOUSE is not set
547# CONFIG_INPUT_JOYSTICK is not set
548# CONFIG_INPUT_TOUCHSCREEN is not set
549# CONFIG_INPUT_MISC is not set
550 418
551# 419#
552# Hardware I/O ports 420# Hardware I/O ports
553# 421#
554CONFIG_SERIO=y 422# CONFIG_SERIO is not set
555# CONFIG_SERIO_I8042 is not set
556CONFIG_SERIO_SERPORT=y
557# CONFIG_SERIO_LIBPS2 is not set
558# CONFIG_SERIO_RAW is not set
559# CONFIG_GAMEPORT is not set 423# CONFIG_GAMEPORT is not set
560 424
561# 425#
@@ -581,31 +445,13 @@ CONFIG_SERIAL_CORE_CONSOLE=y
581CONFIG_UNIX98_PTYS=y 445CONFIG_UNIX98_PTYS=y
582CONFIG_LEGACY_PTYS=y 446CONFIG_LEGACY_PTYS=y
583CONFIG_LEGACY_PTY_COUNT=256 447CONFIG_LEGACY_PTY_COUNT=256
584
585#
586# IPMI
587#
588# CONFIG_IPMI_HANDLER is not set 448# CONFIG_IPMI_HANDLER is not set
589
590#
591# Watchdog Cards
592#
593# CONFIG_WATCHDOG is not set 449# CONFIG_WATCHDOG is not set
594# CONFIG_HW_RANDOM is not set 450# CONFIG_HW_RANDOM is not set
595# CONFIG_RTC is not set 451# CONFIG_RTC is not set
596# CONFIG_GEN_RTC is not set
597# CONFIG_DTLK is not set
598# CONFIG_R3964 is not set 452# CONFIG_R3964 is not set
599# CONFIG_RAW_DRIVER is not set 453# CONFIG_RAW_DRIVER is not set
600
601#
602# TPM devices
603#
604# CONFIG_TCG_TPM is not set 454# CONFIG_TCG_TPM is not set
605
606#
607# I2C support
608#
609# CONFIG_I2C is not set 455# CONFIG_I2C is not set
610 456
611# 457#
@@ -613,118 +459,60 @@ CONFIG_LEGACY_PTY_COUNT=256
613# 459#
614# CONFIG_SPI is not set 460# CONFIG_SPI is not set
615# CONFIG_SPI_MASTER is not set 461# CONFIG_SPI_MASTER is not set
462# CONFIG_W1 is not set
463# CONFIG_POWER_SUPPLY is not set
464# CONFIG_HWMON is not set
616 465
617# 466#
618# Dallas's 1-wire bus 467# Sonics Silicon Backplane
619# 468#
620# CONFIG_W1 is not set 469CONFIG_SSB_POSSIBLE=y
470# CONFIG_SSB is not set
621 471
622# 472#
623# Hardware Monitoring support 473# Multifunction device drivers
624# 474#
625# CONFIG_HWMON is not set 475# CONFIG_MFD_SM501 is not set
626# CONFIG_HWMON_VID is not set
627 476
628# 477#
629# Multimedia devices 478# Multimedia devices
630# 479#
631# CONFIG_VIDEO_DEV is not set 480# CONFIG_VIDEO_DEV is not set
632 481# CONFIG_DVB_CORE is not set
633# 482# CONFIG_DAB is not set
634# Digital Video Broadcasting Devices
635#
636# CONFIG_DVB is not set
637 483
638# 484#
639# Graphics support 485# Graphics support
640# 486#
641# CONFIG_FIRMWARE_EDID is not set 487# CONFIG_VGASTATE is not set
488# CONFIG_VIDEO_OUTPUT_CONTROL is not set
642# CONFIG_FB is not set 489# CONFIG_FB is not set
490# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
643 491
644# 492#
645# Sound 493# Display device support
646# 494#
647# CONFIG_SOUND is not set 495# CONFIG_DISPLAY_SUPPORT is not set
648 496
649# 497#
650# HID Devices 498# Sound
651#
652# CONFIG_HID is not set
653
654#
655# USB support
656#
657# CONFIG_USB_ARCH_HAS_HCD is not set
658# CONFIG_USB_ARCH_HAS_OHCI is not set
659# CONFIG_USB_ARCH_HAS_EHCI is not set
660
661#
662# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
663#
664
665#
666# USB Gadget Support
667#
668# CONFIG_USB_GADGET is not set
669
670#
671# MMC/SD Card support
672# 499#
500# CONFIG_SOUND is not set
501# CONFIG_USB_SUPPORT is not set
673# CONFIG_MMC is not set 502# CONFIG_MMC is not set
674
675#
676# LED devices
677#
678# CONFIG_NEW_LEDS is not set 503# CONFIG_NEW_LEDS is not set
679 504CONFIG_RTC_LIB=y
680#
681# LED drivers
682#
683
684#
685# LED Triggers
686#
687
688#
689# InfiniBand support
690#
691
692#
693# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
694#
695
696#
697# Real Time Clock
698#
699# CONFIG_RTC_CLASS is not set 505# CONFIG_RTC_CLASS is not set
700 506
701# 507#
702# DMA Engine support 508# Userspace I/O
703#
704# CONFIG_DMA_ENGINE is not set
705
706#
707# DMA Clients
708#
709
710#
711# DMA Devices
712#
713
714#
715# Auxiliary Display support
716#
717
718#
719# Virtualization
720# 509#
510# CONFIG_UIO is not set
721 511
722# 512#
723# File systems 513# File systems
724# 514#
725CONFIG_EXT2_FS=y 515# CONFIG_EXT2_FS is not set
726# CONFIG_EXT2_FS_XATTR is not set
727# CONFIG_EXT2_FS_XIP is not set
728# CONFIG_EXT3_FS is not set 516# CONFIG_EXT3_FS is not set
729# CONFIG_EXT4DEV_FS is not set 517# CONFIG_EXT4DEV_FS is not set
730# CONFIG_REISERFS_FS is not set 518# CONFIG_REISERFS_FS is not set
@@ -732,6 +520,7 @@ CONFIG_EXT2_FS=y
732# CONFIG_FS_POSIX_ACL is not set 520# CONFIG_FS_POSIX_ACL is not set
733# CONFIG_XFS_FS is not set 521# CONFIG_XFS_FS is not set
734# CONFIG_GFS2_FS is not set 522# CONFIG_GFS2_FS is not set
523# CONFIG_OCFS2_FS is not set
735# CONFIG_MINIX_FS is not set 524# CONFIG_MINIX_FS is not set
736CONFIG_ROMFS_FS=y 525CONFIG_ROMFS_FS=y
737# CONFIG_INOTIFY is not set 526# CONFIG_INOTIFY is not set
@@ -760,10 +549,11 @@ CONFIG_ROMFS_FS=y
760CONFIG_PROC_FS=y 549CONFIG_PROC_FS=y
761# CONFIG_PROC_KCORE is not set 550# CONFIG_PROC_KCORE is not set
762CONFIG_PROC_SYSCTL=y 551CONFIG_PROC_SYSCTL=y
763# CONFIG_SYSFS is not set 552CONFIG_SYSFS=y
764# CONFIG_TMPFS is not set 553CONFIG_TMPFS=y
554# CONFIG_TMPFS_POSIX_ACL is not set
765# CONFIG_HUGETLB_PAGE is not set 555# CONFIG_HUGETLB_PAGE is not set
766CONFIG_RAMFS=y 556# CONFIG_CONFIGFS_FS is not set
767 557
768# 558#
769# Miscellaneous filesystems 559# Miscellaneous filesystems
@@ -781,10 +571,7 @@ CONFIG_RAMFS=y
781# CONFIG_QNX4FS_FS is not set 571# CONFIG_QNX4FS_FS is not set
782# CONFIG_SYSV_FS is not set 572# CONFIG_SYSV_FS is not set
783# CONFIG_UFS_FS is not set 573# CONFIG_UFS_FS is not set
784 574CONFIG_NETWORK_FILESYSTEMS=y
785#
786# Network File Systems
787#
788CONFIG_NFS_FS=y 575CONFIG_NFS_FS=y
789CONFIG_NFS_V3=y 576CONFIG_NFS_V3=y
790# CONFIG_NFS_V3_ACL is not set 577# CONFIG_NFS_V3_ACL is not set
@@ -796,6 +583,7 @@ CONFIG_LOCKD=y
796CONFIG_LOCKD_V4=y 583CONFIG_LOCKD_V4=y
797CONFIG_NFS_COMMON=y 584CONFIG_NFS_COMMON=y
798CONFIG_SUNRPC=y 585CONFIG_SUNRPC=y
586# CONFIG_SUNRPC_BIND34 is not set
799# CONFIG_RPCSEC_GSS_KRB5 is not set 587# CONFIG_RPCSEC_GSS_KRB5 is not set
800# CONFIG_RPCSEC_GSS_SPKM3 is not set 588# CONFIG_RPCSEC_GSS_SPKM3 is not set
801# CONFIG_SMB_FS is not set 589# CONFIG_SMB_FS is not set
@@ -803,22 +591,14 @@ CONFIG_SUNRPC=y
803# CONFIG_NCP_FS is not set 591# CONFIG_NCP_FS is not set
804# CONFIG_CODA_FS is not set 592# CONFIG_CODA_FS is not set
805# CONFIG_AFS_FS is not set 593# CONFIG_AFS_FS is not set
806# CONFIG_9P_FS is not set
807 594
808# 595#
809# Partition Types 596# Partition Types
810# 597#
811# CONFIG_PARTITION_ADVANCED is not set 598# CONFIG_PARTITION_ADVANCED is not set
812CONFIG_MSDOS_PARTITION=y 599CONFIG_MSDOS_PARTITION=y
813
814#
815# Native Language Support
816#
817# CONFIG_NLS is not set 600# CONFIG_NLS is not set
818 601# CONFIG_DLM is not set
819#
820# Distributed Lock Manager
821#
822 602
823# 603#
824# Profiling support 604# Profiling support
@@ -833,20 +613,22 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
833CONFIG_ENABLE_MUST_CHECK=y 613CONFIG_ENABLE_MUST_CHECK=y
834# CONFIG_MAGIC_SYSRQ is not set 614# CONFIG_MAGIC_SYSRQ is not set
835# CONFIG_UNUSED_SYMBOLS is not set 615# CONFIG_UNUSED_SYMBOLS is not set
616# CONFIG_DEBUG_FS is not set
836# CONFIG_HEADERS_CHECK is not set 617# CONFIG_HEADERS_CHECK is not set
837CONFIG_DEBUG_KERNEL=y 618CONFIG_DEBUG_KERNEL=y
838# CONFIG_DEBUG_SHIRQ is not set 619# CONFIG_DEBUG_SHIRQ is not set
839CONFIG_LOG_BUF_SHIFT=14
840# CONFIG_DETECT_SOFTLOCKUP is not set 620# CONFIG_DETECT_SOFTLOCKUP is not set
621# CONFIG_SCHED_DEBUG is not set
841# CONFIG_SCHEDSTATS is not set 622# CONFIG_SCHEDSTATS is not set
842# CONFIG_TIMER_STATS is not set 623# CONFIG_TIMER_STATS is not set
843# CONFIG_DEBUG_SLAB is not set 624# CONFIG_DEBUG_SLAB is not set
844# CONFIG_DEBUG_RT_MUTEXES is not set 625# CONFIG_DEBUG_RT_MUTEXES is not set
845# CONFIG_RT_MUTEX_TESTER is not set 626# CONFIG_RT_MUTEX_TESTER is not set
846# CONFIG_DEBUG_SPINLOCK is not set 627# CONFIG_DEBUG_SPINLOCK is not set
847CONFIG_DEBUG_MUTEXES=y 628# CONFIG_DEBUG_MUTEXES is not set
848# CONFIG_DEBUG_LOCK_ALLOC is not set 629# CONFIG_DEBUG_LOCK_ALLOC is not set
849# CONFIG_PROVE_LOCKING is not set 630# CONFIG_PROVE_LOCKING is not set
631# CONFIG_LOCK_STAT is not set
850# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 632# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
851# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 633# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
852# CONFIG_DEBUG_KOBJECT is not set 634# CONFIG_DEBUG_KOBJECT is not set
@@ -854,7 +636,9 @@ CONFIG_DEBUG_INFO=y
854# CONFIG_DEBUG_VM is not set 636# CONFIG_DEBUG_VM is not set
855# CONFIG_DEBUG_LIST is not set 637# CONFIG_DEBUG_LIST is not set
856CONFIG_FORCED_INLINING=y 638CONFIG_FORCED_INLINING=y
639# CONFIG_BOOT_PRINTK_DELAY is not set
857# CONFIG_RCU_TORTURE_TEST is not set 640# CONFIG_RCU_TORTURE_TEST is not set
641# CONFIG_FAULT_INJECTION is not set
858CONFIG_CROSSCOMPILE=y 642CONFIG_CROSSCOMPILE=y
859CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp" 643CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp"
860# CONFIG_DEBUG_STACK_USAGE is not set 644# CONFIG_DEBUG_STACK_USAGE is not set
@@ -865,60 +649,20 @@ CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp"
865# Security options 649# Security options
866# 650#
867# CONFIG_KEYS is not set 651# CONFIG_KEYS is not set
868 652# CONFIG_SECURITY is not set
869# 653# CONFIG_SECURITY_FILE_CAPABILITIES is not set
870# Cryptographic options 654# CONFIG_CRYPTO is not set
871#
872CONFIG_CRYPTO=y
873CONFIG_CRYPTO_ALGAPI=y
874CONFIG_CRYPTO_BLKCIPHER=m
875CONFIG_CRYPTO_HASH=y
876CONFIG_CRYPTO_MANAGER=y
877CONFIG_CRYPTO_HMAC=y
878CONFIG_CRYPTO_XCBC=m
879# CONFIG_CRYPTO_NULL is not set
880# CONFIG_CRYPTO_MD4 is not set
881CONFIG_CRYPTO_MD5=y
882# CONFIG_CRYPTO_SHA1 is not set
883# CONFIG_CRYPTO_SHA256 is not set
884# CONFIG_CRYPTO_SHA512 is not set
885# CONFIG_CRYPTO_WP512 is not set
886# CONFIG_CRYPTO_TGR192 is not set
887CONFIG_CRYPTO_GF128MUL=m
888CONFIG_CRYPTO_ECB=m
889CONFIG_CRYPTO_CBC=m
890CONFIG_CRYPTO_PCBC=m
891CONFIG_CRYPTO_LRW=m
892# CONFIG_CRYPTO_DES is not set
893CONFIG_CRYPTO_FCRYPT=m
894# CONFIG_CRYPTO_BLOWFISH is not set
895# CONFIG_CRYPTO_TWOFISH is not set
896# CONFIG_CRYPTO_SERPENT is not set
897# CONFIG_CRYPTO_AES is not set
898# CONFIG_CRYPTO_CAST5 is not set
899# CONFIG_CRYPTO_CAST6 is not set
900# CONFIG_CRYPTO_TEA is not set
901# CONFIG_CRYPTO_ARC4 is not set
902# CONFIG_CRYPTO_KHAZAD is not set
903# CONFIG_CRYPTO_ANUBIS is not set
904# CONFIG_CRYPTO_DEFLATE is not set
905# CONFIG_CRYPTO_MICHAEL_MIC is not set
906# CONFIG_CRYPTO_CRC32C is not set
907CONFIG_CRYPTO_CAMELLIA=m
908# CONFIG_CRYPTO_TEST is not set
909
910#
911# Hardware crypto devices
912#
913 655
914# 656#
915# Library routines 657# Library routines
916# 658#
917CONFIG_BITREVERSE=y
918# CONFIG_CRC_CCITT is not set 659# CONFIG_CRC_CCITT is not set
919CONFIG_CRC16=y 660# CONFIG_CRC16 is not set
920CONFIG_CRC32=y 661# CONFIG_CRC_ITU_T is not set
662# CONFIG_CRC32 is not set
663# CONFIG_CRC7 is not set
921# CONFIG_LIBCRC32C is not set 664# CONFIG_LIBCRC32C is not set
922CONFIG_PLIST=y 665CONFIG_PLIST=y
923CONFIG_HAS_IOMEM=y 666CONFIG_HAS_IOMEM=y
924CONFIG_HAS_IOPORT=y 667CONFIG_HAS_IOPORT=y
668CONFIG_HAS_DMA=y
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c
index 5e1da53b04a7..82f9e9013e70 100644
--- a/arch/mips/emma2rh/markeins/setup.c
+++ b/arch/mips/emma2rh/markeins/setup.c
@@ -104,12 +104,6 @@ void __init plat_time_init(void)
104 mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2; 104 mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
105} 105}
106 106
107void __init plat_timer_setup(struct irqaction *irq)
108{
109 /* we are using the cpu counter for timer interrupts */
110 setup_irq(CPU_IRQ_BASE + 7, irq);
111}
112
113static void markeins_board_init(void); 107static void markeins_board_init(void);
114extern void markeins_irq_setup(void); 108extern void markeins_irq_setup(void);
115 109
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 08b84d476c87..a915e5693421 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -10,6 +10,7 @@
10#include <linux/interrupt.h> 10#include <linux/interrupt.h>
11#include <linux/percpu.h> 11#include <linux/percpu.h>
12 12
13#include <asm/smtc_ipi.h>
13#include <asm/time.h> 14#include <asm/time.h>
14 15
15static int mips_next_event(unsigned long delta, 16static int mips_next_event(unsigned long delta,
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index ea7cfe766a8e..c4e6866d5cbc 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -40,17 +40,6 @@
40#include <irq.h> 40#include <irq.h>
41 41
42/* 42/*
43 * The integer part of the number of usecs per jiffy is taken from tick,
44 * but the fractional part is not recorded, so we calculate it using the
45 * initial value of HZ. This aids systems where tick isn't really an
46 * integer (e.g. for HZ = 128).
47 */
48#define USECS_PER_JIFFY TICK_SIZE
49#define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ))
50
51#define TICK_SIZE (tick_nsec / 1000)
52
53/*
54 * forward reference 43 * forward reference
55 */ 44 */
56DEFINE_SPINLOCK(rtc_lock); 45DEFINE_SPINLOCK(rtc_lock);
@@ -182,84 +171,59 @@ struct clocksource clocksource_mips = {
182 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 171 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
183}; 172};
184 173
185static void __init init_mips_clocksource(void) 174void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
186{ 175{
187 u64 temp; 176 u64 temp;
188 u32 shift; 177 u32 shift;
189 178
190 if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
191 return;
192
193 /* Calclate a somewhat reasonable rating value */
194 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
195 /* Find a shift value */ 179 /* Find a shift value */
196 for (shift = 32; shift > 0; shift--) { 180 for (shift = 32; shift > 0; shift--) {
197 temp = (u64) NSEC_PER_SEC << shift; 181 temp = (u64) NSEC_PER_SEC << shift;
198 do_div(temp, mips_hpt_frequency); 182 do_div(temp, clock);
199 if ((temp >> 32) == 0) 183 if ((temp >> 32) == 0)
200 break; 184 break;
201 } 185 }
202 clocksource_mips.shift = shift; 186 cs->shift = shift;
203 clocksource_mips.mult = (u32)temp; 187 cs->mult = (u32) temp;
204
205 clocksource_register(&clocksource_mips);
206} 188}
207 189
208void __init __weak plat_time_init(void) 190void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
191 unsigned int clock)
209{ 192{
193 u64 temp;
194 u32 shift;
195
196 /* Find a shift value */
197 for (shift = 32; shift > 0; shift--) {
198 temp = (u64) NSEC_PER_SEC << shift;
199 do_div(temp, clock);
200 if ((temp >> 32) == 0)
201 break;
202 }
203 cd->shift = shift;
204 cd->mult = (u32) temp;
210} 205}
211 206
212void __init __weak plat_timer_setup(struct irqaction *irq) 207static void __init init_mips_clocksource(void)
213{ 208{
214} 209 if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
210 return;
215 211
216#ifdef CONFIG_MIPS_MT_SMTC 212 /* Calclate a somewhat reasonable rating value */
217DEFINE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device); 213 clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
218 214
219static void smtc_set_mode(enum clock_event_mode mode, 215 clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
220 struct clock_event_device *evt) 216
221{ 217 clocksource_register(&clocksource_mips);
222} 218}
223 219
224static void mips_broadcast(cpumask_t mask) 220void __init __weak plat_time_init(void)
225{ 221{
226 unsigned int cpu;
227
228 for_each_cpu_mask(cpu, mask)
229 smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);
230} 222}
231 223
232static void setup_smtc_dummy_clockevent_device(void) 224void __init __weak plat_timer_setup(struct irqaction *irq)
233{ 225{
234 //uint64_t mips_freq = mips_hpt_^frequency;
235 unsigned int cpu = smp_processor_id();
236 struct clock_event_device *cd;
237
238 cd = &per_cpu(smtc_dummy_clockevent_device, cpu);
239
240 cd->name = "SMTC";
241 cd->features = CLOCK_EVT_FEAT_DUMMY;
242
243 /* Calculate the min / max delta */
244 cd->mult = 0; //div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);
245 cd->shift = 0; //32;
246 cd->max_delta_ns = 0; //clockevent_delta2ns(0x7fffffff, cd);
247 cd->min_delta_ns = 0; //clockevent_delta2ns(0x30, cd);
248
249 cd->rating = 200;
250 cd->irq = 17; //-1;
251// if (cpu)
252// cd->cpumask = CPU_MASK_ALL; // cpumask_of_cpu(cpu);
253// else
254 cd->cpumask = cpumask_of_cpu(cpu);
255
256 cd->set_mode = smtc_set_mode;
257
258 cd->broadcast = mips_broadcast;
259
260 clockevents_register_device(cd);
261} 226}
262#endif
263 227
264void __init time_init(void) 228void __init time_init(void)
265{ 229{
diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c
index 09314a20f9fb..2cc6745991ab 100644
--- a/arch/mips/lemote/lm2e/setup.c
+++ b/arch/mips/lemote/lm2e/setup.c
@@ -53,11 +53,6 @@ unsigned long bus_clock;
53unsigned int memsize; 53unsigned int memsize;
54unsigned int highmemsize = 0; 54unsigned int highmemsize = 0;
55 55
56void __init plat_timer_setup(struct irqaction *irq)
57{
58 setup_irq(MIPS_CPU_IRQ_BASE + 7, irq);
59}
60
61void __init plat_time_init(void) 56void __init plat_time_init(void)
62{ 57{
63 /* setup mips r4k timer */ 58 /* setup mips r4k timer */
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_time.c b/arch/mips/pmc-sierra/msp71xx/msp_time.c
index f221d4763625..7cfeda5a651b 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_time.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_time.c
@@ -86,8 +86,5 @@ void __init plat_timer_setup(struct irqaction *irq)
86#ifdef CONFIG_IRQ_MSP_CIC 86#ifdef CONFIG_IRQ_MSP_CIC
87 /* we are using the vpe0 counter for timer interrupts */ 87 /* we are using the vpe0 counter for timer interrupts */
88 setup_irq(MSP_INT_VPE0_TIMER, irq); 88 setup_irq(MSP_INT_VPE0_TIMER, irq);
89#else
90 /* we are using the mips counter for timer interrupts */
91 setup_irq(MSP_INT_TIMER, irq);
92#endif 89#endif
93} 90}
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c
index 015fcc363dc0..855977ca51cd 100644
--- a/arch/mips/pmc-sierra/yosemite/setup.c
+++ b/arch/mips/pmc-sierra/yosemite/setup.c
@@ -137,11 +137,6 @@ int rtc_mips_set_time(unsigned long tim)
137 return 0; 137 return 0;
138} 138}
139 139
140void __init plat_timer_setup(struct irqaction *irq)
141{
142 setup_irq(7, irq);
143}
144
145void __init plat_time_init(void) 140void __init plat_time_init(void)
146{ 141{
147 mips_hpt_frequency = cpu_clock_freq / 2; 142 mips_hpt_frequency = cpu_clock_freq / 2;
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index 6eac36d1b8c8..02b266a31c46 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -69,8 +69,9 @@ void bcm1480_smp_init(void)
69 69
70void bcm1480_smp_finish(void) 70void bcm1480_smp_finish(void)
71{ 71{
72 extern void bcm1480_time_init(void); 72 extern void sb1480_clockevent_init(void);
73 bcm1480_time_init(); 73
74 sb1480_clockevent_init();
74 local_irq_enable(); 75 local_irq_enable();
75} 76}
76 77
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index 5b4bfbbb5a24..c730744aa474 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -27,9 +27,8 @@
27 */ 27 */
28#include <linux/clockchips.h> 28#include <linux/clockchips.h>
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/sched.h> 30#include <linux/percpu.h>
31#include <linux/spinlock.h> 31#include <linux/spinlock.h>
32#include <linux/kernel_stat.h>
33 32
34#include <asm/irq.h> 33#include <asm/irq.h>
35#include <asm/addrspace.h> 34#include <asm/addrspace.h>
@@ -101,25 +100,36 @@ static void sibyte_set_mode(enum clock_event_mode mode,
101 break; 100 break;
102 101
103 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */ 102 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
103 case CLOCK_EVT_MODE_RESUME:
104 ; 104 ;
105 } 105 }
106} 106}
107 107
108struct clock_event_device sibyte_hpt_clockevent = { 108static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
109 .name = "bcm1480-counter", 109{
110 .features = CLOCK_EVT_FEAT_PERIODIC, 110 unsigned int cpu = smp_processor_id();
111 .set_mode = sibyte_set_mode, 111 void __iomem *timer_init;
112 .shift = 32, 112 unsigned int cnt;
113 .irq = 0, 113 int res;
114}; 114
115 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
116 cnt = __raw_readq(timer_init);
117 cnt += delta;
118 __raw_writeq(cnt, timer_init);
119 res = ((long)(__raw_readq(timer_init) - cnt ) > 0) ? -ETIME : 0;
120
121 return res;
122}
123
124static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent);
115 125
116static irqreturn_t sibyte_counter_handler(int irq, void *dev_id) 126static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
117{ 127{
118 struct clock_event_device *cd = &sibyte_hpt_clockevent;
119 unsigned int cpu = smp_processor_id(); 128 unsigned int cpu = smp_processor_id();
129 struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu);
120 130
121 /* Reset the timer */ 131 /* Reset the timer */
122 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 132 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
123 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 133 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
124 cd->event_handler(cd); 134 cd->event_handler(cd);
125 135
@@ -140,24 +150,21 @@ static struct irqaction sibyte_counter_irqaction = {
140 * called directly from irq_handler.S when IP[4] is set during an 150 * called directly from irq_handler.S when IP[4] is set during an
141 * interrupt 151 * interrupt
142 */ 152 */
143static void __init sb1480_clockevent_init(void) 153void __cpuinit sb1480_clockevent_init(void)
144{ 154{
145 unsigned int cpu = smp_processor_id(); 155 unsigned int cpu = smp_processor_id();
146 unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; 156 unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu;
157 struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu);
147 158
148 setup_irq(irq, &sibyte_counter_irqaction); 159 cd->name = "bcm1480-counter";
149} 160 cd->features = CLOCK_EVT_FEAT_PERIODIC |
161 CLOCK_EVT_MODE_ONESHOT;
162 cd->set_next_event = sibyte_next_event;
163 cd->set_mode = sibyte_set_mode;
164 cd->irq = irq;
165 clockevent_set_clock(cd, BCM1480_HPT_VALUE);
150 166
151void bcm1480_timer_interrupt(void) 167 setup_irq(irq, &sibyte_counter_irqaction);
152{
153 int cpu = smp_processor_id();
154 int irq = K_BCM1480_INT_TIMER_0 + cpu;
155
156 /* Reset the timer */
157 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
158 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
159
160 ll_timer_interrupt(irq);
161} 168}
162 169
163static cycle_t bcm1480_hpt_read(void) 170static cycle_t bcm1480_hpt_read(void)
@@ -168,9 +175,26 @@ static cycle_t bcm1480_hpt_read(void)
168 return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count; 175 return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count;
169} 176}
170 177
178struct clocksource bcm1480_clocksource = {
179 .name = "MIPS",
180 .rating = 200,
181 .read = bcm1480_hpt_read,
182 .mask = CLOCKSOURCE_MASK(32),
183 .shift = 32,
184 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
185};
186
187void __init sb1480_clocksource_init(void)
188{
189 struct clocksource *cs = &bcm1480_clocksource;
190
191 clocksource_set_clock(cs, BCM1480_HPT_VALUE);
192 clocksource_register(cs);
193}
194
171void __init bcm1480_hpt_setup(void) 195void __init bcm1480_hpt_setup(void)
172{ 196{
173 clocksource_mips.read = bcm1480_hpt_read;
174 mips_hpt_frequency = BCM1480_HPT_VALUE; 197 mips_hpt_frequency = BCM1480_HPT_VALUE;
198 sb1480_clocksource_init();
175 sb1480_clockevent_init(); 199 sb1480_clockevent_init();
176} 200}
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 7659174819c6..500d17e84c09 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -400,43 +400,11 @@ static void sb1250_kgdb_interrupt(void)
400 400
401#endif /* CONFIG_KGDB */ 401#endif /* CONFIG_KGDB */
402 402
403static inline void sb1250_timer_interrupt(void)
404{
405 int cpu = smp_processor_id();
406 int irq = K_INT_TIMER_0 + cpu;
407
408 irq_enter();
409 kstat_this_cpu.irqs[irq]++;
410
411 write_seqlock(&xtime_lock);
412
413 /* ACK interrupt */
414 ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
415 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
416
417 /*
418 * call the generic timer interrupt handling
419 */
420 do_timer(1);
421
422 write_sequnlock(&xtime_lock);
423
424 /*
425 * In UP mode, we call local_timer_interrupt() to do profiling
426 * and process accouting.
427 *
428 * In SMP mode, local_timer_interrupt() is invoked by appropriate
429 * low-level local timer interrupt handler.
430 */
431 local_timer_interrupt(irq);
432
433 irq_exit();
434}
435
436extern void sb1250_mailbox_interrupt(void); 403extern void sb1250_mailbox_interrupt(void);
437 404
438asmlinkage void plat_irq_dispatch(void) 405asmlinkage void plat_irq_dispatch(void)
439{ 406{
407 unsigned int cpu = smp_processor_id();
440 unsigned int pending; 408 unsigned int pending;
441 409
442 /* 410 /*
@@ -454,7 +422,7 @@ asmlinkage void plat_irq_dispatch(void)
454 if (pending & CAUSEF_IP7) /* CPU performance counter interrupt */ 422 if (pending & CAUSEF_IP7) /* CPU performance counter interrupt */
455 do_IRQ(MIPS_CPU_IRQ_BASE + 7); 423 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
456 else if (pending & CAUSEF_IP4) 424 else if (pending & CAUSEF_IP4)
457 sb1250_timer_interrupt(); 425 do_IRQ(K_INT_TIMER_0 + cpu); /* sb1250_timer_interrupt() */
458 426
459#ifdef CONFIG_SMP 427#ifdef CONFIG_SMP
460 else if (pending & CAUSEF_IP3) 428 else if (pending & CAUSEF_IP3)
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index c38e1f34460d..aaa4f30dda79 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -57,8 +57,9 @@ void sb1250_smp_init(void)
57 57
58void sb1250_smp_finish(void) 58void sb1250_smp_finish(void)
59{ 59{
60 extern void sb1250_time_init(void); 60 extern void sb1250_clockevent_init(void);
61 sb1250_time_init(); 61
62 sb1250_clockevent_init();
62 local_irq_enable(); 63 local_irq_enable();
63} 64}
64 65
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index fe11fed8e0d7..9ef54628bc9c 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -100,6 +100,7 @@ static void sibyte_set_mode(enum clock_event_mode mode,
100 break; 100 break;
101 101
102 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */ 102 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
103 case CLOCK_EVT_MODE_RESUME:
103 ; 104 ;
104 } 105 }
105} 106}
@@ -144,79 +145,7 @@ static struct irqaction sibyte_irqaction = {
144 .name = "timer", 145 .name = "timer",
145}; 146};
146 147
147/* 148void __cpuinit sb1250_clockevent_init(void)
148 * The general purpose timer ticks at 1 Mhz independent if
149 * the rest of the system
150 */
151static void sibyte_set_mode(enum clock_event_mode mode,
152 struct clock_event_device *evt)
153{
154 unsigned int cpu = smp_processor_id();
155 void __iomem *timer_cfg, *timer_init;
156
157 timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
158 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
159
160 switch (mode) {
161 case CLOCK_EVT_MODE_PERIODIC:
162 __raw_writeq(0, timer_cfg);
163 __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, timer_init);
164 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
165 timer_cfg);
166 break;
167
168 case CLOCK_EVT_MODE_ONESHOT:
169 /* Stop the timer until we actually program a shot */
170 case CLOCK_EVT_MODE_SHUTDOWN:
171 __raw_writeq(0, timer_cfg);
172 break;
173
174 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
175 ;
176 }
177}
178
179static int
180sibyte_next_event(unsigned long delta, struct clock_event_device *evt)
181{
182 unsigned int cpu = smp_processor_id();
183 void __iomem *timer_cfg, *timer_init;
184
185 timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
186 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
187
188 __raw_writeq(0, timer_cfg);
189 __raw_writeq(delta, timer_init);
190 __raw_writeq(M_SCD_TIMER_ENABLE, timer_cfg);
191
192 return 0;
193}
194
195struct clock_event_device sibyte_hpt_clockevent = {
196 .name = "sb1250-counter",
197 .features = CLOCK_EVT_FEAT_PERIODIC,
198 .set_mode = sibyte_set_mode,
199 .set_next_event = sibyte_next_event,
200 .shift = 32,
201 .irq = 0,
202};
203
204static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
205{
206 struct clock_event_device *cd = &sibyte_hpt_clockevent;
207
208 cd->event_handler(cd);
209
210 return IRQ_HANDLED;
211}
212
213static struct irqaction sibyte_irqaction = {
214 .handler = sibyte_counter_handler,
215 .flags = IRQF_DISABLED | IRQF_PERCPU,
216 .name = "timer",
217};
218
219static void __init sb1250_clockevent_init(void)
220{ 149{
221 struct clock_event_device *cd = &sibyte_hpt_clockevent; 150 struct clock_event_device *cd = &sibyte_hpt_clockevent;
222 unsigned int cpu = smp_processor_id(); 151 unsigned int cpu = smp_processor_id();
@@ -249,12 +178,6 @@ static void __init sb1250_clockevent_init(void)
249 clockevents_register_device(cd); 178 clockevents_register_device(cd);
250} 179}
251 180
252void __init plat_time_init(void)
253{
254 sb1250_clocksource_init();
255 sb1250_clockevent_init();
256}
257
258/* 181/*
259 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over 182 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
260 * again. 183 * again.
@@ -267,3 +190,26 @@ static cycle_t sb1250_hpt_read(void)
267 190
268 return SB1250_HPT_VALUE - count; 191 return SB1250_HPT_VALUE - count;
269} 192}
193
194struct clocksource bcm1250_clocksource = {
195 .name = "MIPS",
196 .rating = 200,
197 .read = sb1250_hpt_read,
198 .mask = CLOCKSOURCE_MASK(32),
199 .shift = 32,
200 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
201};
202
203void __init sb1250_clocksource_init(void)
204{
205 struct clocksource *cs = &bcm1250_clocksource;
206
207 clocksource_set_clock(cs, V_SCD_TIMER_FREQ);
208 clocksource_register(cs);
209}
210
211void __init plat_time_init(void)
212{
213 sb1250_clocksource_init();
214 sb1250_clockevent_init();
215}
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index 8b3ef0e4cd55..080c966263b7 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -69,31 +69,6 @@ const char *get_system_type(void)
69 return "SiByte " SIBYTE_BOARD_NAME; 69 return "SiByte " SIBYTE_BOARD_NAME;
70} 70}
71 71
72void __init plat_time_init(void)
73{
74#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
75 /* Setup HPT */
76 sb1250_hpt_setup();
77#endif
78}
79
80void __init plat_timer_setup(struct irqaction *irq)
81{
82 /*
83 * we don't set up irqaction, because we will deliver timer
84 * interrupts through low-level (direct) meachanism.
85 */
86
87 /* We only need to setup the generic timer */
88#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
89 bcm1480_time_init();
90#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
91 sb1250_time_init();
92#else
93#error invalid SiByte board configuration
94#endif
95}
96
97int swarm_be_handler(struct pt_regs *regs, int is_fixup) 72int swarm_be_handler(struct pt_regs *regs, int is_fixup)
98{ 73{
99 if (!is_fixup && (regs->cp0_cause & 4)) { 74 if (!is_fixup && (regs->cp0_cause & 4)) {
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index b80877349d38..0910b35cb71f 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -121,15 +121,6 @@ void __init plat_time_init(void)
121 setup_pit_timer(); 121 setup_pit_timer();
122} 122}
123 123
124/*
125 * R4k counter based timer interrupt. Works on RM200-225 and possibly
126 * others but not on RM400
127 */
128static void __init sni_cpu_timer_setup(struct irqaction *irq)
129{
130 setup_irq(SNI_MIPS_IRQ_CPU_TIMER, irq);
131}
132
133void __init plat_timer_setup(struct irqaction *irq) 124void __init plat_timer_setup(struct irqaction *irq)
134{ 125{
135 switch (sni_brd_type) { 126 switch (sni_brd_type) {
@@ -139,15 +130,6 @@ void __init plat_timer_setup(struct irqaction *irq)
139 case SNI_BRD_MINITOWER: 130 case SNI_BRD_MINITOWER:
140 sni_a20r_timer_setup(irq); 131 sni_a20r_timer_setup(irq);
141 break; 132 break;
142
143 case SNI_BRD_PCI_TOWER:
144 case SNI_BRD_RM200:
145 case SNI_BRD_PCI_MTOWER:
146 case SNI_BRD_PCI_DESKTOP:
147 case SNI_BRD_PCI_TOWER_CPLUS:
148 case SNI_BRD_PCI_MTOWER_CPLUS:
149 sni_cpu_timer_setup(irq);
150 break;
151 } 133 }
152} 134}
153 135
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 8ce0989671d8..36c5f200eb3d 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -72,22 +72,6 @@ void __init plat_time_init(void)
72#endif 72#endif
73} 73}
74 74
75void __init plat_timer_setup(struct irqaction *irq)
76{
77 setup_irq(TX4927_IRQ_CPU_TIMER, irq);
78
79#ifdef CONFIG_TOSHIBA_RBTX4927
80 {
81 extern void toshiba_rbtx4927_timer_setup(struct irqaction
82 *irq);
83 toshiba_rbtx4927_timer_setup(irq);
84 }
85#endif
86
87 return;
88}
89
90
91#ifdef DEBUG 75#ifdef DEBUG
92void print_cp0(char *key, int num, char *name, u32 val) 76void print_cp0(char *key, int num, char *name, u32 val)
93{ 77{
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index b97102a1c635..c7470fba6180 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -94,7 +94,6 @@
94#define TOSHIBA_RBTX4927_SETUP_EFWFU ( 1 << 3 ) 94#define TOSHIBA_RBTX4927_SETUP_EFWFU ( 1 << 3 )
95#define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 ) 95#define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 )
96#define TOSHIBA_RBTX4927_SETUP_TIME_INIT ( 1 << 5 ) 96#define TOSHIBA_RBTX4927_SETUP_TIME_INIT ( 1 << 5 )
97#define TOSHIBA_RBTX4927_SETUP_TIMER_SETUP ( 1 << 6 )
98#define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 ) 97#define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 )
99#define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 ) 98#define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 )
100#define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 ) 99#define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 )
@@ -108,7 +107,6 @@ static const u32 toshiba_rbtx4927_setup_debug_flag =
108 (TOSHIBA_RBTX4927_SETUP_NONE | TOSHIBA_RBTX4927_SETUP_INFO | 107 (TOSHIBA_RBTX4927_SETUP_NONE | TOSHIBA_RBTX4927_SETUP_INFO |
109 TOSHIBA_RBTX4927_SETUP_WARN | TOSHIBA_RBTX4927_SETUP_EROR | 108 TOSHIBA_RBTX4927_SETUP_WARN | TOSHIBA_RBTX4927_SETUP_EROR |
110 TOSHIBA_RBTX4927_SETUP_EFWFU | TOSHIBA_RBTX4927_SETUP_SETUP | 109 TOSHIBA_RBTX4927_SETUP_EFWFU | TOSHIBA_RBTX4927_SETUP_SETUP |
111 TOSHIBA_RBTX4927_SETUP_TIME_INIT | TOSHIBA_RBTX4927_SETUP_TIMER_SETUP
112 | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 | 110 | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 |
113 TOSHIBA_RBTX4927_SETUP_PCI2 | TOSHIBA_RBTX4927_SETUP_PCI66); 111 TOSHIBA_RBTX4927_SETUP_PCI2 | TOSHIBA_RBTX4927_SETUP_PCI66);
114#endif 112#endif
@@ -947,14 +945,6 @@ toshiba_rbtx4927_time_init(void)
947 945
948} 946}
949 947
950void __init toshiba_rbtx4927_timer_setup(struct irqaction *irq)
951{
952 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
953 "-\n");
954 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_TIMER_SETUP,
955 "+\n");
956}
957
958static int __init toshiba_rbtx4927_rtc_init(void) 948static int __init toshiba_rbtx4927_rtc_init(void)
959{ 949{
960 static struct resource __initdata res = { 950 static struct resource __initdata res = {
diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c
index 04f009ccb0eb..3ba4101d141e 100644
--- a/arch/mips/tx4938/common/setup.c
+++ b/arch/mips/tx4938/common/setup.c
@@ -43,8 +43,3 @@ plat_mem_setup(void)
43{ 43{
44 toshiba_rbtx4938_setup(); 44 toshiba_rbtx4938_setup();
45} 45}
46
47void __init plat_timer_setup(struct irqaction *irq)
48{
49 setup_irq(TX4938_IRQ_CPU_TIMER, irq);
50}
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index 407cec203b29..8d760df686c4 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -48,11 +48,6 @@ void __init plat_time_init(void)
48 mips_hpt_frequency = tclock / 4; 48 mips_hpt_frequency = tclock / 4;
49} 49}
50 50
51void __init plat_timer_setup(struct irqaction *irq)
52{
53 setup_irq(TIMER_IRQ, irq);
54}
55
56void __init plat_mem_setup(void) 51void __init plat_mem_setup(void)
57{ 52{
58 vr41xx_calculate_clock_frequency(); 53 vr41xx_calculate_clock_frequency();
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h
index 4d43dbb7f8b8..af081457f847 100644
--- a/include/asm-mips/sni.h
+++ b/include/asm-mips/sni.h
@@ -141,8 +141,6 @@ extern unsigned int sni_brd_type;
141#define A20R_PT_TIM0_ACK 0xbc050000 141#define A20R_PT_TIM0_ACK 0xbc050000
142#define A20R_PT_TIM1_ACK 0xbc060000 142#define A20R_PT_TIM1_ACK 0xbc060000
143 143
144#define SNI_MIPS_IRQ_CPU_TIMER (MIPS_CPU_IRQ_BASE+7)
145
146#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE 144#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE
147#define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) 145#define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5)
148 146
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index cf76f4f7435f..bc47af313bcd 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -21,6 +21,7 @@
21#include <linux/ptrace.h> 21#include <linux/ptrace.h>
22#include <linux/rtc.h> 22#include <linux/rtc.h>
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/clockchips.h>
24#include <linux/clocksource.h> 25#include <linux/clocksource.h>
25 26
26extern spinlock_t rtc_lock; 27extern spinlock_t rtc_lock;
@@ -83,4 +84,8 @@ static inline void mips_clockevent_init(void)
83} 84}
84#endif 85#endif
85 86
87extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
88extern void clockevent_set_clock(struct clock_event_device *cd,
89 unsigned int clock);
90
86#endif /* _ASM_TIME_H */ 91#endif /* _ASM_TIME_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 03:15:36 -0500