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-rw-r--r--arch/arm/boot/dts/imx6q-phytec-pbab01.dts16
-rw-r--r--arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi82
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabreauto.dtsi132
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi7
-rw-r--r--arch/arm/boot/dts/imx6qdl-wandboard.dtsi3
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts217
7 files changed, 456 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts
index 7d37ec60d58d..5607c331fca8 100644
--- a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts
+++ b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts
@@ -21,10 +21,26 @@
21 status = "okay"; 21 status = "okay";
22}; 22};
23 23
24&gpmi {
25 status = "okay";
26};
27
28&sata {
29 status = "okay";
30};
31
24&uart4 { 32&uart4 {
25 status = "okay"; 33 status = "okay";
26}; 34};
27 35
36&usbh1 {
37 status = "okay";
38};
39
40&usbotg {
41 status = "okay";
42};
43
28&usdhc2 { 44&usdhc2 {
29 status = "okay"; 45 status = "okay";
30}; 46};
diff --git a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
index 0dd5d3bee01b..324f1550976b 100644
--- a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
@@ -18,6 +18,30 @@
18 memory { 18 memory {
19 reg = <0x10000000 0x80000000>; 19 reg = <0x10000000 0x80000000>;
20 }; 20 };
21
22 regulators {
23 compatible = "simple-bus";
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 reg_usb_otg_vbus: regulator@0 {
28 compatible = "regulator-fixed";
29 reg = <0>;
30 regulator-name = "usb_otg_vbus";
31 regulator-min-microvolt = <5000000>;
32 regulator-max-microvolt = <5000000>;
33 gpio = <&gpio4 15 0>;
34 };
35
36 reg_usb_h1_vbus: regulator@1 {
37 compatible = "regulator-fixed";
38 reg = <1>;
39 regulator-name = "usb_h1_vbus";
40 regulator-min-microvolt = <5000000>;
41 regulator-max-microvolt = <5000000>;
42 gpio = <&gpio1 0 0>;
43 };
44 };
21}; 45};
22 46
23&ecspi3 { 47&ecspi3 {
@@ -166,6 +190,28 @@
166 >; 190 >;
167 }; 191 };
168 192
193 pinctrl_gpmi_nand: gpminandgrp {
194 fsl,pins = <
195 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
196 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
197 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
198 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
199 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
200 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
201 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
202 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
203 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
204 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
205 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
206 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
207 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
208 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
209 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
210 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
211 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
212 >;
213 };
214
169 pinctrl_i2c1: i2c1grp { 215 pinctrl_i2c1: i2c1grp {
170 fsl,pins = < 216 fsl,pins = <
171 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 217 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
@@ -180,6 +226,20 @@
180 >; 226 >;
181 }; 227 };
182 228
229 pinctrl_usbh1: usbh1grp {
230 fsl,pins = <
231 MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x80000000
232 >;
233 };
234
235 pinctrl_usbotg: usbotggrp {
236 fsl,pins = <
237 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
238 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
239 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000
240 >;
241 };
242
183 pinctrl_usdhc2: usdhc2grp { 243 pinctrl_usdhc2: usdhc2grp {
184 fsl,pins = < 244 fsl,pins = <
185 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 245 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
@@ -219,12 +279,34 @@
219 status = "disabled"; 279 status = "disabled";
220}; 280};
221 281
282&gpmi {
283 pinctrl-names = "default";
284 pinctrl-0 = <&pinctrl_gpmi_nand>;
285 nand-on-flash-bbt;
286 status = "disabled";
287};
288
222&uart4 { 289&uart4 {
223 pinctrl-names = "default"; 290 pinctrl-names = "default";
224 pinctrl-0 = <&pinctrl_uart4>; 291 pinctrl-0 = <&pinctrl_uart4>;
225 status = "disabled"; 292 status = "disabled";
226}; 293};
227 294
295&usbh1 {
296 vbus-supply = <&reg_usb_h1_vbus>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_usbh1>;
299 status = "disabled";
300};
301
302&usbotg {
303 vbus-supply = <&reg_usb_otg_vbus>;
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_usbotg>;
306 disable-over-current;
307 status = "disabled";
308};
309
228&usdhc2 { 310&usdhc2 {
229 pinctrl-names = "default"; 311 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_usdhc2>; 312 pinctrl-0 = <&pinctrl_usdhc2>;
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 422d169cca1b..fadf4981c0ca 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -30,6 +30,7 @@
30 /* kHz uV */ 30 /* kHz uV */
31 1200000 1275000 31 1200000 1275000
32 996000 1250000 32 996000 1250000
33 852000 1250000
33 792000 1150000 34 792000 1150000
34 396000 975000 35 396000 975000
35 >; 36 >;
@@ -37,6 +38,7 @@
37 /* ARM kHz SOC-PU uV */ 38 /* ARM kHz SOC-PU uV */
38 1200000 1275000 39 1200000 1275000
39 996000 1250000 40 996000 1250000
41 852000 1250000
40 792000 1175000 42 792000 1175000
41 396000 1175000 43 396000 1175000
42 >; 44 >;
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index d2ff7167bb1d..009abd69385d 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -10,11 +10,24 @@
10 * http://www.gnu.org/copyleft/gpl.html 10 * http://www.gnu.org/copyleft/gpl.html
11 */ 11 */
12 12
13#include <dt-bindings/gpio/gpio.h>
14
13/ { 15/ {
14 memory { 16 memory {
15 reg = <0x10000000 0x80000000>; 17 reg = <0x10000000 0x80000000>;
16 }; 18 };
17 19
20 leds {
21 compatible = "gpio-leds";
22 pinctrl-names = "default";
23 pinctrl-0 = <&pinctrl_gpio_leds>;
24
25 user {
26 label = "debug";
27 gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
28 };
29 };
30
18 sound-spdif { 31 sound-spdif {
19 compatible = "fsl,imx-audio-spdif", 32 compatible = "fsl,imx-audio-spdif",
20 "fsl,imx-sabreauto-spdif"; 33 "fsl,imx-sabreauto-spdif";
@@ -63,6 +76,112 @@
63 status = "okay"; 76 status = "okay";
64}; 77};
65 78
79&i2c2 {
80 clock-frequency = <100000>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_i2c2>;
83 status = "okay";
84
85 pmic: pfuze100@08 {
86 compatible = "fsl,pfuze100";
87 reg = <0x08>;
88
89 regulators {
90 sw1a_reg: sw1ab {
91 regulator-min-microvolt = <300000>;
92 regulator-max-microvolt = <1875000>;
93 regulator-boot-on;
94 regulator-always-on;
95 regulator-ramp-delay = <6250>;
96 };
97
98 sw1c_reg: sw1c {
99 regulator-min-microvolt = <300000>;
100 regulator-max-microvolt = <1875000>;
101 regulator-boot-on;
102 regulator-always-on;
103 regulator-ramp-delay = <6250>;
104 };
105
106 sw2_reg: sw2 {
107 regulator-min-microvolt = <800000>;
108 regulator-max-microvolt = <3300000>;
109 regulator-boot-on;
110 regulator-always-on;
111 };
112
113 sw3a_reg: sw3a {
114 regulator-min-microvolt = <400000>;
115 regulator-max-microvolt = <1975000>;
116 regulator-boot-on;
117 regulator-always-on;
118 };
119
120 sw3b_reg: sw3b {
121 regulator-min-microvolt = <400000>;
122 regulator-max-microvolt = <1975000>;
123 regulator-boot-on;
124 regulator-always-on;
125 };
126
127 sw4_reg: sw4 {
128 regulator-min-microvolt = <800000>;
129 regulator-max-microvolt = <3300000>;
130 };
131
132 swbst_reg: swbst {
133 regulator-min-microvolt = <5000000>;
134 regulator-max-microvolt = <5150000>;
135 };
136
137 snvs_reg: vsnvs {
138 regulator-min-microvolt = <1000000>;
139 regulator-max-microvolt = <3000000>;
140 regulator-boot-on;
141 regulator-always-on;
142 };
143
144 vref_reg: vrefddr {
145 regulator-boot-on;
146 regulator-always-on;
147 };
148
149 vgen1_reg: vgen1 {
150 regulator-min-microvolt = <800000>;
151 regulator-max-microvolt = <1550000>;
152 };
153
154 vgen2_reg: vgen2 {
155 regulator-min-microvolt = <800000>;
156 regulator-max-microvolt = <1550000>;
157 };
158
159 vgen3_reg: vgen3 {
160 regulator-min-microvolt = <1800000>;
161 regulator-max-microvolt = <3300000>;
162 };
163
164 vgen4_reg: vgen4 {
165 regulator-min-microvolt = <1800000>;
166 regulator-max-microvolt = <3300000>;
167 regulator-always-on;
168 };
169
170 vgen5_reg: vgen5 {
171 regulator-min-microvolt = <1800000>;
172 regulator-max-microvolt = <3300000>;
173 regulator-always-on;
174 };
175
176 vgen6_reg: vgen6 {
177 regulator-min-microvolt = <1800000>;
178 regulator-max-microvolt = <3300000>;
179 regulator-always-on;
180 };
181 };
182 };
183};
184
66&iomuxc { 185&iomuxc {
67 pinctrl-names = "default"; 186 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_hog>; 187 pinctrl-0 = <&pinctrl_hog>;
@@ -111,6 +230,12 @@
111 >; 230 >;
112 }; 231 };
113 232
233 pinctrl_gpio_leds: gpioledsgrp {
234 fsl,pins = <
235 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x80000000
236 >;
237 };
238
114 pinctrl_gpmi_nand: gpminandgrp { 239 pinctrl_gpmi_nand: gpminandgrp {
115 fsl,pins = < 240 fsl,pins = <
116 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 241 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
@@ -133,6 +258,13 @@
133 >; 258 >;
134 }; 259 };
135 260
261 pinctrl_i2c2: i2c2grp {
262 fsl,pins = <
263 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
264 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
265 >;
266 };
267
136 pinctrl_pwm3: pwm1grp { 268 pinctrl_pwm3: pwm1grp {
137 fsl,pins = < 269 fsl,pins = <
138 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 270 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index bbe2ee15deef..0d816d3be4b6 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -10,6 +10,7 @@
10 * http://www.gnu.org/copyleft/gpl.html 10 * http://www.gnu.org/copyleft/gpl.html
11 */ 11 */
12 12
13#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h> 14#include <dt-bindings/input/input.h>
14 15
15/ { 16/ {
@@ -58,21 +59,21 @@
58 59
59 power { 60 power {
60 label = "Power Button"; 61 label = "Power Button";
61 gpios = <&gpio3 29 0>; 62 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
62 gpio-key,wakeup; 63 gpio-key,wakeup;
63 linux,code = <KEY_POWER>; 64 linux,code = <KEY_POWER>;
64 }; 65 };
65 66
66 volume-up { 67 volume-up {
67 label = "Volume Up"; 68 label = "Volume Up";
68 gpios = <&gpio1 4 0>; 69 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
69 gpio-key,wakeup; 70 gpio-key,wakeup;
70 linux,code = <KEY_VOLUMEUP>; 71 linux,code = <KEY_VOLUMEUP>;
71 }; 72 };
72 73
73 volume-down { 74 volume-down {
74 label = "Volume Down"; 75 label = "Volume Down";
75 gpios = <&gpio1 5 0>; 76 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
76 gpio-key,wakeup; 77 gpio-key,wakeup;
77 linux,code = <KEY_VOLUMEDOWN>; 78 linux,code = <KEY_VOLUMEDOWN>;
78 }; 79 };
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index 81138b70c863..bdfdf89d405f 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -123,6 +123,7 @@
123 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 123 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
124 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 124 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
125 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 125 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
126 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
126 >; 127 >;
127 }; 128 };
128 129
@@ -201,6 +202,8 @@
201 pinctrl-0 = <&pinctrl_enet>; 202 pinctrl-0 = <&pinctrl_enet>;
202 phy-mode = "rgmii"; 203 phy-mode = "rgmii";
203 phy-reset-gpios = <&gpio3 29 0>; 204 phy-reset-gpios = <&gpio3 29 0>;
205 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
206 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
204 status = "okay"; 207 status = "okay";
205}; 208};
206 209
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index 000180428742..864d8dfb51ca 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -8,6 +8,7 @@
8 8
9/dts-v1/; 9/dts-v1/;
10 10
11#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/input/input.h> 12#include <dt-bindings/input/input.h>
12#include "imx6sl.dtsi" 13#include "imx6sl.dtsi"
13 14
@@ -19,6 +20,18 @@
19 reg = <0x80000000 0x40000000>; 20 reg = <0x80000000 0x40000000>;
20 }; 21 };
21 22
23 leds {
24 compatible = "gpio-leds";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_led>;
27
28 user {
29 label = "debug";
30 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
31 linux,default-trigger = "heartbeat";
32 };
33 };
34
22 regulators { 35 regulators {
23 compatible = "simple-bus"; 36 compatible = "simple-bus";
24 #address-cells = <1>; 37 #address-cells = <1>;
@@ -43,9 +56,49 @@
43 gpio = <&gpio4 2 0>; 56 gpio = <&gpio4 2 0>;
44 enable-active-high; 57 enable-active-high;
45 }; 58 };
59
60 reg_aud3v: regulator@2 {
61 compatible = "regulator-fixed";
62 reg = <2>;
63 regulator-name = "wm8962-supply-3v15";
64 regulator-min-microvolt = <3150000>;
65 regulator-max-microvolt = <3150000>;
66 regulator-boot-on;
67 };
68
69 reg_aud4v: regulator@3 {
70 compatible = "regulator-fixed";
71 reg = <3>;
72 regulator-name = "wm8962-supply-4v2";
73 regulator-min-microvolt = <4325000>;
74 regulator-max-microvolt = <4325000>;
75 regulator-boot-on;
76 };
77 };
78
79 sound {
80 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
81 model = "wm8962-audio";
82 ssi-controller = <&ssi2>;
83 audio-codec = <&codec>;
84 audio-routing =
85 "Headphone Jack", "HPOUTL",
86 "Headphone Jack", "HPOUTR",
87 "Ext Spk", "SPKOUTL",
88 "Ext Spk", "SPKOUTR",
89 "AMIC", "MICBIAS",
90 "IN3R", "AMIC";
91 mux-int-port = <2>;
92 mux-ext-port = <3>;
46 }; 93 };
47}; 94};
48 95
96&audmux {
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_audmux3>;
99 status = "okay";
100};
101
49&ecspi1 { 102&ecspi1 {
50 fsl,spi-num-chipselects = <1>; 103 fsl,spi-num-chipselects = <1>;
51 cs-gpios = <&gpio4 11 0>; 104 cs-gpios = <&gpio4 11 0>;
@@ -69,6 +122,134 @@
69 status = "okay"; 122 status = "okay";
70}; 123};
71 124
125&i2c1 {
126 clock-frequency = <100000>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_i2c1>;
129 status = "okay";
130
131 pmic: pfuze100@08 {
132 compatible = "fsl,pfuze100";
133 reg = <0x08>;
134
135 regulators {
136 sw1a_reg: sw1ab {
137 regulator-min-microvolt = <300000>;
138 regulator-max-microvolt = <1875000>;
139 regulator-boot-on;
140 regulator-always-on;
141 regulator-ramp-delay = <6250>;
142 };
143
144 sw1c_reg: sw1c {
145 regulator-min-microvolt = <300000>;
146 regulator-max-microvolt = <1875000>;
147 regulator-boot-on;
148 regulator-always-on;
149 regulator-ramp-delay = <6250>;
150 };
151
152 sw2_reg: sw2 {
153 regulator-min-microvolt = <800000>;
154 regulator-max-microvolt = <3300000>;
155 regulator-boot-on;
156 regulator-always-on;
157 };
158
159 sw3a_reg: sw3a {
160 regulator-min-microvolt = <400000>;
161 regulator-max-microvolt = <1975000>;
162 regulator-boot-on;
163 regulator-always-on;
164 };
165
166 sw3b_reg: sw3b {
167 regulator-min-microvolt = <400000>;
168 regulator-max-microvolt = <1975000>;
169 regulator-boot-on;
170 regulator-always-on;
171 };
172
173 sw4_reg: sw4 {
174 regulator-min-microvolt = <800000>;
175 regulator-max-microvolt = <3300000>;
176 };
177
178 swbst_reg: swbst {
179 regulator-min-microvolt = <5000000>;
180 regulator-max-microvolt = <5150000>;
181 };
182
183 snvs_reg: vsnvs {
184 regulator-min-microvolt = <1000000>;
185 regulator-max-microvolt = <3000000>;
186 regulator-boot-on;
187 regulator-always-on;
188 };
189
190 vref_reg: vrefddr {
191 regulator-boot-on;
192 regulator-always-on;
193 };
194
195 vgen1_reg: vgen1 {
196 regulator-min-microvolt = <800000>;
197 regulator-max-microvolt = <1550000>;
198 regulator-always-on;
199 };
200
201 vgen2_reg: vgen2 {
202 regulator-min-microvolt = <800000>;
203 regulator-max-microvolt = <1550000>;
204 };
205
206 vgen3_reg: vgen3 {
207 regulator-min-microvolt = <1800000>;
208 regulator-max-microvolt = <3300000>;
209 };
210
211 vgen4_reg: vgen4 {
212 regulator-min-microvolt = <1800000>;
213 regulator-max-microvolt = <3300000>;
214 regulator-always-on;
215 };
216
217 vgen5_reg: vgen5 {
218 regulator-min-microvolt = <1800000>;
219 regulator-max-microvolt = <3300000>;
220 regulator-always-on;
221 };
222
223 vgen6_reg: vgen6 {
224 regulator-min-microvolt = <1800000>;
225 regulator-max-microvolt = <3300000>;
226 regulator-always-on;
227 };
228 };
229 };
230};
231
232&i2c2 {
233 clock-frequency = <100000>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_i2c2>;
236 status = "okay";
237
238 codec: wm8962@1a {
239 compatible = "wlf,wm8962";
240 reg = <0x1a>;
241 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
242 DCVDD-supply = <&vgen3_reg>;
243 DBVDD-supply = <&reg_aud3v>;
244 AVDD-supply = <&vgen3_reg>;
245 CPVDD-supply = <&vgen3_reg>;
246 MICVDD-supply = <&reg_aud3v>;
247 PLLVDD-supply = <&vgen3_reg>;
248 SPKVDD1-supply = <&reg_aud4v>;
249 SPKVDD2-supply = <&reg_aud4v>;
250 };
251};
252
72&iomuxc { 253&iomuxc {
73 pinctrl-names = "default"; 254 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_hog>; 255 pinctrl-0 = <&pinctrl_hog>;
@@ -83,6 +264,16 @@
83 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 264 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
84 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000 265 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
85 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000 266 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
267 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
268 >;
269 };
270
271 pinctrl_audmux3: audmux3grp {
272 fsl,pins = <
273 MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
274 MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
275 MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
276 MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
86 >; 277 >;
87 }; 278 };
88 279
@@ -108,6 +299,27 @@
108 >; 299 >;
109 }; 300 };
110 301
302 pinctrl_i2c1: i2c1grp {
303 fsl,pins = <
304 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
305 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
306 >;
307 };
308
309
310 pinctrl_i2c2: i2c2grp {
311 fsl,pins = <
312 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
313 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
314 >;
315 };
316
317 pinctrl_led: ledgrp {
318 fsl,pins = <
319 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
320 >;
321 };
322
111 pinctrl_kpp: kppgrp { 323 pinctrl_kpp: kppgrp {
112 fsl,pins = < 324 fsl,pins = <
113 MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010 325 MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
@@ -261,6 +473,11 @@
261 status = "okay"; 473 status = "okay";
262}; 474};
263 475
476&ssi2 {
477 fsl,mode = "i2s-slave";
478 status = "okay";
479};
480
264&uart1 { 481&uart1 {
265 pinctrl-names = "default"; 482 pinctrl-names = "default";
266 pinctrl-0 = <&pinctrl_uart1>; 483 pinctrl-0 = <&pinctrl_uart1>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 18:10:26 -0400