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-rw-r--r--drivers/infiniband/hw/mlx4/cq.c2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/Makefile2
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/cq.c10
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_clock.c151
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_cq.c10
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_ethtool.c30
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_main.c5
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_netdev.c99
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_resources.c3
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_rx.c29
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_tx.c31
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/fw.c18
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/fw.h1
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/main.c79
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mlx4.h6
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mlx4_en.h25
-rw-r--r--include/linux/mlx4/cq.h16
-rw-r--r--include/linux/mlx4/device.h10
18 files changed, 507 insertions, 20 deletions
diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c
index ae67df35dd4d..73b3a7132587 100644
--- a/drivers/infiniband/hw/mlx4/cq.c
+++ b/drivers/infiniband/hw/mlx4/cq.c
@@ -228,7 +228,7 @@ struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector
228 vector = dev->eq_table[vector % ibdev->num_comp_vectors]; 228 vector = dev->eq_table[vector % ibdev->num_comp_vectors];
229 229
230 err = mlx4_cq_alloc(dev->dev, entries, &cq->buf.mtt, uar, 230 err = mlx4_cq_alloc(dev->dev, entries, &cq->buf.mtt, uar,
231 cq->db.dma, &cq->mcq, vector, 0); 231 cq->db.dma, &cq->mcq, vector, 0, 0);
232 if (err) 232 if (err)
233 goto err_dbmap; 233 goto err_dbmap;
234 234
diff --git a/drivers/net/ethernet/mellanox/mlx4/Makefile b/drivers/net/ethernet/mellanox/mlx4/Makefile
index 293127d28b33..3e9c70f15b42 100644
--- a/drivers/net/ethernet/mellanox/mlx4/Makefile
+++ b/drivers/net/ethernet/mellanox/mlx4/Makefile
@@ -6,5 +6,5 @@ mlx4_core-y := alloc.o catas.o cmd.o cq.o eq.o fw.o icm.o intf.o main.o mcg.o \
6obj-$(CONFIG_MLX4_EN) += mlx4_en.o 6obj-$(CONFIG_MLX4_EN) += mlx4_en.o
7 7
8mlx4_en-y := en_main.o en_tx.o en_rx.o en_ethtool.o en_port.o en_cq.o \ 8mlx4_en-y := en_main.o en_tx.o en_rx.o en_ethtool.o en_port.o en_cq.o \
9 en_resources.o en_netdev.o en_selftest.o 9 en_resources.o en_netdev.o en_selftest.o en_clock.o
10mlx4_en-$(CONFIG_MLX4_EN_DCB) += en_dcb_nl.o 10mlx4_en-$(CONFIG_MLX4_EN_DCB) += en_dcb_nl.o
diff --git a/drivers/net/ethernet/mellanox/mlx4/cq.c b/drivers/net/ethernet/mellanox/mlx4/cq.c
index 0706623cfb96..004e4231af67 100644
--- a/drivers/net/ethernet/mellanox/mlx4/cq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/cq.c
@@ -240,9 +240,10 @@ static void mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn)
240 __mlx4_cq_free_icm(dev, cqn); 240 __mlx4_cq_free_icm(dev, cqn);
241} 241}
242 242
243int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, 243int mlx4_cq_alloc(struct mlx4_dev *dev, int nent,
244 struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq, 244 struct mlx4_mtt *mtt, struct mlx4_uar *uar, u64 db_rec,
245 unsigned vector, int collapsed) 245 struct mlx4_cq *cq, unsigned vector, int collapsed,
246 int timestamp_en)
246{ 247{
247 struct mlx4_priv *priv = mlx4_priv(dev); 248 struct mlx4_priv *priv = mlx4_priv(dev);
248 struct mlx4_cq_table *cq_table = &priv->cq_table; 249 struct mlx4_cq_table *cq_table = &priv->cq_table;
@@ -276,6 +277,9 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
276 memset(cq_context, 0, sizeof *cq_context); 277 memset(cq_context, 0, sizeof *cq_context);
277 278
278 cq_context->flags = cpu_to_be32(!!collapsed << 18); 279 cq_context->flags = cpu_to_be32(!!collapsed << 18);
280 if (timestamp_en)
281 cq_context->flags |= cpu_to_be32(1 << 19);
282
279 cq_context->logsize_usrpage = cpu_to_be32((ilog2(nent) << 24) | uar->index); 283 cq_context->logsize_usrpage = cpu_to_be32((ilog2(nent) << 24) | uar->index);
280 cq_context->comp_eqn = priv->eq_table.eq[vector].eqn; 284 cq_context->comp_eqn = priv->eq_table.eq[vector].eqn;
281 cq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; 285 cq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT;
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c
new file mode 100644
index 000000000000..2f181219662e
--- /dev/null
+++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c
@@ -0,0 +1,151 @@
1/*
2 * Copyright (c) 2012 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/mlx4/device.h>
35
36#include "mlx4_en.h"
37
38int mlx4_en_timestamp_config(struct net_device *dev, int tx_type, int rx_filter)
39{
40 struct mlx4_en_priv *priv = netdev_priv(dev);
41 struct mlx4_en_dev *mdev = priv->mdev;
42 int port_up = 0;
43 int err = 0;
44
45 mutex_lock(&mdev->state_lock);
46 if (priv->port_up) {
47 port_up = 1;
48 mlx4_en_stop_port(dev, 1);
49 }
50
51 mlx4_en_free_resources(priv);
52
53 en_warn(priv, "Changing Time Stamp configuration\n");
54
55 priv->hwtstamp_config.tx_type = tx_type;
56 priv->hwtstamp_config.rx_filter = rx_filter;
57
58 if (rx_filter != HWTSTAMP_FILTER_NONE)
59 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
60 else
61 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
62
63 err = mlx4_en_alloc_resources(priv);
64 if (err) {
65 en_err(priv, "Failed reallocating port resources\n");
66 goto out;
67 }
68 if (port_up) {
69 err = mlx4_en_start_port(dev);
70 if (err)
71 en_err(priv, "Failed starting port\n");
72 }
73
74out:
75 mutex_unlock(&mdev->state_lock);
76 netdev_features_change(dev);
77 return err;
78}
79
80/* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
81 */
82static cycle_t mlx4_en_read_clock(const struct cyclecounter *tc)
83{
84 struct mlx4_en_dev *mdev =
85 container_of(tc, struct mlx4_en_dev, cycles);
86 struct mlx4_dev *dev = mdev->dev;
87
88 return mlx4_read_clock(dev) & tc->mask;
89}
90
91u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
92{
93 u64 hi, lo;
94 struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
95
96 lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
97 hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
98
99 return hi | lo;
100}
101
102void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
103 struct skb_shared_hwtstamps *hwts,
104 u64 timestamp)
105{
106 u64 nsec;
107
108 nsec = timecounter_cyc2time(&mdev->clock, timestamp);
109
110 memset(hwts, 0, sizeof(struct skb_shared_hwtstamps));
111 hwts->hwtstamp = ns_to_ktime(nsec);
112}
113
114void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
115{
116 struct mlx4_dev *dev = mdev->dev;
117
118 memset(&mdev->cycles, 0, sizeof(mdev->cycles));
119 mdev->cycles.read = mlx4_en_read_clock;
120 mdev->cycles.mask = CLOCKSOURCE_MASK(48);
121 /* Using shift to make calculation more accurate. Since current HW
122 * clock frequency is 427 MHz, and cycles are given using a 48 bits
123 * register, the biggest shift when calculating using u64, is 14
124 * (max_cycles * multiplier < 2^64)
125 */
126 mdev->cycles.shift = 14;
127 mdev->cycles.mult =
128 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
129
130 timecounter_init(&mdev->clock, &mdev->cycles,
131 ktime_to_ns(ktime_get_real()));
132
133 /* Calculate period in seconds to call the overflow watchdog - to make
134 * sure counter is checked at least once every wrap around.
135 */
136 mdev->overflow_period =
137 (cyclecounter_cyc2ns(&mdev->cycles,
138 mdev->cycles.mask) / NSEC_PER_SEC / 2)
139 * HZ;
140}
141
142void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev)
143{
144 bool timeout = time_is_before_jiffies(mdev->last_overflow_check +
145 mdev->overflow_period);
146
147 if (timeout) {
148 timecounter_read(&mdev->clock);
149 mdev->last_overflow_check = jiffies;
150 }
151}
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
index b8d0854a7ad1..1e6c594d6d04 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
@@ -77,6 +77,7 @@ int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
77 struct mlx4_en_dev *mdev = priv->mdev; 77 struct mlx4_en_dev *mdev = priv->mdev;
78 int err = 0; 78 int err = 0;
79 char name[25]; 79 char name[25];
80 int timestamp_en = 0;
80 struct cpu_rmap *rmap = 81 struct cpu_rmap *rmap =
81#ifdef CONFIG_RFS_ACCEL 82#ifdef CONFIG_RFS_ACCEL
82 priv->dev->rx_cpu_rmap; 83 priv->dev->rx_cpu_rmap;
@@ -123,8 +124,13 @@ int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
123 if (!cq->is_tx) 124 if (!cq->is_tx)
124 cq->size = priv->rx_ring[cq->ring].actual_size; 125 cq->size = priv->rx_ring[cq->ring].actual_size;
125 126
126 err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt, &mdev->priv_uar, 127 if ((cq->is_tx && priv->hwtstamp_config.tx_type) ||
127 cq->wqres.db.dma, &cq->mcq, cq->vector, 0); 128 (!cq->is_tx && priv->hwtstamp_config.rx_filter))
129 timestamp_en = 1;
130
131 err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt,
132 &mdev->priv_uar, cq->wqres.db.dma, &cq->mcq,
133 cq->vector, 0, timestamp_en);
128 if (err) 134 if (err)
129 return err; 135 return err;
130 136
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
index 00f25b5f297f..bcf4d118e98c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c
@@ -1147,6 +1147,35 @@ out:
1147 return err; 1147 return err;
1148} 1148}
1149 1149
1150static int mlx4_en_get_ts_info(struct net_device *dev,
1151 struct ethtool_ts_info *info)
1152{
1153 struct mlx4_en_priv *priv = netdev_priv(dev);
1154 struct mlx4_en_dev *mdev = priv->mdev;
1155 int ret;
1156
1157 ret = ethtool_op_get_ts_info(dev, info);
1158 if (ret)
1159 return ret;
1160
1161 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1162 info->so_timestamping |=
1163 SOF_TIMESTAMPING_TX_HARDWARE |
1164 SOF_TIMESTAMPING_RX_HARDWARE |
1165 SOF_TIMESTAMPING_RAW_HARDWARE;
1166
1167 info->tx_types =
1168 (1 << HWTSTAMP_TX_OFF) |
1169 (1 << HWTSTAMP_TX_ON);
1170
1171 info->rx_filters =
1172 (1 << HWTSTAMP_FILTER_NONE) |
1173 (1 << HWTSTAMP_FILTER_ALL);
1174 }
1175
1176 return ret;
1177}
1178
1150const struct ethtool_ops mlx4_en_ethtool_ops = { 1179const struct ethtool_ops mlx4_en_ethtool_ops = {
1151 .get_drvinfo = mlx4_en_get_drvinfo, 1180 .get_drvinfo = mlx4_en_get_drvinfo,
1152 .get_settings = mlx4_en_get_settings, 1181 .get_settings = mlx4_en_get_settings,
@@ -1173,6 +1202,7 @@ const struct ethtool_ops mlx4_en_ethtool_ops = {
1173 .set_rxfh_indir = mlx4_en_set_rxfh_indir, 1202 .set_rxfh_indir = mlx4_en_set_rxfh_indir,
1174 .get_channels = mlx4_en_get_channels, 1203 .get_channels = mlx4_en_get_channels,
1175 .set_channels = mlx4_en_set_channels, 1204 .set_channels = mlx4_en_set_channels,
1205 .get_ts_info = mlx4_en_get_ts_info,
1176}; 1206};
1177 1207
1178 1208
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_main.c b/drivers/net/ethernet/mellanox/mlx4/en_main.c
index fc27800e9c38..a5c9df07a7d0 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_main.c
@@ -300,6 +300,11 @@ static void *mlx4_en_add(struct mlx4_dev *dev)
300 if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i])) 300 if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i]))
301 mdev->pndev[i] = NULL; 301 mdev->pndev[i] = NULL;
302 } 302 }
303
304 /* Initialize time stamp mechanism */
305 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
306 mlx4_en_init_timestamp(mdev);
307
303 return mdev; 308 return mdev;
304 309
305err_mr: 310err_mr:
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
index e7e27842d8d4..f4f88b846020 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
@@ -1361,6 +1361,26 @@ static void mlx4_en_do_get_stats(struct work_struct *work)
1361 mutex_unlock(&mdev->state_lock); 1361 mutex_unlock(&mdev->state_lock);
1362} 1362}
1363 1363
1364/* mlx4_en_service_task - Run service task for tasks that needed to be done
1365 * periodically
1366 */
1367static void mlx4_en_service_task(struct work_struct *work)
1368{
1369 struct delayed_work *delay = to_delayed_work(work);
1370 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1371 service_task);
1372 struct mlx4_en_dev *mdev = priv->mdev;
1373
1374 mutex_lock(&mdev->state_lock);
1375 if (mdev->device_up) {
1376 mlx4_en_ptp_overflow_check(mdev);
1377
1378 queue_delayed_work(mdev->workqueue, &priv->service_task,
1379 SERVICE_TASK_DELAY);
1380 }
1381 mutex_unlock(&mdev->state_lock);
1382}
1383
1364static void mlx4_en_linkstate(struct work_struct *work) 1384static void mlx4_en_linkstate(struct work_struct *work)
1365{ 1385{
1366 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, 1386 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
@@ -1865,6 +1885,7 @@ void mlx4_en_destroy_netdev(struct net_device *dev)
1865 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); 1885 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
1866 1886
1867 cancel_delayed_work(&priv->stats_task); 1887 cancel_delayed_work(&priv->stats_task);
1888 cancel_delayed_work(&priv->service_task);
1868 /* flush any pending task for this netdev */ 1889 /* flush any pending task for this netdev */
1869 flush_workqueue(mdev->workqueue); 1890 flush_workqueue(mdev->workqueue);
1870 1891
@@ -1916,6 +1937,75 @@ static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
1916 return 0; 1937 return 0;
1917} 1938}
1918 1939
1940static int mlx4_en_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
1941{
1942 struct mlx4_en_priv *priv = netdev_priv(dev);
1943 struct mlx4_en_dev *mdev = priv->mdev;
1944 struct hwtstamp_config config;
1945
1946 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1947 return -EFAULT;
1948
1949 /* reserved for future extensions */
1950 if (config.flags)
1951 return -EINVAL;
1952
1953 /* device doesn't support time stamping */
1954 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
1955 return -EINVAL;
1956
1957 /* TX HW timestamp */
1958 switch (config.tx_type) {
1959 case HWTSTAMP_TX_OFF:
1960 case HWTSTAMP_TX_ON:
1961 break;
1962 default:
1963 return -ERANGE;
1964 }
1965
1966 /* RX HW timestamp */
1967 switch (config.rx_filter) {
1968 case HWTSTAMP_FILTER_NONE:
1969 break;
1970 case HWTSTAMP_FILTER_ALL:
1971 case HWTSTAMP_FILTER_SOME:
1972 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1973 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1974 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1975 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1976 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1977 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1978 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1979 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1980 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1981 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1982 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1983 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1984 config.rx_filter = HWTSTAMP_FILTER_ALL;
1985 break;
1986 default:
1987 return -ERANGE;
1988 }
1989
1990 if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) {
1991 config.tx_type = HWTSTAMP_TX_OFF;
1992 config.rx_filter = HWTSTAMP_FILTER_NONE;
1993 }
1994
1995 return copy_to_user(ifr->ifr_data, &config,
1996 sizeof(config)) ? -EFAULT : 0;
1997}
1998
1999static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2000{
2001 switch (cmd) {
2002 case SIOCSHWTSTAMP:
2003 return mlx4_en_hwtstamp_ioctl(dev, ifr);
2004 default:
2005 return -EOPNOTSUPP;
2006 }
2007}
2008
1919static int mlx4_en_set_features(struct net_device *netdev, 2009static int mlx4_en_set_features(struct net_device *netdev,
1920 netdev_features_t features) 2010 netdev_features_t features)
1921{ 2011{
@@ -1943,6 +2033,7 @@ static const struct net_device_ops mlx4_netdev_ops = {
1943 .ndo_set_mac_address = mlx4_en_set_mac, 2033 .ndo_set_mac_address = mlx4_en_set_mac,
1944 .ndo_validate_addr = eth_validate_addr, 2034 .ndo_validate_addr = eth_validate_addr,
1945 .ndo_change_mtu = mlx4_en_change_mtu, 2035 .ndo_change_mtu = mlx4_en_change_mtu,
2036 .ndo_do_ioctl = mlx4_en_ioctl,
1946 .ndo_tx_timeout = mlx4_en_tx_timeout, 2037 .ndo_tx_timeout = mlx4_en_tx_timeout,
1947 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, 2038 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
1948 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, 2039 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
@@ -2014,6 +2105,7 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2014 INIT_WORK(&priv->watchdog_task, mlx4_en_restart); 2105 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
2015 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); 2106 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
2016 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); 2107 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
2108 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
2017#ifdef CONFIG_MLX4_EN_DCB 2109#ifdef CONFIG_MLX4_EN_DCB
2018 if (!mlx4_is_slave(priv->mdev->dev)) { 2110 if (!mlx4_is_slave(priv->mdev->dev)) {
2019 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) { 2111 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
@@ -2054,6 +2146,11 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2054 spin_lock_init(&priv->filters_lock); 2146 spin_lock_init(&priv->filters_lock);
2055#endif 2147#endif
2056 2148
2149 /* Initialize time stamping config */
2150 priv->hwtstamp_config.flags = 0;
2151 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
2152 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
2153
2057 /* Allocate page for receive rings */ 2154 /* Allocate page for receive rings */
2058 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, 2155 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
2059 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE); 2156 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
@@ -2131,6 +2228,8 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2131 } 2228 }
2132 mlx4_en_set_default_moderation(priv); 2229 mlx4_en_set_default_moderation(priv);
2133 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); 2230 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
2231 queue_delayed_work(mdev->workqueue, &priv->service_task,
2232 SERVICE_TASK_DELAY);
2134 return 0; 2233 return 0;
2135 2234
2136out: 2235out:
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_resources.c b/drivers/net/ethernet/mellanox/mlx4/en_resources.c
index 10c24c784b70..91f2b2c43c12 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_resources.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_resources.c
@@ -42,6 +42,7 @@ void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
42 int user_prio, struct mlx4_qp_context *context) 42 int user_prio, struct mlx4_qp_context *context)
43{ 43{
44 struct mlx4_en_dev *mdev = priv->mdev; 44 struct mlx4_en_dev *mdev = priv->mdev;
45 struct net_device *dev = priv->dev;
45 46
46 memset(context, 0, sizeof *context); 47 memset(context, 0, sizeof *context);
47 context->flags = cpu_to_be32(7 << 16 | rss << MLX4_RSS_QPC_FLAG_OFFSET); 48 context->flags = cpu_to_be32(7 << 16 | rss << MLX4_RSS_QPC_FLAG_OFFSET);
@@ -65,6 +66,8 @@ void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
65 context->cqn_send = cpu_to_be32(cqn); 66 context->cqn_send = cpu_to_be32(cqn);
66 context->cqn_recv = cpu_to_be32(cqn); 67 context->cqn_recv = cpu_to_be32(cqn);
67 context->db_rec_addr = cpu_to_be64(priv->res.db.dma << 2); 68 context->db_rec_addr = cpu_to_be64(priv->res.db.dma << 2);
69 if (!(dev->features & NETIF_F_HW_VLAN_CTAG_RX))
70 context->param3 |= cpu_to_be32(1 << 30);
68} 71}
69 72
70 73
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
index 4006f8857cb5..02aee1ebd203 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
@@ -320,6 +320,8 @@ int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
320 } 320 }
321 ring->buf = ring->wqres.buf.direct.buf; 321 ring->buf = ring->wqres.buf.direct.buf;
322 322
323 ring->hwtstamp_rx_filter = priv->hwtstamp_config.rx_filter;
324
323 return 0; 325 return 0;
324 326
325err_hwq: 327err_hwq:
@@ -554,6 +556,7 @@ static void mlx4_en_refill_rx_buffers(struct mlx4_en_priv *priv,
554int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget) 556int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
555{ 557{
556 struct mlx4_en_priv *priv = netdev_priv(dev); 558 struct mlx4_en_priv *priv = netdev_priv(dev);
559 struct mlx4_en_dev *mdev = priv->mdev;
557 struct mlx4_cqe *cqe; 560 struct mlx4_cqe *cqe;
558 struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring]; 561 struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
559 struct mlx4_en_rx_alloc *frags; 562 struct mlx4_en_rx_alloc *frags;
@@ -565,6 +568,7 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
565 int polled = 0; 568 int polled = 0;
566 int ip_summed; 569 int ip_summed;
567 int factor = priv->cqe_factor; 570 int factor = priv->cqe_factor;
571 u64 timestamp;
568 572
569 if (!priv->port_up) 573 if (!priv->port_up)
570 return 0; 574 return 0;
@@ -669,8 +673,9 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
669 gro_skb->data_len = length; 673 gro_skb->data_len = length;
670 gro_skb->ip_summed = CHECKSUM_UNNECESSARY; 674 gro_skb->ip_summed = CHECKSUM_UNNECESSARY;
671 675
672 if (cqe->vlan_my_qpn & 676 if ((cqe->vlan_my_qpn &
673 cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK)) { 677 cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK)) &&
678 (dev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
674 u16 vid = be16_to_cpu(cqe->sl_vid); 679 u16 vid = be16_to_cpu(cqe->sl_vid);
675 680
676 __vlan_hwaccel_put_tag(gro_skb, htons(ETH_P_8021Q), vid); 681 __vlan_hwaccel_put_tag(gro_skb, htons(ETH_P_8021Q), vid);
@@ -680,8 +685,15 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
680 gro_skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid); 685 gro_skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid);
681 686
682 skb_record_rx_queue(gro_skb, cq->ring); 687 skb_record_rx_queue(gro_skb, cq->ring);
683 napi_gro_frags(&cq->napi);
684 688
689 if (ring->hwtstamp_rx_filter == HWTSTAMP_FILTER_ALL) {
690 timestamp = mlx4_en_get_cqe_ts(cqe);
691 mlx4_en_fill_hwtstamps(mdev,
692 skb_hwtstamps(gro_skb),
693 timestamp);
694 }
695
696 napi_gro_frags(&cq->napi);
685 goto next; 697 goto next;
686 } 698 }
687 699
@@ -714,10 +726,17 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
714 if (dev->features & NETIF_F_RXHASH) 726 if (dev->features & NETIF_F_RXHASH)
715 skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid); 727 skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid);
716 728
717 if (be32_to_cpu(cqe->vlan_my_qpn) & 729 if ((be32_to_cpu(cqe->vlan_my_qpn) &
718 MLX4_CQE_VLAN_PRESENT_MASK) 730 MLX4_CQE_VLAN_PRESENT_MASK) &&
731 (dev->features & NETIF_F_HW_VLAN_CTAG_RX))
719 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), be16_to_cpu(cqe->sl_vid)); 732 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), be16_to_cpu(cqe->sl_vid));
720 733
734 if (ring->hwtstamp_rx_filter == HWTSTAMP_FILTER_ALL) {
735 timestamp = mlx4_en_get_cqe_ts(cqe);
736 mlx4_en_fill_hwtstamps(mdev, skb_hwtstamps(skb),
737 timestamp);
738 }
739
721 /* Push it up the stack */ 740 /* Push it up the stack */
722 netif_receive_skb(skb); 741 netif_receive_skb(skb);
723 742
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_tx.c b/drivers/net/ethernet/mellanox/mlx4/en_tx.c
index 49308cc65ee7..4e6877a032a8 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_tx.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_tx.c
@@ -118,6 +118,8 @@ int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
118 } else 118 } else
119 ring->bf_enabled = true; 119 ring->bf_enabled = true;
120 120
121 ring->hwtstamp_tx_type = priv->hwtstamp_config.tx_type;
122
121 return 0; 123 return 0;
122 124
123err_map: 125err_map:
@@ -192,8 +194,9 @@ void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
192 194
193static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv, 195static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
194 struct mlx4_en_tx_ring *ring, 196 struct mlx4_en_tx_ring *ring,
195 int index, u8 owner) 197 int index, u8 owner, u64 timestamp)
196{ 198{
199 struct mlx4_en_dev *mdev = priv->mdev;
197 struct mlx4_en_tx_info *tx_info = &ring->tx_info[index]; 200 struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
198 struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE; 201 struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
199 struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset; 202 struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset;
@@ -204,6 +207,12 @@ static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
204 int i; 207 int i;
205 __be32 *ptr = (__be32 *)tx_desc; 208 __be32 *ptr = (__be32 *)tx_desc;
206 __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT)); 209 __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT));
210 struct skb_shared_hwtstamps hwts;
211
212 if (timestamp) {
213 mlx4_en_fill_hwtstamps(mdev, &hwts, timestamp);
214 skb_tstamp_tx(skb, &hwts);
215 }
207 216
208 /* Optimize the common case when there are no wraparounds */ 217 /* Optimize the common case when there are no wraparounds */
209 if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) { 218 if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
@@ -289,7 +298,7 @@ int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring)
289 while (ring->cons != ring->prod) { 298 while (ring->cons != ring->prod) {
290 ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring, 299 ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring,
291 ring->cons & ring->size_mask, 300 ring->cons & ring->size_mask,
292 !!(ring->cons & ring->size)); 301 !!(ring->cons & ring->size), 0);
293 ring->cons += ring->last_nr_txbb; 302 ring->cons += ring->last_nr_txbb;
294 cnt++; 303 cnt++;
295 } 304 }
@@ -318,6 +327,7 @@ static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
318 u32 packets = 0; 327 u32 packets = 0;
319 u32 bytes = 0; 328 u32 bytes = 0;
320 int factor = priv->cqe_factor; 329 int factor = priv->cqe_factor;
330 u64 timestamp = 0;
321 331
322 if (!priv->port_up) 332 if (!priv->port_up)
323 return; 333 return;
@@ -341,11 +351,14 @@ static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
341 do { 351 do {
342 txbbs_skipped += ring->last_nr_txbb; 352 txbbs_skipped += ring->last_nr_txbb;
343 ring_index = (ring_index + ring->last_nr_txbb) & size_mask; 353 ring_index = (ring_index + ring->last_nr_txbb) & size_mask;
354 if (ring->tx_info[ring_index].ts_requested)
355 timestamp = mlx4_en_get_cqe_ts(cqe);
356
344 /* free next descriptor */ 357 /* free next descriptor */
345 ring->last_nr_txbb = mlx4_en_free_tx_desc( 358 ring->last_nr_txbb = mlx4_en_free_tx_desc(
346 priv, ring, ring_index, 359 priv, ring, ring_index,
347 !!((ring->cons + txbbs_skipped) & 360 !!((ring->cons + txbbs_skipped) &
348 ring->size)); 361 ring->size), timestamp);
349 packets++; 362 packets++;
350 bytes += ring->tx_info[ring_index].nr_bytes; 363 bytes += ring->tx_info[ring_index].nr_bytes;
351 } while (ring_index != new_index); 364 } while (ring_index != new_index);
@@ -629,6 +642,16 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
629 tx_info->skb = skb; 642 tx_info->skb = skb;
630 tx_info->nr_txbb = nr_txbb; 643 tx_info->nr_txbb = nr_txbb;
631 644
645 /*
646 * For timestamping add flag to skb_shinfo and
647 * set flag for further reference
648 */
649 if (ring->hwtstamp_tx_type == HWTSTAMP_TX_ON &&
650 skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
651 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
652 tx_info->ts_requested = 1;
653 }
654
632 /* Prepare ctrl segement apart opcode+ownership, which depends on 655 /* Prepare ctrl segement apart opcode+ownership, which depends on
633 * whether LSO is used */ 656 * whether LSO is used */
634 tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag); 657 tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag);
@@ -729,6 +752,8 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
729 if (bounce) 752 if (bounce)
730 tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size); 753 tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size);
731 754
755 skb_tx_timestamp(skb);
756
732 if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tx_tag_present(skb)) { 757 if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tx_tag_present(skb)) {
733 *(__be32 *) (&tx_desc->ctrl.vlan_tag) |= cpu_to_be32(ring->doorbell_qpn); 758 *(__be32 *) (&tx_desc->ctrl.vlan_tag) |= cpu_to_be32(ring->doorbell_qpn);
734 op_own |= htonl((bf_index & 0xffff) << 8); 759 op_own |= htonl((bf_index & 0xffff) << 8);
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c
index ab470d991ade..6776c257bd34 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.c
@@ -130,7 +130,8 @@ static void dump_dev_cap_flags2(struct mlx4_dev *dev, u64 flags)
130 [1] = "RSS Toeplitz Hash Function support", 130 [1] = "RSS Toeplitz Hash Function support",
131 [2] = "RSS XOR Hash Function support", 131 [2] = "RSS XOR Hash Function support",
132 [3] = "Device manage flow steering support", 132 [3] = "Device manage flow steering support",
133 [4] = "Automatic mac reassignment support" 133 [4] = "Automatic MAC reassignment support",
134 [5] = "Time stamping support"
134 }; 135 };
135 int i; 136 int i;
136 137
@@ -444,6 +445,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
444#define QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET 0x38 445#define QUERY_DEV_CAP_MAX_MSG_SZ_OFFSET 0x38
445#define QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b 446#define QUERY_DEV_CAP_MAX_GID_OFFSET 0x3b
446#define QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c 447#define QUERY_DEV_CAP_RATE_SUPPORT_OFFSET 0x3c
448#define QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET 0x3e
447#define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f 449#define QUERY_DEV_CAP_MAX_PKEY_OFFSET 0x3f
448#define QUERY_DEV_CAP_EXT_FLAGS_OFFSET 0x40 450#define QUERY_DEV_CAP_EXT_FLAGS_OFFSET 0x40
449#define QUERY_DEV_CAP_FLAGS_OFFSET 0x44 451#define QUERY_DEV_CAP_FLAGS_OFFSET 0x44
@@ -560,6 +562,9 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
560 dev_cap->fs_max_num_qp_per_entry = field; 562 dev_cap->fs_max_num_qp_per_entry = field;
561 MLX4_GET(stat_rate, outbox, QUERY_DEV_CAP_RATE_SUPPORT_OFFSET); 563 MLX4_GET(stat_rate, outbox, QUERY_DEV_CAP_RATE_SUPPORT_OFFSET);
562 dev_cap->stat_rate_support = stat_rate; 564 dev_cap->stat_rate_support = stat_rate;
565 MLX4_GET(field, outbox, QUERY_DEV_CAP_CQ_TS_SUPPORT_OFFSET);
566 if (field & 0x80)
567 dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_TS;
563 MLX4_GET(ext_flags, outbox, QUERY_DEV_CAP_EXT_FLAGS_OFFSET); 568 MLX4_GET(ext_flags, outbox, QUERY_DEV_CAP_EXT_FLAGS_OFFSET);
564 MLX4_GET(flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET); 569 MLX4_GET(flags, outbox, QUERY_DEV_CAP_FLAGS_OFFSET);
565 dev_cap->flags = flags | (u64)ext_flags << 32; 570 dev_cap->flags = flags | (u64)ext_flags << 32;
@@ -1008,6 +1013,9 @@ int mlx4_QUERY_FW(struct mlx4_dev *dev)
1008#define QUERY_FW_COMM_BASE_OFFSET 0x40 1013#define QUERY_FW_COMM_BASE_OFFSET 0x40
1009#define QUERY_FW_COMM_BAR_OFFSET 0x48 1014#define QUERY_FW_COMM_BAR_OFFSET 0x48
1010 1015
1016#define QUERY_FW_CLOCK_OFFSET 0x50
1017#define QUERY_FW_CLOCK_BAR 0x58
1018
1011 mailbox = mlx4_alloc_cmd_mailbox(dev); 1019 mailbox = mlx4_alloc_cmd_mailbox(dev);
1012 if (IS_ERR(mailbox)) 1020 if (IS_ERR(mailbox))
1013 return PTR_ERR(mailbox); 1021 return PTR_ERR(mailbox);
@@ -1082,6 +1090,12 @@ int mlx4_QUERY_FW(struct mlx4_dev *dev)
1082 fw->comm_bar, fw->comm_base); 1090 fw->comm_bar, fw->comm_base);
1083 mlx4_dbg(dev, "FW size %d KB\n", fw->fw_pages >> 2); 1091 mlx4_dbg(dev, "FW size %d KB\n", fw->fw_pages >> 2);
1084 1092
1093 MLX4_GET(fw->clock_offset, outbox, QUERY_FW_CLOCK_OFFSET);
1094 MLX4_GET(fw->clock_bar, outbox, QUERY_FW_CLOCK_BAR);
1095 fw->clock_bar = (fw->clock_bar >> 6) * 2;
1096 mlx4_dbg(dev, "Internal clock bar:%d offset:0x%llx\n",
1097 fw->clock_bar, fw->clock_offset);
1098
1085 /* 1099 /*
1086 * Round up number of system pages needed in case 1100 * Round up number of system pages needed in case
1087 * MLX4_ICM_PAGE_SIZE < PAGE_SIZE. 1101 * MLX4_ICM_PAGE_SIZE < PAGE_SIZE.
@@ -1369,6 +1383,7 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
1369 u8 byte_field; 1383 u8 byte_field;
1370 1384
1371#define QUERY_HCA_GLOBAL_CAPS_OFFSET 0x04 1385#define QUERY_HCA_GLOBAL_CAPS_OFFSET 0x04
1386#define QUERY_HCA_CORE_CLOCK_OFFSET 0x0c
1372 1387
1373 mailbox = mlx4_alloc_cmd_mailbox(dev); 1388 mailbox = mlx4_alloc_cmd_mailbox(dev);
1374 if (IS_ERR(mailbox)) 1389 if (IS_ERR(mailbox))
@@ -1383,6 +1398,7 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev,
1383 goto out; 1398 goto out;
1384 1399
1385 MLX4_GET(param->global_caps, outbox, QUERY_HCA_GLOBAL_CAPS_OFFSET); 1400 MLX4_GET(param->global_caps, outbox, QUERY_HCA_GLOBAL_CAPS_OFFSET);
1401 MLX4_GET(param->hca_core_clock, outbox, QUERY_HCA_CORE_CLOCK_OFFSET);
1386 1402
1387 /* QPC/EEC/CQC/EQC/RDMARC attributes */ 1403 /* QPC/EEC/CQC/EQC/RDMARC attributes */
1388 1404
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.h b/drivers/net/ethernet/mellanox/mlx4/fw.h
index 151c2bb380a6..fdf41665a059 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.h
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.h
@@ -162,6 +162,7 @@ struct mlx4_init_hca_param {
162 u64 global_caps; 162 u64 global_caps;
163 u16 log_mc_entry_sz; 163 u16 log_mc_entry_sz;
164 u16 log_mc_hash_sz; 164 u16 log_mc_hash_sz;
165 u16 hca_core_clock; /* Internal Clock Frequency (in MHz) */
165 u8 log_num_qps; 166 u8 log_num_qps;
166 u8 log_num_srqs; 167 u8 log_num_srqs;
167 u8 log_num_cqs; 168 u8 log_num_cqs;
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index 16abde20e1fc..0d32a82458bf 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -513,6 +513,8 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)
513 513
514 mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz; 514 mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
515 515
516 dev->caps.hca_core_clock = hca_param.hca_core_clock;
517
516 memset(&dev_cap, 0, sizeof(dev_cap)); 518 memset(&dev_cap, 0, sizeof(dev_cap));
517 dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp; 519 dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp;
518 err = mlx4_dev_cap(dev, &dev_cap); 520 err = mlx4_dev_cap(dev, &dev_cap);
@@ -1226,8 +1228,53 @@ static void unmap_bf_area(struct mlx4_dev *dev)
1226 io_mapping_free(mlx4_priv(dev)->bf_mapping); 1228 io_mapping_free(mlx4_priv(dev)->bf_mapping);
1227} 1229}
1228 1230
1231cycle_t mlx4_read_clock(struct mlx4_dev *dev)
1232{
1233 u32 clockhi, clocklo, clockhi1;
1234 cycle_t cycles;
1235 int i;
1236 struct mlx4_priv *priv = mlx4_priv(dev);
1237
1238 for (i = 0; i < 10; i++) {
1239 clockhi = swab32(readl(priv->clock_mapping));
1240 clocklo = swab32(readl(priv->clock_mapping + 4));
1241 clockhi1 = swab32(readl(priv->clock_mapping));
1242 if (clockhi == clockhi1)
1243 break;
1244 }
1245
1246 cycles = (u64) clockhi << 32 | (u64) clocklo;
1247
1248 return cycles;
1249}
1250EXPORT_SYMBOL_GPL(mlx4_read_clock);
1251
1252
1253static int map_internal_clock(struct mlx4_dev *dev)
1254{
1255 struct mlx4_priv *priv = mlx4_priv(dev);
1256
1257 priv->clock_mapping =
1258 ioremap(pci_resource_start(dev->pdev, priv->fw.clock_bar) +
1259 priv->fw.clock_offset, MLX4_CLOCK_SIZE);
1260
1261 if (!priv->clock_mapping)
1262 return -ENOMEM;
1263
1264 return 0;
1265}
1266
1267static void unmap_internal_clock(struct mlx4_dev *dev)
1268{
1269 struct mlx4_priv *priv = mlx4_priv(dev);
1270
1271 if (priv->clock_mapping)
1272 iounmap(priv->clock_mapping);
1273}
1274
1229static void mlx4_close_hca(struct mlx4_dev *dev) 1275static void mlx4_close_hca(struct mlx4_dev *dev)
1230{ 1276{
1277 unmap_internal_clock(dev);
1231 unmap_bf_area(dev); 1278 unmap_bf_area(dev);
1232 if (mlx4_is_slave(dev)) 1279 if (mlx4_is_slave(dev))
1233 mlx4_slave_exit(dev); 1280 mlx4_slave_exit(dev);
@@ -1445,6 +1492,37 @@ static int mlx4_init_hca(struct mlx4_dev *dev)
1445 mlx4_err(dev, "INIT_HCA command failed, aborting.\n"); 1492 mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
1446 goto err_free_icm; 1493 goto err_free_icm;
1447 } 1494 }
1495 /*
1496 * If TS is supported by FW
1497 * read HCA frequency by QUERY_HCA command
1498 */
1499 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1500 memset(&init_hca, 0, sizeof(init_hca));
1501 err = mlx4_QUERY_HCA(dev, &init_hca);
1502 if (err) {
1503 mlx4_err(dev, "QUERY_HCA command failed, disable timestamp.\n");
1504 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS;
1505 } else {
1506 dev->caps.hca_core_clock =
1507 init_hca.hca_core_clock;
1508 }
1509
1510 /* In case we got HCA frequency 0 - disable timestamping
1511 * to avoid dividing by zero
1512 */
1513 if (!dev->caps.hca_core_clock) {
1514 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS;
1515 mlx4_err(dev,
1516 "HCA frequency is 0. Timestamping is not supported.");
1517 } else if (map_internal_clock(dev)) {
1518 /*
1519 * Map internal clock,
1520 * in case of failure disable timestamping
1521 */
1522 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS;
1523 mlx4_err(dev, "Failed to map internal clock. Timestamping is not supported.\n");
1524 }
1525 }
1448 } else { 1526 } else {
1449 err = mlx4_init_slave(dev); 1527 err = mlx4_init_slave(dev);
1450 if (err) { 1528 if (err) {
@@ -1478,6 +1556,7 @@ static int mlx4_init_hca(struct mlx4_dev *dev)
1478 return 0; 1556 return 0;
1479 1557
1480unmap_bf: 1558unmap_bf:
1559 unmap_internal_clock(dev);
1481 unmap_bf_area(dev); 1560 unmap_bf_area(dev);
1482 1561
1483err_close: 1562err_close:
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index 252f4ba7f32c..0567f01938ed 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -87,7 +87,8 @@ enum {
87 MLX4_HCR_SIZE = 0x0001c, 87 MLX4_HCR_SIZE = 0x0001c,
88 MLX4_CLR_INT_SIZE = 0x00008, 88 MLX4_CLR_INT_SIZE = 0x00008,
89 MLX4_SLAVE_COMM_BASE = 0x0, 89 MLX4_SLAVE_COMM_BASE = 0x0,
90 MLX4_COMM_PAGESIZE = 0x1000 90 MLX4_COMM_PAGESIZE = 0x1000,
91 MLX4_CLOCK_SIZE = 0x00008
91}; 92};
92 93
93enum { 94enum {
@@ -403,6 +404,7 @@ struct mlx4_fw {
403 u64 clr_int_base; 404 u64 clr_int_base;
404 u64 catas_offset; 405 u64 catas_offset;
405 u64 comm_base; 406 u64 comm_base;
407 u64 clock_offset;
406 struct mlx4_icm *fw_icm; 408 struct mlx4_icm *fw_icm;
407 struct mlx4_icm *aux_icm; 409 struct mlx4_icm *aux_icm;
408 u32 catas_size; 410 u32 catas_size;
@@ -410,6 +412,7 @@ struct mlx4_fw {
410 u8 clr_int_bar; 412 u8 clr_int_bar;
411 u8 catas_bar; 413 u8 catas_bar;
412 u8 comm_bar; 414 u8 comm_bar;
415 u8 clock_bar;
413}; 416};
414 417
415struct mlx4_comm { 418struct mlx4_comm {
@@ -826,6 +829,7 @@ struct mlx4_priv {
826 struct list_head bf_list; 829 struct list_head bf_list;
827 struct mutex bf_mutex; 830 struct mutex bf_mutex;
828 struct io_mapping *bf_mapping; 831 struct io_mapping *bf_mapping;
832 void __iomem *clock_mapping;
829 int reserved_mtts; 833 int reserved_mtts;
830 int fs_hash_mode; 834 int fs_hash_mode;
831 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS]; 835 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
index d4cb5d3b28a2..b1d7657b2bf5 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
@@ -40,6 +40,7 @@
40#include <linux/mutex.h> 40#include <linux/mutex.h>
41#include <linux/netdevice.h> 41#include <linux/netdevice.h>
42#include <linux/if_vlan.h> 42#include <linux/if_vlan.h>
43#include <linux/net_tstamp.h>
43#ifdef CONFIG_MLX4_EN_DCB 44#ifdef CONFIG_MLX4_EN_DCB
44#include <linux/dcbnl.h> 45#include <linux/dcbnl.h>
45#endif 46#endif
@@ -77,6 +78,7 @@
77#define STAMP_SHIFT 31 78#define STAMP_SHIFT 31
78#define STAMP_VAL 0x7fffffff 79#define STAMP_VAL 0x7fffffff
79#define STATS_DELAY (HZ / 4) 80#define STATS_DELAY (HZ / 4)
81#define SERVICE_TASK_DELAY (HZ / 4)
80#define MAX_NUM_OF_FS_RULES 256 82#define MAX_NUM_OF_FS_RULES 256
81 83
82#define MLX4_EN_FILTER_HASH_SHIFT 4 84#define MLX4_EN_FILTER_HASH_SHIFT 4
@@ -207,6 +209,7 @@ struct mlx4_en_tx_info {
207 u8 linear; 209 u8 linear;
208 u8 data_offset; 210 u8 data_offset;
209 u8 inl; 211 u8 inl;
212 u8 ts_requested;
210}; 213};
211 214
212 215
@@ -262,6 +265,7 @@ struct mlx4_en_tx_ring {
262 struct mlx4_bf bf; 265 struct mlx4_bf bf;
263 bool bf_enabled; 266 bool bf_enabled;
264 struct netdev_queue *tx_queue; 267 struct netdev_queue *tx_queue;
268 int hwtstamp_tx_type;
265}; 269};
266 270
267struct mlx4_en_rx_desc { 271struct mlx4_en_rx_desc {
@@ -288,6 +292,7 @@ struct mlx4_en_rx_ring {
288 unsigned long packets; 292 unsigned long packets;
289 unsigned long csum_ok; 293 unsigned long csum_ok;
290 unsigned long csum_none; 294 unsigned long csum_none;
295 int hwtstamp_rx_filter;
291}; 296};
292 297
293struct mlx4_en_cq { 298struct mlx4_en_cq {
@@ -348,6 +353,10 @@ struct mlx4_en_dev {
348 u32 priv_pdn; 353 u32 priv_pdn;
349 spinlock_t uar_lock; 354 spinlock_t uar_lock;
350 u8 mac_removed[MLX4_MAX_PORTS + 1]; 355 u8 mac_removed[MLX4_MAX_PORTS + 1];
356 struct cyclecounter cycles;
357 struct timecounter clock;
358 unsigned long last_overflow_check;
359 unsigned long overflow_period;
351}; 360};
352 361
353 362
@@ -512,6 +521,7 @@ struct mlx4_en_priv {
512 struct work_struct watchdog_task; 521 struct work_struct watchdog_task;
513 struct work_struct linkstate_task; 522 struct work_struct linkstate_task;
514 struct delayed_work stats_task; 523 struct delayed_work stats_task;
524 struct delayed_work service_task;
515 struct mlx4_en_perf_stats pstats; 525 struct mlx4_en_perf_stats pstats;
516 struct mlx4_en_pkt_stats pkstats; 526 struct mlx4_en_pkt_stats pkstats;
517 struct mlx4_en_port_stats port_stats; 527 struct mlx4_en_port_stats port_stats;
@@ -525,6 +535,7 @@ struct mlx4_en_priv {
525 struct device *ddev; 535 struct device *ddev;
526 int base_tx_qpn; 536 int base_tx_qpn;
527 struct hlist_head mac_hash[MLX4_EN_MAC_HASH_SIZE]; 537 struct hlist_head mac_hash[MLX4_EN_MAC_HASH_SIZE];
538 struct hwtstamp_config hwtstamp_config;
528 539
529#ifdef CONFIG_MLX4_EN_DCB 540#ifdef CONFIG_MLX4_EN_DCB
530 struct ieee_ets ets; 541 struct ieee_ets ets;
@@ -637,9 +648,21 @@ void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
637#define MLX4_EN_NUM_SELF_TEST 5 648#define MLX4_EN_NUM_SELF_TEST 5
638void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf); 649void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);
639u64 mlx4_en_mac_to_u64(u8 *addr); 650u64 mlx4_en_mac_to_u64(u8 *addr);
651void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev);
640 652
641/* 653/*
642 * Globals 654 * Functions for time stamping
655 */
656u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe);
657void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
658 struct skb_shared_hwtstamps *hwts,
659 u64 timestamp);
660void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev);
661int mlx4_en_timestamp_config(struct net_device *dev,
662 int tx_type,
663 int rx_filter);
664
665/* Globals
643 */ 666 */
644extern const struct ethtool_ops mlx4_en_ethtool_ops; 667extern const struct ethtool_ops mlx4_en_ethtool_ops;
645 668
diff --git a/include/linux/mlx4/cq.h b/include/linux/mlx4/cq.h
index 6f65b2c8bb89..98fa492cf406 100644
--- a/include/linux/mlx4/cq.h
+++ b/include/linux/mlx4/cq.h
@@ -64,6 +64,22 @@ struct mlx4_err_cqe {
64 u8 owner_sr_opcode; 64 u8 owner_sr_opcode;
65}; 65};
66 66
67struct mlx4_ts_cqe {
68 __be32 vlan_my_qpn;
69 __be32 immed_rss_invalid;
70 __be32 g_mlpath_rqpn;
71 __be32 timestamp_hi;
72 __be16 status;
73 u8 ipv6_ext_mask;
74 u8 badfcs_enc;
75 __be32 byte_cnt;
76 __be16 wqe_index;
77 __be16 checksum;
78 u8 reserved;
79 __be16 timestamp_lo;
80 u8 owner_sr_opcode;
81} __packed;
82
67enum { 83enum {
68 MLX4_CQE_VLAN_PRESENT_MASK = 1 << 29, 84 MLX4_CQE_VLAN_PRESENT_MASK = 1 << 29,
69 MLX4_CQE_QPN_MASK = 0xffffff, 85 MLX4_CQE_QPN_MASK = 0xffffff,
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 1bc5a750b330..2fbc1464b53b 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -40,6 +40,8 @@
40 40
41#include <linux/atomic.h> 41#include <linux/atomic.h>
42 42
43#include <linux/clocksource.h>
44
43#define MAX_MSIX_P_PORT 17 45#define MAX_MSIX_P_PORT 17
44#define MAX_MSIX 64 46#define MAX_MSIX 64
45#define MSIX_LEGACY_SZ 4 47#define MSIX_LEGACY_SZ 4
@@ -152,7 +154,8 @@ enum {
152 MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1, 154 MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1,
153 MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2, 155 MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2,
154 MLX4_DEV_CAP_FLAG2_FS_EN = 1LL << 3, 156 MLX4_DEV_CAP_FLAG2_FS_EN = 1LL << 3,
155 MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN = 1LL << 4 157 MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN = 1LL << 4,
158 MLX4_DEV_CAP_FLAG2_TS = 1LL << 5
156}; 159};
157 160
158enum { 161enum {
@@ -444,6 +447,7 @@ struct mlx4_caps {
444 u8 eqe_factor; 447 u8 eqe_factor;
445 u32 userspace_caps; /* userspace must be aware of these */ 448 u32 userspace_caps; /* userspace must be aware of these */
446 u32 function_caps; /* VFs must be aware of these */ 449 u32 function_caps; /* VFs must be aware of these */
450 u16 hca_core_clock;
447}; 451};
448 452
449struct mlx4_buf_list { 453struct mlx4_buf_list {
@@ -838,7 +842,7 @@ void mlx4_free_hwq_res(struct mlx4_dev *mdev, struct mlx4_hwq_resources *wqres,
838 842
839int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, 843int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
840 struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq, 844 struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq,
841 unsigned vector, int collapsed); 845 unsigned vector, int collapsed, int timestamp_en);
842void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq); 846void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq);
843 847
844int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base); 848int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base);
@@ -1029,4 +1033,6 @@ int set_and_calc_slave_port_state(struct mlx4_dev *dev, int slave, u8 port, int
1029void mlx4_put_slave_node_guid(struct mlx4_dev *dev, int slave, __be64 guid); 1033void mlx4_put_slave_node_guid(struct mlx4_dev *dev, int slave, __be64 guid);
1030__be64 mlx4_get_slave_node_guid(struct mlx4_dev *dev, int slave); 1034__be64 mlx4_get_slave_node_guid(struct mlx4_dev *dev, int slave);
1031 1035
1036cycle_t mlx4_read_clock(struct mlx4_dev *dev);
1037
1032#endif /* MLX4_DEVICE_H */ 1038#endif /* MLX4_DEVICE_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-25 04:06:56 -0400