96 files changed, 2536 insertions, 555 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 1aeaf6f2a1ba..ecc81e368715 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -30,3 +30,63 @@ One interrupt per TC channel in a TC block:
                reg = <0xfffdc000 0x100>;
                interrupts = <26 4 27 4 28 4>;
        };
+RSTC Reset Controller required properties:
+- compatible: Should be "atmel,<chip>-rstc".
+  <chip> can be "at91sam9260" or "at91sam9g45"
+- reg: Should contain registers location and length
+Example:
+        rstc@fffffd00 {
+                compatible = "atmel,at91sam9260-rstc";
+                reg = <0xfffffd00 0x10>;
+        };
+RAMC SDRAM/DDR Controller required properties:
+- compatible: Should be "atmel,at91sam9260-sdramc",
+                        "atmel,at91sam9g45-ddramc",
+- reg: Should contain registers location and length
+  For at91sam9263 and at91sam9g45 you must specify 2 entries.
+Examples:
+        ramc0: ramc@ffffe800 {
+                compatible = "atmel,at91sam9g45-ddramc";
+                reg = <0xffffe800 0x200>;
+        };
+        ramc0: ramc@ffffe400 {
+                compatible = "atmel,at91sam9g45-ddramc";
+                reg = <0xffffe400 0x200
+                       0xffffe600 0x200>;
+        };
+SHDWC Shutdown Controller

diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt index 1aeaf6f2a1ba..ecc81e368715 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -30,3 +30,63 @@ One interrupt per TC channel in a TC block:
30	reg = <0xfffdc000 0x100>;	30	reg = <0xfffdc000 0x100>;
31	interrupts = <26 4 27 4 28 4>;	31	interrupts = <26 4 27 4 28 4>;
32	};	32	};
		33
		34	RSTC Reset Controller required properties:
		35	- compatible: Should be "atmel,<chip>-rstc".
		36	<chip> can be "at91sam9260" or "at91sam9g45"
		37	- reg: Should contain registers location and length
		38
		39	Example:
		40
		41	rstc@fffffd00 {
		42	compatible = "atmel,at91sam9260-rstc";
		43	reg = <0xfffffd00 0x10>;
		44	};
		45
		46	RAMC SDRAM/DDR Controller required properties:
		47	- compatible: Should be "atmel,at91sam9260-sdramc",
		48	"atmel,at91sam9g45-ddramc",
		49	- reg: Should contain registers location and length
		50	For at91sam9263 and at91sam9g45 you must specify 2 entries.
		51
		52	Examples:
		53
		54	ramc0: ramc@ffffe800 {
		55	compatible = "atmel,at91sam9g45-ddramc";
		56	reg = <0xffffe800 0x200>;
		57	};
		58
		59	ramc0: ramc@ffffe400 {
		60	compatible = "atmel,at91sam9g45-ddramc";
		61	reg = <0xffffe400 0x200
		62	0xffffe600 0x200>;
		63	};
		64
		65	SHDWC Shutdown Controller
		66