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-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimc.c14
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gsc.c6
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_plane.c1
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c2
-rw-r--r--include/uapi/drm/drm_fourcc.h3
5 files changed, 2 insertions, 24 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index 835b6af00970..842d6b8dc3c4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -461,7 +461,6 @@ static int fimc_src_set_fmt_order(struct fimc_context *ctx, u32 fmt)
461 cfg |= EXYNOS_MSCTRL_C_INT_IN_3PLANE; 461 cfg |= EXYNOS_MSCTRL_C_INT_IN_3PLANE;
462 break; 462 break;
463 case DRM_FORMAT_NV12: 463 case DRM_FORMAT_NV12:
464 case DRM_FORMAT_NV12MT:
465 case DRM_FORMAT_NV16: 464 case DRM_FORMAT_NV16:
466 cfg |= (EXYNOS_MSCTRL_ORDER2P_LSB_CBCR | 465 cfg |= (EXYNOS_MSCTRL_ORDER2P_LSB_CBCR |
467 EXYNOS_MSCTRL_C_INT_IN_2PLANE); 466 EXYNOS_MSCTRL_C_INT_IN_2PLANE);
@@ -511,7 +510,6 @@ static int fimc_src_set_fmt(struct device *dev, u32 fmt)
511 case DRM_FORMAT_YVU420: 510 case DRM_FORMAT_YVU420:
512 case DRM_FORMAT_NV12: 511 case DRM_FORMAT_NV12:
513 case DRM_FORMAT_NV21: 512 case DRM_FORMAT_NV21:
514 case DRM_FORMAT_NV12MT:
515 cfg |= EXYNOS_MSCTRL_INFORMAT_YCBCR420; 513 cfg |= EXYNOS_MSCTRL_INFORMAT_YCBCR420;
516 break; 514 break;
517 default: 515 default:
@@ -524,10 +522,7 @@ static int fimc_src_set_fmt(struct device *dev, u32 fmt)
524 cfg = fimc_read(ctx, EXYNOS_CIDMAPARAM); 522 cfg = fimc_read(ctx, EXYNOS_CIDMAPARAM);
525 cfg &= ~EXYNOS_CIDMAPARAM_R_MODE_MASK; 523 cfg &= ~EXYNOS_CIDMAPARAM_R_MODE_MASK;
526 524
527 if (fmt == DRM_FORMAT_NV12MT) 525 cfg |= EXYNOS_CIDMAPARAM_R_MODE_LINEAR;
528 cfg |= EXYNOS_CIDMAPARAM_R_MODE_64X32;
529 else
530 cfg |= EXYNOS_CIDMAPARAM_R_MODE_LINEAR;
531 526
532 fimc_write(ctx, cfg, EXYNOS_CIDMAPARAM); 527 fimc_write(ctx, cfg, EXYNOS_CIDMAPARAM);
533 528
@@ -812,7 +807,6 @@ static int fimc_dst_set_fmt_order(struct fimc_context *ctx, u32 fmt)
812 cfg |= EXYNOS_CIOCTRL_YCBCR_3PLANE; 807 cfg |= EXYNOS_CIOCTRL_YCBCR_3PLANE;
813 break; 808 break;
814 case DRM_FORMAT_NV12: 809 case DRM_FORMAT_NV12:
815 case DRM_FORMAT_NV12MT:
816 case DRM_FORMAT_NV16: 810 case DRM_FORMAT_NV16:
817 cfg |= EXYNOS_CIOCTRL_ORDER2P_LSB_CBCR; 811 cfg |= EXYNOS_CIOCTRL_ORDER2P_LSB_CBCR;
818 cfg |= EXYNOS_CIOCTRL_YCBCR_2PLANE; 812 cfg |= EXYNOS_CIOCTRL_YCBCR_2PLANE;
@@ -867,7 +861,6 @@ static int fimc_dst_set_fmt(struct device *dev, u32 fmt)
867 case DRM_FORMAT_YUV420: 861 case DRM_FORMAT_YUV420:
868 case DRM_FORMAT_YVU420: 862 case DRM_FORMAT_YVU420:
869 case DRM_FORMAT_NV12: 863 case DRM_FORMAT_NV12:
870 case DRM_FORMAT_NV12MT:
871 case DRM_FORMAT_NV21: 864 case DRM_FORMAT_NV21:
872 cfg |= EXYNOS_CITRGFMT_OUTFORMAT_YCBCR420; 865 cfg |= EXYNOS_CITRGFMT_OUTFORMAT_YCBCR420;
873 break; 866 break;
@@ -883,10 +876,7 @@ static int fimc_dst_set_fmt(struct device *dev, u32 fmt)
883 cfg = fimc_read(ctx, EXYNOS_CIDMAPARAM); 876 cfg = fimc_read(ctx, EXYNOS_CIDMAPARAM);
884 cfg &= ~EXYNOS_CIDMAPARAM_W_MODE_MASK; 877 cfg &= ~EXYNOS_CIDMAPARAM_W_MODE_MASK;
885 878
886 if (fmt == DRM_FORMAT_NV12MT) 879 cfg |= EXYNOS_CIDMAPARAM_W_MODE_LINEAR;
887 cfg |= EXYNOS_CIDMAPARAM_W_MODE_64X32;
888 else
889 cfg |= EXYNOS_CIDMAPARAM_W_MODE_LINEAR;
890 880
891 fimc_write(ctx, cfg, EXYNOS_CIDMAPARAM); 881 fimc_write(ctx, cfg, EXYNOS_CIDMAPARAM);
892 882
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 0261468c8019..8040ed2a831f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -542,9 +542,6 @@ static int gsc_src_set_fmt(struct device *dev, u32 fmt)
542 cfg |= (GSC_IN_CHROMA_ORDER_CBCR | 542 cfg |= (GSC_IN_CHROMA_ORDER_CBCR |
543 GSC_IN_YUV420_2P); 543 GSC_IN_YUV420_2P);
544 break; 544 break;
545 case DRM_FORMAT_NV12MT:
546 cfg |= (GSC_IN_TILE_C_16x8 | GSC_IN_TILE_MODE);
547 break;
548 default: 545 default:
549 dev_err(ippdrv->dev, "inavlid target yuv order 0x%x.\n", fmt); 546 dev_err(ippdrv->dev, "inavlid target yuv order 0x%x.\n", fmt);
550 return -EINVAL; 547 return -EINVAL;
@@ -809,9 +806,6 @@ static int gsc_dst_set_fmt(struct device *dev, u32 fmt)
809 cfg |= (GSC_OUT_CHROMA_ORDER_CBCR | 806 cfg |= (GSC_OUT_CHROMA_ORDER_CBCR |
810 GSC_OUT_YUV420_2P); 807 GSC_OUT_YUV420_2P);
811 break; 808 break;
812 case DRM_FORMAT_NV12MT:
813 cfg |= (GSC_OUT_TILE_C_16x8 | GSC_OUT_TILE_MODE);
814 break;
815 default: 809 default:
816 dev_err(ippdrv->dev, "inavlid target yuv order 0x%x.\n", fmt); 810 dev_err(ippdrv->dev, "inavlid target yuv order 0x%x.\n", fmt);
817 return -EINVAL; 811 return -EINVAL;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index c7045a663763..92d75a4eabd7 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -30,7 +30,6 @@ static const uint32_t formats[] = {
30 DRM_FORMAT_XRGB8888, 30 DRM_FORMAT_XRGB8888,
31 DRM_FORMAT_ARGB8888, 31 DRM_FORMAT_ARGB8888,
32 DRM_FORMAT_NV12, 32 DRM_FORMAT_NV12,
33 DRM_FORMAT_NV12MT,
34}; 33};
35 34
36/* 35/*
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 820b76234ef4..5da28443342d 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -417,8 +417,6 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)
417 win_data = &ctx->win_data[win]; 417 win_data = &ctx->win_data[win];
418 418
419 switch (win_data->pixel_format) { 419 switch (win_data->pixel_format) {
420 case DRM_FORMAT_NV12MT:
421 tiled_mode = true;
422 case DRM_FORMAT_NV12: 420 case DRM_FORMAT_NV12:
423 crcb_mode = false; 421 crcb_mode = false;
424 buf_num = 2; 422 buf_num = 2;
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 646ae5f39f42..a284f11a8ef5 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -109,9 +109,6 @@
109#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */ 109#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
110#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ 110#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
111 111
112/* special NV12 tiled format */
113#define DRM_FORMAT_NV12MT fourcc_code('T', 'M', '1', '2') /* 2x2 subsampled Cr:Cb plane 64x32 macroblocks */
114
115/* 112/*
116 * 3 plane YCbCr 113 * 3 plane YCbCr
117 * index 0: Y plane, [7:0] Y 114 * index 0: Y plane, [7:0] Y