20 files changed, 576 insertions, 37 deletions

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 3d23418cbddd..180567408ee8 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -178,6 +178,7 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
 
 /* PCI fixed i/o mapping */
 #define PCI_IO_VIRT_BASE        0xfee00000
+#define PCI_IOBASE              ((void __iomem *)PCI_IO_VIRT_BASE)
 
 #if defined(CONFIG_PCI)
 void pci_ioremap_set_mem_type(int mem_type);
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 05e1f73a1e8d..c186a17c2cff 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -660,6 +660,7 @@ static void __init pci_v3_preinit(void)
 {
         unsigned long flags;
         unsigned int temp;
+        phys_addr_t io_address = pci_pio_to_address(io_mem.start);
 
         pcibios_min_mem = 0x00100000;
 
@@ -701,7 +702,7 @@ static void __init pci_v3_preinit(void)
         /*
          * Setup window 2 - PCI IO
          */
-        v3_writel(V3_LB_BASE2, v3_addr_to_lb_base2(io_mem.start) |
+        v3_writel(V3_LB_BASE2, v3_addr_to_lb_base2(io_address) |
                         V3_LB_BASE_ENABLE);
         v3_writew(V3_LB_MAP2, v3_addr_to_lb_map2(0));
 
@@ -742,6 +743,7 @@ static void __init pci_v3_preinit(void)
 static void __init pci_v3_postinit(void)
 {
         unsigned int pci_cmd;
+        phys_addr_t io_address = pci_pio_to_address(io_mem.start);
 
         pci_cmd = PCI_COMMAND_MEMORY |
                   PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
@@ -758,7 +760,7 @@ static void __init pci_v3_postinit(void)
                        "interrupt: %d\n", ret);
 #endif
 
-        register_isa_ports(non_mem.start, io_mem.start, 0);
+        register_isa_ports(non_mem.start, io_address, 0);
 }
 
 /*
@@ -867,33 +869,32 @@ static int __init pci_v3_probe(struct platform_device *pdev)
 
         for_each_of_pci_range(&parser, &range) {
                 if (!range.flags) {
-                        of_pci_range_to_resource(&range, np, &conf_mem);
+                        ret = of_pci_range_to_resource(&range, np, &conf_mem);
                         conf_mem.name = "PCIv3 config";
                 }
                 if (range.flags & IORESOURCE_IO) {
-                        of_pci_range_to_resource(&range, np, &io_mem);
+                        ret = of_pci_range_to_resource(&range, np, &io_mem);
                         io_mem.name = "PCIv3 I/O";
                 }
                 if ((range.flags & IORESOURCE_MEM) &&
                         !(range.flags & IORESOURCE_PREFETCH)) {
                         non_mem_pci = range.pci_addr;
                         non_mem_pci_sz = range.size;
-                        of_pci_range_to_resource(&range, np, &non_mem);
+                        ret = of_pci_range_to_resource(&range, np, &non_mem);
                         non_mem.name = "PCIv3 non-prefetched mem";
                 }
                 if ((range.flags & IORESOURCE_MEM) &&
                         (range.flags & IORESOURCE_PREFETCH)) {
                         pre_mem_pci = range.pci_addr;
                         pre_mem_pci_sz = range.size;
-                        of_pci_range_to_resource(&range, np, &pre_mem);
+                        ret = of_pci_range_to_resource(&range, np, &pre_mem);
                         pre_mem.name = "PCIv3 prefetched mem";
                 }
-        }
 
-        if (!conf_mem.start || !io_mem.start ||
-            !non_mem.start || !pre_mem.start) {
-                dev_err(&pdev->dev, "missing ranges in device node\n");
-                return -EINVAL;
+                if (ret < 0) {
+                        dev_err(&pdev->dev, "missing ranges in device node\n");
+                        return ret;
+                }
         }
 
         pci_v3.map_irq = of_irq_parse_and_map_pci;
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index fd4e81a4e1ce..bc97147d326c 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -81,7 +81,7 @@ config MMU
         def_bool y
 
 config NO_IOPORT_MAP
-        def_bool y
+        def_bool y if !PCI
 
 config STACKTRACE_SUPPORT
         def_bool y
@@ -156,6 +156,26 @@ menu "Bus support"
 config ARM_AMBA
         bool
 
+config PCI
+        bool "PCI support"
+        help
+          This feature enables support for PCI bus system. If you say Y
+          here, the kernel will include drivers and infrastructure code
+          to support PCI bus devices.
+
+config PCI_DOMAINS
+        def_bool PCI
+
+config PCI_DOMAINS_GENERIC
+        def_bool PCI
+
+config PCI_SYSCALL
+        def_bool PCI
+
+source "drivers/pci/Kconfig"
+source "drivers/pci/pcie/Kconfig"
+source "drivers/pci/hotplug/Kconfig"
+
 endmenu
 
 menu "Kernel Features"
diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild
index 0b3fcf86e6ba..07cb417026b6 100644
--- a/arch/arm64/include/asm/Kbuild
+++ b/arch/arm64/include/asm/Kbuild
@@ -29,6 +29,7 @@ generic-y += mman.h
 generic-y += msgbuf.h
 generic-y += mutex.h
 generic-y += pci.h
+generic-y += pci-bridge.h
 generic-y += poll.h
 generic-y += preempt.h
 generic-y += resource.h
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index e0ecdcf6632d..f998d90bc389 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -121,7 +121,8 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
 /*
  *  I/O port access primitives.
  */
-#define IO_SPACE_LIMIT          0xffff
+#define arch_has_dev_port()     (1)
+#define IO_SPACE_LIMIT          (SZ_32M - 1)
 #define PCI_IOBASE              ((void __iomem *)(MODULES_VADDR - SZ_32M))
 
 static inline u8 inb(unsigned long addr)
diff --git a/arch/arm64/include/asm/pci.h b/arch/arm64/include/asm/pci.h
new file mode 100644
index 000000000000..872ba939fcb2
--- /dev/null
+++ b/arch/arm64/include/asm/pci.h
@@ -0,0 +1,37 @@
+#ifndef __ASM_PCI_H
+#define __ASM_PCI_H
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/dma-mapping.h>
+
+#include <asm/io.h>
+#include <asm-generic/pci-bridge.h>
+#include <asm-generic/pci-dma-compat.h>
+
+#define PCIBIOS_MIN_IO          0x1000
+#define PCIBIOS_MIN_MEM         0
+
+/*
+ * Set to 1 if the kernel should re-assign all PCI bus numbers
+ */
+#define pcibios_assign_all_busses() \
+        (pci_has_flag(PCI_REASSIGN_ALL_BUS))
+
+/*
+ * PCI address space differs from physical memory address space
+ */
+#define PCI_DMA_BUS_IS_PHYS     (0)
+
+extern int isa_dma_bridge_buggy;
+
+#ifdef CONFIG_PCI
+static inline int pci_proc_domain(struct pci_bus *bus)
+{
+        return 1;
+}
+#endif  /* CONFIG_PCI */
+
+#endif  /* __KERNEL__ */
+#endif  /* __ASM_PCI_H */
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index ffe1ba0506d1..a968523adf56 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -296,6 +296,8 @@ static inline int has_transparent_hugepage(void)
         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
 #define pgprot_writecombine(prot) \
         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
+#define pgprot_device(prot) \
+        __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
 #define __HAVE_PHYS_MEM_ACCESS_PROT
 struct file;
 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index df7ef8768fc2..1ed5a06a3863 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -29,6 +29,7 @@ arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND)	+= sleep.o suspend.o
 arm64-obj-$(CONFIG_JUMP_LABEL)          += jump_label.o
 arm64-obj-$(CONFIG_KGDB)                += kgdb.o
 arm64-obj-$(CONFIG_EFI)                 += efi.o efi-stub.o efi-entry.o
+arm64-obj-$(CONFIG_PCI)                 += pci.o
 
 obj-y                                   += $(arm64-obj-y) vdso/
 obj-m                                   += $(arm64-obj-m)
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
new file mode 100644
index 000000000000..ce5836c14ec1
--- /dev/null
+++ b/arch/arm64/kernel/pci.c
@@ -0,0 +1,70 @@
+/*
+ * Code borrowed from powerpc/kernel/pci-common.c
+ *
+ * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
+ * Copyright (C) 2014 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/of_pci.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+
+#include <asm/pci-bridge.h>
+
+/*
+ * Called after each bus is probed, but before its children are examined
+ */
+void pcibios_fixup_bus(struct pci_bus *bus)
+{
+        /* nothing to do, expected to be removed in the future */
+}
+
+/*
+ * We don't have to worry about legacy ISA devices, so nothing to do here
+ */
+resource_size_t pcibios_align_resource(void *data, const struct resource *res,
+                                resource_size_t size, resource_size_t align)
+{
+        return res->start;
+}
+
+/*
+ * Try to assign the IRQ number from DT when adding a new device
+ */
+int pcibios_add_device(struct pci_dev *dev)
+{
+        dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
+
+        return 0;
+}
+
+
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+static bool dt_domain_found = false;
+
+void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent)
+{
+        int domain = of_get_pci_domain_nr(parent->of_node);
+
+        if (domain >= 0) {
+                dt_domain_found = true;
+        } else if (dt_domain_found == true) {
+                dev_err(parent, "Node %s is missing \"linux,pci-domain\" property in DT\n",
+                        parent->of_node->full_name);
+                return;
+        } else {
+                domain = pci_get_new_domain_nr();
+        }
+
+        bus->domain_nr = domain;
+}
+#endif
diff --git a/drivers/of/address.c b/drivers/of/address.c
index e3718250d66e..afdb78299f61 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -5,6 +5,8 @@
 #include <linux/module.h>
 #include <linux/of_address.h>
 #include <linux/pci_regs.h>
+#include <linux/sizes.h>
+#include <linux/slab.h>
 #include <linux/string.h>
 
 /* Max address size we deal with */
@@ -293,6 +295,51 @@ struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
 }
 EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
 
+/*
+ * of_pci_range_to_resource - Create a resource from an of_pci_range
+ * @range:      the PCI range that describes the resource
+ * @np:         device node where the range belongs to
+ * @res:        pointer to a valid resource that will be updated to
+ *              reflect the values contained in the range.
+ *
+ * Returns EINVAL if the range cannot be converted to resource.
+ *
+ * Note that if the range is an IO range, the resource will be converted
+ * using pci_address_to_pio() which can fail if it is called too early or
+ * if the range cannot be matched to any host bridge IO space (our case here).
+ * To guard against that we try to register the IO range first.
+ * If that fails we know that pci_address_to_pio() will do too.
+ */
+int of_pci_range_to_resource(struct of_pci_range *range,
+                             struct device_node *np, struct resource *res)
+{
+        int err;
+        res->flags = range->flags;
+        res->parent = res->child = res->sibling = NULL;
+        res->name = np->full_name;
+
+        if (res->flags & IORESOURCE_IO) {
+                unsigned long port;
+                err = pci_register_io_range(range->cpu_addr, range->size);
+                if (err)
+                        goto invalid_range;
+                port = pci_address_to_pio(range->cpu_addr);
+                if (port == (unsigned long)-1) {
+                        err = -EINVAL;
+                        goto invalid_range;
+                }
+                res->start = port;
+        } else {
+                res->start = range->cpu_addr;
+        }
+        res->end = res->start + range->size - 1;
+        return 0;
+
+invalid_range:
+        res->start = (resource_size_t)OF_BAD_ADDR;
+        res->end = (resource_size_t)OF_BAD_ADDR;
+        return err;
+}
 #endif /* CONFIG_PCI */
 
 /*
@@ -601,12 +648,119 @@ const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
 }
 EXPORT_SYMBOL(of_get_address);
 
+#ifdef PCI_IOBASE
+struct io_range {
+        struct list_head list;
+        phys_addr_t start;
+        resource_size_t size;
+};
+
+static LIST_HEAD(io_range_list);
+static DEFINE_SPINLOCK(io_range_lock);
+#endif
+
+/*
+ * Record the PCI IO range (expressed as CPU physical address + size).
+ * Return a negative value if an error has occured, zero otherwise
+ */
+int __weak pci_register_io_range(phys_addr_t addr, resource_size_t size)
+{
+        int err = 0;
+
+#ifdef PCI_IOBASE
+        struct io_range *range;
+        resource_size_t allocated_size = 0;
+
+        /* check if the range hasn't been previously recorded */
+        spin_lock(&io_range_lock);
+        list_for_each_entry(range, &io_range_list, list) {
+                if (addr >= range->start && addr + size <= range->start + size) {
+                        /* range already registered, bail out */
+                        goto end_register;
+                }
+                allocated_size += range->size;
+        }
+
+        /* range not registed yet, check for available space */
+        if (allocated_size + size - 1 > IO_SPACE_LIMIT) {
+                /* if it's too big check if 64K space can be reserved */
+                if (allocated_size + SZ_64K - 1 > IO_SPACE_LIMIT) {
+                        err = -E2BIG;
+                        goto end_register;
+                }
+
+                size = SZ_64K;
+                pr_warn("Requested IO range too big, new size set to 64K\n");
+        }
+
+        /* add the range to the list */
+        range = kzalloc(sizeof(*range), GFP_KERNEL);
+        if (!range) {
+                err = -ENOMEM;
+                goto end_register;
+        }
+
+        range->start = addr;
+        range->size = size;
+
+        list_add_tail(&range->list, &io_range_list);
+
+end_register:
+        spin_unlock(&io_range_lock);
+#endif
+
+        return err;
+}
+
+phys_addr_t pci_pio_to_address(unsigned long pio)
+{
+        phys_addr_t address = (phys_addr_t)OF_BAD_ADDR;
+
+#ifdef PCI_IOBASE
+        struct io_range *range;
+        resource_size_t allocated_size = 0;
+
+        if (pio > IO_SPACE_LIMIT)
+                return address;
+
+        spin_lock(&io_range_lock);
+        list_for_each_entry(range, &io_range_list, list) {
+                if (pio >= allocated_size && pio < allocated_size + range->size) {
+                        address = range->start + pio - allocated_size;
+                        break;
+                }
+                allocated_size += range->size;
+        }
+        spin_unlock(&io_range_lock);
+#endif
+
+        return address;
+}
+
 unsigned long __weak pci_address_to_pio(phys_addr_t address)
 {
+#ifdef PCI_IOBASE
+        struct io_range *res;
+        resource_size_t offset = 0;
+        unsigned long addr = -1;
+
+        spin_lock(&io_range_lock);
+        list_for_each_entry(res, &io_range_list, list) {
+                if (address >= res->start && address < res->start + res->size) {
+                        addr = res->start - address + offset;
+                        break;
+                }
+                offset += res->size;
+        }
+        spin_unlock(&io_range_lock);
+
+        return addr;
+#else
         if (address > IO_SPACE_LIMIT)
                 return (unsigned long)-1;
 
         return (unsigned long) address;
+#endif
 }
 
 static int __of_address_to_resource(struct device_node *dev,
diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
index 848199633798..8882b467be95 100644
--- a/drivers/of/of_pci.c
+++ b/drivers/of/of_pci.c
@@ -1,7 +1,9 @@
 #include <linux/kernel.h>
 #include <linux/export.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/of_pci.h>
+#include <linux/slab.h>
 
 static inline int __of_pci_pci_compare(struct device_node *node,
                                        unsigned int data)
@@ -89,6 +91,146 @@ int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
 }
 EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
 
+/**
+ * This function will try to obtain the host bridge domain number by
+ * finding a property called "linux,pci-domain" of the given device node.
+ *
+ * @node: device tree node with the domain information
+ *
+ * Returns the associated domain number from DT in the range [0-0xffff], or
+ * a negative value if the required property is not found.
+ */
+int of_get_pci_domain_nr(struct device_node *node)
+{
+        const __be32 *value;
+        int len;
+        u16 domain;
+
+        value = of_get_property(node, "linux,pci-domain", &len);
+        if (!value || len < sizeof(*value))
+                return -EINVAL;
+
+        domain = (u16)be32_to_cpup(value);
+
+        return domain;
+}
+EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
+
+#if defined(CONFIG_OF_ADDRESS)
+/**
+ * of_pci_get_host_bridge_resources - Parse PCI host bridge resources from DT
+ * @dev: device node of the host bridge having the range property
+ * @busno: bus number associated with the bridge root bus
+ * @bus_max: maximum number of buses for this bridge
+ * @resources: list where the range of resources will be added after DT parsing
+ * @io_base: pointer to a variable that will contain on return the physical
+ * address for the start of the I/O range. Can be NULL if the caller doesn't
+ * expect IO ranges to be present in the device tree.
+ *
+ * It is the caller's job to free the @resources list.
+ *
+ * This function will parse the "ranges" property of a PCI host bridge device
+ * node and setup the resource mapping based on its content. It is expected
+ * that the property conforms with the Power ePAPR document.
+ *
+ * It returns zero if the range parsing has been successful or a standard error
+ * value if it failed.
+ */
+int of_pci_get_host_bridge_resources(struct device_node *dev,
+                        unsigned char busno, unsigned char bus_max,
+                        struct list_head *resources, resource_size_t *io_base)
+{
+        struct resource *res;
+        struct resource *bus_range;
+        struct of_pci_range range;
+        struct of_pci_range_parser parser;
+        char range_type[4];
+        int err;
+
+        if (io_base)
+                *io_base = (resource_size_t)OF_BAD_ADDR;
+
+        bus_range = kzalloc(sizeof(*bus_range), GFP_KERNEL);
+        if (!bus_range)
+                return -ENOMEM;
+
+        pr_info("PCI host bridge %s ranges:\n", dev->full_name);
+
+        err = of_pci_parse_bus_range(dev, bus_range);
+        if (err) {
+                bus_range->start = busno;
+                bus_range->end = bus_max;
+                bus_range->flags = IORESOURCE_BUS;
+                pr_info("  No bus range found for %s, using %pR\n",
+                        dev->full_name, bus_range);
+        } else {
+                if (bus_range->end > bus_range->start + bus_max)
+                        bus_range->end = bus_range->start + bus_max;
+        }
+        pci_add_resource(resources, bus_range);
+
+        /* Check for ranges property */
+        err = of_pci_range_parser_init(&parser, dev);
+        if (err)
+                goto parse_failed;
+
+        pr_debug("Parsing ranges property...\n");
+        for_each_of_pci_range(&parser, &range) {
+                /* Read next ranges element */
+                if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
+                        snprintf(range_type, 4, " IO");
+                else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
+                        snprintf(range_type, 4, "MEM");
+                else
+                        snprintf(range_type, 4, "err");
+                pr_info("  %s %#010llx..%#010llx -> %#010llx\n", range_type,
+                        range.cpu_addr, range.cpu_addr + range.size - 1,
+                        range.pci_addr);
+
+                /*
+                 * If we failed translation or got a zero-sized region
+                 * then skip this range
+                 */
+                if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
+                        continue;
+
+                res = kzalloc(sizeof(struct resource), GFP_KERNEL);
+                if (!res) {
+                        err = -ENOMEM;
+                        goto parse_failed;
+                }
+
+                err = of_pci_range_to_resource(&range, dev, res);
+                if (err)
+                        goto conversion_failed;
+
+                if (resource_type(res) == IORESOURCE_IO) {
+                        if (!io_base) {
+                                pr_err("I/O range found for %s. Please provide an io_base pointer to save CPU base address\n",
+                                        dev->full_name);
+                                err = -EINVAL;
+                                goto conversion_failed;
+                        }
+                        if (*io_base != (resource_size_t)OF_BAD_ADDR)
+                                pr_warn("More than one I/O resource converted for %s. CPU base address for old range lost!\n",
+                                        dev->full_name);
+                        *io_base = range.cpu_addr;
+                }
+
+                pci_add_resource_offset(resources, res, res->start - range.pci_addr);
+        }
+
+        return 0;
+
+conversion_failed:
+        kfree(res);
+parse_failed:
+        pci_free_resource_list(resources);
+        return err;
+}
+EXPORT_SYMBOL_GPL(of_pci_get_host_bridge_resources);
+#endif /* CONFIG_OF_ADDRESS */
+
 #ifdef CONFIG_PCI_MSI
 
 static LIST_HEAD(of_pci_msi_chip_list);
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 79a30476036c..3d43874319be 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -658,6 +658,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
 {
         struct tegra_pcie *pcie = sys_to_pcie(sys);
         int err;
+        phys_addr_t io_start;
 
         err = devm_request_resource(pcie->dev, &pcie->all, &pcie->mem);
         if (err < 0)
@@ -667,12 +668,14 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
         if (err)
                 return err;
 
+        io_start = pci_pio_to_address(pcie->io.start);
+
         pci_add_resource_offset(&sys->resources, &pcie->mem, sys->mem_offset);
         pci_add_resource_offset(&sys->resources, &pcie->prefetch,
                                 sys->mem_offset);
         pci_add_resource(&sys->resources, &pcie->busn);
 
-        pci_ioremap_io(nr * SZ_64K, pcie->io.start);
+        pci_ioremap_io(nr * SZ_64K, io_start);
 
         return 1;
 }
@@ -783,6 +786,7 @@ static irqreturn_t tegra_pcie_isr(int irq, void *arg)
 static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
 {
         u32 fpci_bar, size, axi_address;
+        phys_addr_t io_start = pci_pio_to_address(pcie->io.start);
 
         /* Bar 0: type 1 extended configuration space */
         fpci_bar = 0xfe100000;
@@ -795,7 +799,7 @@ static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
         /* Bar 1: downstream IO bar */
         fpci_bar = 0xfdfc0000;
         size = resource_size(&pcie->io);
-        axi_address = pcie->io.start;
+        axi_address = io_start;
         afi_writel(pcie, axi_address, AFI_AXI_BAR1_START);
         afi_writel(pcie, size >> 12, AFI_AXI_BAR1_SZ);
         afi_writel(pcie, fpci_bar, AFI_FPCI_BAR1);
@@ -1680,7 +1684,9 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
         }
 
         for_each_of_pci_range(&parser, &range) {
-                of_pci_range_to_resource(&range, np, &res);
+                err = of_pci_range_to_resource(&range, np, &res);
+                if (err < 0)
+                        return err;
 
                 switch (res.flags & IORESOURCE_TYPE_BITS) {
                 case IORESOURCE_IO:
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 4884ee5e07d4..61158e03ab5f 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -323,6 +323,7 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
 
         /* Setup PCIe address space mappings for each resource */
         resource_size_t size;
+        resource_size_t res_start;
         u32 mask;
 
         rcar_pci_write_reg(pcie, 0x00000000, PCIEPTCTLR(win));
@@ -335,8 +336,13 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
         mask = (roundup_pow_of_two(size) / SZ_128) - 1;
         rcar_pci_write_reg(pcie, mask << 7, PCIEPAMR(win));
 
-        rcar_pci_write_reg(pcie, upper_32_bits(res->start), PCIEPARH(win));
-        rcar_pci_write_reg(pcie, lower_32_bits(res->start), PCIEPARL(win));
+        if (res->flags & IORESOURCE_IO)
+                res_start = pci_pio_to_address(res->start);
+        else
+                res_start = res->start;
+
+        rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
+        rcar_pci_write_reg(pcie, lower_32_bits(res_start), PCIEPARL(win));
 
         /* First resource is for IO */
         mask = PAR_ENABLE;
@@ -363,9 +369,10 @@ static int rcar_pcie_setup(int nr, struct pci_sys_data *sys)
 
                 rcar_pcie_setup_window(i, pcie);
 
-                if (res->flags & IORESOURCE_IO)
-                        pci_ioremap_io(nr * SZ_64K, res->start);
-                else
+                if (res->flags & IORESOURCE_IO) {
+                        phys_addr_t io_start = pci_pio_to_address(res->start);
+                        pci_ioremap_io(nr * SZ_64K, io_start);
+                } else
                         pci_add_resource(&sys->resources, res);
         }
         pci_add_resource(&sys->resources, &pcie->busn);
@@ -935,8 +942,10 @@ static int rcar_pcie_probe(struct platform_device *pdev)
         }
 
         for_each_of_pci_range(&parser, &range) {
-                of_pci_range_to_resource(&range, pdev->dev.of_node,
+                err = of_pci_range_to_resource(&range, pdev->dev.of_node,
                                                 &pcie->res[win++]);
+                if (err < 0)
+                        return err;
 
                 if (win > RCAR_PCI_MAX_RESOURCES)
                         break;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b7678be7b106..625a4ace10b4 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2707,6 +2707,37 @@ int pci_request_regions_exclusive(struct pci_dev *pdev, const char *res_name)
 }
 EXPORT_SYMBOL(pci_request_regions_exclusive);
 
+/**
+ *      pci_remap_iospace - Remap the memory mapped I/O space
+ *      @res: Resource describing the I/O space
+ *      @phys_addr: physical address of range to be mapped
+ *
+ *      Remap the memory mapped I/O space described by the @res
+ *      and the CPU physical address @phys_addr into virtual address space.
+ *      Only architectures that have memory mapped IO functions defined
+ *      (and the PCI_IOBASE value defined) should call this function.
+ */
+int __weak pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
+{
+#if defined(PCI_IOBASE) && defined(CONFIG_MMU)
+        unsigned long vaddr = (unsigned long)PCI_IOBASE + res->start;
+
+        if (!(res->flags & IORESOURCE_IO))
+                return -EINVAL;
+
+        if (res->end > IO_SPACE_LIMIT)
+                return -EINVAL;
+
+        return ioremap_page_range(vaddr, vaddr + resource_size(res), phys_addr,
+                                  pgprot_device(PAGE_KERNEL));
+#else
+        /* this architecture does not have memory mapped I/O space,
+           so this function should never be called */
+        WARN_ONCE(1, "This architecture does not support memory mapped I/O\n");
+        return -ENODEV;
+#endif
+}
+
 static void __pci_set_master(struct pci_dev *dev, bool enable)
 {
         u16 old_cmd, cmd;
@@ -4409,6 +4440,15 @@ static void pci_no_domains(void)
 #endif
 }
 
+#ifdef CONFIG_PCI_DOMAINS
+static atomic_t __domain_nr = ATOMIC_INIT(-1);
+
+int pci_get_new_domain_nr(void)
+{
+        return atomic_inc_return(&__domain_nr);
+}
+#endif
+
 /**
  * pci_ext_cfg_avail - can we access extended PCI config space?
  *
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index c99c4d65461b..efa48dc0de3b 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -486,7 +486,7 @@ void pci_read_bridge_bases(struct pci_bus *child)
         }
 }
 
-static struct pci_bus *pci_alloc_bus(void)
+static struct pci_bus *pci_alloc_bus(struct pci_bus *parent)
 {
         struct pci_bus *b;
 
@@ -501,6 +501,10 @@ static struct pci_bus *pci_alloc_bus(void)
         INIT_LIST_HEAD(&b->resources);
         b->max_bus_speed = PCI_SPEED_UNKNOWN;
         b->cur_bus_speed = PCI_SPEED_UNKNOWN;
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+        if (parent)
+                b->domain_nr = parent->domain_nr;
+#endif
         return b;
 }
 
@@ -672,7 +676,7 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
         /*
          * Allocate a new bus, and inherit stuff from the parent..
          */
-        child = pci_alloc_bus();
+        child = pci_alloc_bus(parent);
         if (!child)
                 return NULL;
 
@@ -1913,13 +1917,14 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
         char bus_addr[64];
         char *fmt;
 
-        b = pci_alloc_bus();
+        b = pci_alloc_bus(NULL);
         if (!b)
                 return NULL;
 
         b->sysdata = sysdata;
         b->ops = ops;
         b->number = b->busn_res.start = bus;
+        pci_bus_assign_domain_nr(b, parent);
         b2 = pci_find_bus(pci_domain_nr(b), bus);
         if (b2) {
                 /* If we already got to this bus through a different bridge, ignore it */
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index 975e1cc75edb..b8fdc57a7335 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -331,7 +331,7 @@ static inline void iounmap(void __iomem *addr)
 #ifndef CONFIG_GENERIC_IOMAP
 static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
 {
-        return (void __iomem *) port;
+        return PCI_IOBASE + (port & IO_SPACE_LIMIT);
 }
 
 static inline void ioport_unmap(void __iomem *p)
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 53b2acc38213..977e545a64c3 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -249,6 +249,10 @@ static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
 #define pgprot_writecombine pgprot_noncached
 #endif
 
+#ifndef pgprot_device
+#define pgprot_device pgprot_noncached
+#endif
+
 /*
  * When walking page tables, get the address of the next boundary,
  * or the end address of the range if that comes earlier.  Although no
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index fb7b7221e063..8cb14eb393d6 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -23,17 +23,6 @@ struct of_pci_range {
 #define for_each_of_pci_range(parser, range) \
         for (; of_pci_range_parser_one(parser, range);)
 
-static inline void of_pci_range_to_resource(struct of_pci_range *range,
-                                            struct device_node *np,
-                                            struct resource *res)
-{
-        res->flags = range->flags;
-        res->start = range->cpu_addr;
-        res->end = range->cpu_addr + range->size - 1;
-        res->parent = res->child = res->sibling = NULL;
-        res->name = np->full_name;
-}
-
 /* Translate a DMA address from device space to CPU space */
 extern u64 of_translate_dma_address(struct device_node *dev,
                                     const __be32 *in_addr);
@@ -55,7 +44,9 @@ extern void __iomem *of_iomap(struct device_node *device, int index);
 extern const __be32 *of_get_address(struct device_node *dev, int index,
                            u64 *size, unsigned int *flags);
 
+extern int pci_register_io_range(phys_addr_t addr, resource_size_t size);
 extern unsigned long pci_address_to_pio(phys_addr_t addr);
+extern phys_addr_t pci_pio_to_address(unsigned long pio);
 
 extern int of_pci_range_parser_init(struct of_pci_range_parser *parser,
                         struct device_node *node);
@@ -80,6 +71,11 @@ static inline const __be32 *of_get_address(struct device_node *dev, int index,
         return NULL;
 }
 
+static inline phys_addr_t pci_pio_to_address(unsigned long pio)
+{
+        return 0;
+}
+
 static inline int of_pci_range_parser_init(struct of_pci_range_parser *parser,
                         struct device_node *node)
 {
@@ -138,6 +134,9 @@ extern const __be32 *of_get_pci_address(struct device_node *dev, int bar_no,
                                u64 *size, unsigned int *flags);
 extern int of_pci_address_to_resource(struct device_node *dev, int bar,
                                       struct resource *r);
+extern int of_pci_range_to_resource(struct of_pci_range *range,
+                                    struct device_node *np,
+                                    struct resource *res);
 #else /* CONFIG_OF_ADDRESS && CONFIG_PCI */
 static inline int of_pci_address_to_resource(struct device_node *dev, int bar,
                                              struct resource *r)
@@ -150,6 +149,12 @@ static inline const __be32 *of_get_pci_address(struct device_node *dev,
 {
         return NULL;
 }
+static inline int of_pci_range_to_resource(struct of_pci_range *range,
+                                           struct device_node *np,
+                                           struct resource *res)
+{
+        return -ENOSYS;
+}
 #endif /* CONFIG_OF_ADDRESS && CONFIG_PCI */
 
 #endif /* __OF_ADDRESS_H */
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index dde3a4a0fa5d..1fd207e7a847 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -15,6 +15,7 @@ struct device_node *of_pci_find_child_device(struct device_node *parent,
 int of_pci_get_devfn(struct device_node *np);
 int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
 int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
+int of_get_pci_domain_nr(struct device_node *node);
 #else
 static inline int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
 {
@@ -43,6 +44,18 @@ of_pci_parse_bus_range(struct device_node *node, struct resource *res)
 {
         return -EINVAL;
 }
+
+static inline int
+of_get_pci_domain_nr(struct device_node *node)
+{
+        return -1;
+}
+#endif
+
+#if defined(CONFIG_OF_ADDRESS)
+int of_pci_get_host_bridge_resources(struct device_node *dev,
+                        unsigned char busno, unsigned char bus_max,
+                        struct list_head *resources, resource_size_t *io_base);
 #endif
 
 #if defined(CONFIG_OF) && defined(CONFIG_PCI_MSI)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index ef98f73ea618..9cd27210a889 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -456,6 +456,9 @@ struct pci_bus {
         unsigned char   primary;        /* number of primary bridge */
         unsigned char   max_bus_speed;  /* enum pci_bus_speed */
         unsigned char   cur_bus_speed;  /* enum pci_bus_speed */
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+        int             domain_nr;
+#endif
 
         char            name[48];
 
@@ -1097,6 +1100,9 @@ int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
                                                   resource_size_t),
                         void *alignf_data);
 
+
+int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr);
+
 static inline dma_addr_t pci_bus_address(struct pci_dev *pdev, int bar)
 {
         struct pci_bus_region region;
@@ -1282,12 +1288,32 @@ void pci_cfg_access_unlock(struct pci_dev *dev);
  */
 #ifdef CONFIG_PCI_DOMAINS
 extern int pci_domains_supported;
+int pci_get_new_domain_nr(void);
 #else
 enum { pci_domains_supported = 0 };
 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
 static inline int pci_proc_domain(struct pci_bus *bus) { return 0; }
+static inline int pci_get_new_domain_nr(void) { return -ENOSYS; }
 #endif /* CONFIG_PCI_DOMAINS */
 
+/*
+ * Generic implementation for PCI domain support. If your
+ * architecture does not need custom management of PCI
+ * domains then this implementation will be used
+ */
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+static inline int pci_domain_nr(struct pci_bus *bus)
+{
+        return bus->domain_nr;
+}
+void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent);
+#else
+static inline void pci_bus_assign_domain_nr(struct pci_bus *bus,
+                                        struct device *parent)
+{
+}
+#endif
+
 /* some architectures require additional setup to direct VGA traffic */
 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
                       unsigned int command_bits, u32 flags);
@@ -1396,6 +1422,7 @@ static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
 
 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
 static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) { return NULL; }
+static inline int pci_get_new_domain_nr(void) { return -ENOSYS; }
 
 #define dev_is_pci(d) (false)
 #define dev_is_pf(d) (false)