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-rw-r--r--arch/arm/boot/dts/spear1310-evb.dts292
-rw-r--r--arch/arm/boot/dts/spear1310.dtsi184
-rw-r--r--arch/arm/boot/dts/spear1340-evb.dts308
-rw-r--r--arch/arm/boot/dts/spear1340.dtsi56
-rw-r--r--arch/arm/boot/dts/spear13xx.dtsi262
5 files changed, 1102 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts
new file mode 100644
index 000000000000..8314e4171884
--- /dev/null
+++ b/arch/arm/boot/dts/spear1310-evb.dts
@@ -0,0 +1,292 @@
1/*
2 * DTS file for SPEAr1310 Evaluation Baord
3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "spear1310.dtsi"
16
17/ {
18 model = "ST SPEAr1310 Evaluation Board";
19 compatible = "st,spear1310-evb", "st,spear1310";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 memory {
24 reg = <0 0x40000000>;
25 };
26
27 ahb {
28 pinmux@e0700000 {
29 pinctrl-names = "default";
30 pinctrl-0 = <&state_default>;
31
32 state_default: pinmux {
33 i2c0-pmx {
34 st,pins = "i2c0_grp";
35 st,function = "i2c0";
36 };
37 i2s1 {
38 st,pins = "i2s1_grp";
39 st,function = "i2s1";
40 };
41 gpio {
42 st,pins = "arm_gpio_grp";
43 st,function = "arm_gpio";
44 };
45 eth {
46 st,pins = "gmii_grp";
47 st,function = "gmii";
48 };
49 ssp0 {
50 st,pins = "ssp0_grp";
51 st,function = "ssp0";
52 };
53 kbd {
54 st,pins = "keyboard_6x6_grp";
55 st,function = "keyboard";
56 };
57 sdhci {
58 st,pins = "sdhci_grp";
59 st,function = "sdhci";
60 };
61 smi-pmx {
62 st,pins = "smi_2_chips_grp";
63 st,function = "smi";
64 };
65 uart0 {
66 st,pins = "uart0_grp";
67 st,function = "uart0";
68 };
69 rs485 {
70 st,pins = "rs485_0_1_tdm_0_1_grp";
71 st,function = "rs485_0_1_tdm_0_1";
72 };
73 i2c1_2 {
74 st,pins = "i2c_1_2_grp";
75 st,function = "i2c_1_2";
76 };
77 pci {
78 st,pins = "pcie0_grp","pcie1_grp",
79 "pcie2_grp";
80 st,function = "pci";
81 };
82 smii {
83 st,pins = "smii_0_1_2_grp";
84 st,function = "smii_0_1_2";
85 };
86 nand {
87 st,pins = "nand_8bit_grp",
88 "nand_16bit_grp";
89 st,function = "nand";
90 };
91 };
92 };
93
94 ahci@b1000000 {
95 status = "okay";
96 };
97
98 cf@b2800000 {
99 status = "okay";
100 };
101
102 dma@ea800000 {
103 status = "okay";
104 };
105
106 dma@eb000000 {
107 status = "okay";
108 };
109
110 fsmc: flash@b0000000 {
111 status = "okay";
112 };
113
114 gmac0: eth@e2000000 {
115 status = "okay";
116 };
117
118 sdhci@b3000000 {
119 status = "okay";
120 };
121
122 smi: flash@ea000000 {
123 status = "okay";
124 clock-rate=<50000000>;
125
126 flash@e6000000 {
127 #address-cells = <1>;
128 #size-cells = <1>;
129 reg = <0xe6000000 0x800000>;
130 st,smi-fast-mode;
131
132 partition@0 {
133 label = "xloader";
134 reg = <0x0 0x10000>;
135 };
136 partition@10000 {
137 label = "u-boot";
138 reg = <0x10000 0x40000>;
139 };
140 partition@50000 {
141 label = "linux";
142 reg = <0x50000 0x2c0000>;
143 };
144 partition@310000 {
145 label = "rootfs";
146 reg = <0x310000 0x4f0000>;
147 };
148 };
149 };
150
151 spi0: spi@e0100000 {
152 status = "okay";
153 };
154
155 ehci@e4800000 {
156 status = "okay";
157 };
158
159 ehci@e5800000 {
160 status = "okay";
161 };
162
163 ohci@e4000000 {
164 status = "okay";
165 };
166
167 ohci@e5000000 {
168 status = "okay";
169 };
170
171 apb {
172 adc@e0080000 {
173 status = "okay";
174 };
175
176 gpio0: gpio@e0600000 {
177 status = "okay";
178 };
179
180 gpio1: gpio@e0680000 {
181 status = "okay";
182 };
183
184 i2c0: i2c@e0280000 {
185 status = "okay";
186 };
187
188 i2c1: i2c@5cd00000 {
189