diff options
26 files changed, 5868 insertions, 516 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt new file mode 100644 index 000000000000..8edc20e1b09e --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt | |||
| @@ -0,0 +1,74 @@ | |||
| 1 | Broadcom BCM2835 GPIO (and pinmux) controller | ||
| 2 | |||
| 3 | The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt | ||
| 4 | controller, and pinmux/control device. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: "brcm,bcm2835-gpio" | ||
| 8 | - reg: Should contain the physical address of the GPIO module's registes. | ||
| 9 | - gpio-controller: Marks the device node as a GPIO controller. | ||
| 10 | - #gpio-cells : Should be two. The first cell is the pin number and the | ||
| 11 | second cell is used to specify optional parameters: | ||
| 12 | - bit 0 specifies polarity (0 for normal, 1 for inverted) | ||
| 13 | - interrupts : The interrupt outputs from the controller. One interrupt per | ||
| 14 | individual bank followed by the "all banks" interrupt. | ||
| 15 | - interrupt-controller: Marks the device node as an interrupt controller. | ||
| 16 | - #interrupt-cells : Should be 2. | ||
| 17 | The first cell is the GPIO number. | ||
| 18 | The second cell is used to specify flags: | ||
| 19 | bits[3:0] trigger type and level flags: | ||
| 20 | 1 = low-to-high edge triggered. | ||
| 21 | 2 = high-to-low edge triggered. | ||
| 22 | 4 = active high level-sensitive. | ||
| 23 | 8 = active low level-sensitive. | ||
| 24 | Valid combinations are 1, 2, 3, 4, 8. | ||
| 25 | |||
| 26 | Please refer to ../gpio/gpio.txt for a general description of GPIO bindings. | ||
| 27 | |||
| 28 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
| 29 | common pinctrl bindings used by client devices, including the meaning of the | ||
| 30 | phrase "pin configuration node". | ||
| 31 | |||
| 32 | Each pin configuration node lists the pin(s) to which it applies, and one or | ||
| 33 | more of the mux function to select on those pin(s), and pull-up/down | ||
| 34 | configuration. Each subnode only affects those parameters that are explicitly | ||
| 35 | listed. In other words, a subnode that lists only a mux function implies no | ||
| 36 | information about any pull configuration. Similarly, a subnode that lists only | ||
| 37 | a pul parameter implies no information about the mux function. | ||
| 38 | |||
| 39 | Required subnode-properties: | ||
| 40 | - brcm,pins: An array of cells. Each cell contains the ID of a pin. Valid IDs | ||
| 41 | are the integer GPIO IDs; 0==GPIO0, 1==GPIO1, ... 53==GPIO53. | ||
| 42 | |||
| 43 | Optional subnode-properties: | ||
| 44 | - brcm,function: Integer, containing the function to mux to the pin(s): | ||
| 45 | 0: GPIO in | ||
| 46 | 1: GPIO out | ||
| 47 | 2: alt5 | ||
| 48 | 3: alt4 | ||
| 49 | 4: alt0 | ||
| 50 | 5: alt1 | ||
| 51 | 6: alt2 | ||
| 52 | 7: alt3 | ||
| 53 | - brcm,pull: Integer, representing the pull-down/up to apply to the pin(s): | ||
| 54 | 0: none | ||
| 55 | 1: down | ||
| 56 | 2: up | ||
| 57 | |||
| 58 | Each of brcm,function and brcm,pull may contain either a single value which | ||
| 59 | will be applied to all pins in brcm,pins, or 1 value for each entry in | ||
| 60 | brcm,pins. | ||
| 61 | |||
| 62 | Example: | ||
| 63 | |||
| 64 | gpio: gpio { | ||
| 65 | compatible = "brcm,bcm2835-gpio"; | ||
| 66 | reg = <0x2200000 0xb4>; | ||
| 67 | interrupts = <2 17>, <2 19>, <2 18>, <2 20>; | ||
| 68 | |||
| 69 | gpio-controller; | ||
| 70 | #gpio-cells = <2>; | ||
| 71 | |||
| 72 | interrupt-controller; | ||
| 73 | #interrupt-cells = <2>; | ||
| 74 | }; | ||
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx35-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx35-pinctrl.txt new file mode 100644 index 000000000000..1183f1a3be33 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx35-pinctrl.txt | |||
| @@ -0,0 +1,984 @@ | |||
| 1 | * Freescale IMX35 IOMUX Controller | ||
| 2 | |||
| 3 | Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | ||
| 4 | and usage. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: "fsl,imx35-iomuxc" | ||
| 8 | - fsl,pins: two integers array, represents a group of pins mux and config | ||
| 9 | setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | ||
| 10 | pin working on a specific function, CONFIG is the pad setting value like | ||
| 11 | pull-up for this pin. Please refer to imx35 datasheet for the valid pad | ||
| 12 | config settings. | ||
| 13 | |||
| 14 | CONFIG bits definition: | ||
| 15 | PAD_CTL_DRIVE_VOLAGAGE_18 (1 << 13) | ||
| 16 | PAD_CTL_DRIVE_VOLAGAGE_33 (0 << 13) | ||
| 17 | PAD_CTL_HYS (1 << 8) | ||
| 18 | PAD_CTL_PKE (1 << 7) | ||
| 19 | PAD_CTL_PUE (1 << 6) | ||
| 20 | PAD_CTL_PUS_100K_DOWN (0 << 4) | ||
| 21 | PAD_CTL_PUS_47K_UP (1 << 4) | ||
| 22 | PAD_CTL_PUS_100K_UP (2 << 4) | ||
| 23 | PAD_CTL_PUS_22K_UP (3 << 4) | ||
| 24 | PAD_CTL_ODE_CMOS (0 << 3) | ||
| 25 | PAD_CTL_ODE_OPENDRAIN (1 << 3) | ||
| 26 | PAD_CTL_DSE_NOMINAL (0 << 1) | ||
| 27 | PAD_CTL_DSE_HIGH (1 << 1) | ||
| 28 | PAD_CTL_DSE_MAX (2 << 1) | ||
| 29 | PAD_CTL_SRE_FAST (1 << 0) | ||
| 30 | PAD_CTL_SRE_SLOW (0 << 0) | ||
| 31 | |||
| 32 | See below for available PIN_FUNC_ID for imx35: | ||
| 33 | 0 MX35_PAD_CAPTURE__GPT_CAPIN1 | ||
| 34 | 1 MX35_PAD_CAPTURE__GPT_CMPOUT2 | ||
| 35 | 2 MX35_PAD_CAPTURE__CSPI2_SS1 | ||
| 36 | 3 MX35_PAD_CAPTURE__EPIT1_EPITO | ||
| 37 | 4 MX35_PAD_CAPTURE__CCM_CLK32K | ||
| 38 | 5 MX35_PAD_CAPTURE__GPIO1_4 | ||
| 39 | 6 MX35_PAD_COMPARE__GPT_CMPOUT1 | ||
| 40 | 7 MX35_PAD_COMPARE__GPT_CAPIN2 | ||
| 41 | 8 MX35_PAD_COMPARE__GPT_CMPOUT3 | ||
| 42 | 9 MX35_PAD_COMPARE__EPIT2_EPITO | ||
| 43 | 10 MX35_PAD_COMPARE__GPIO1_5 | ||
| 44 | 11 MX35_PAD_COMPARE__SDMA_EXTDMA_2 | ||
| 45 | 12 MX35_PAD_WDOG_RST__WDOG_WDOG_B | ||
| 46 | 13 MX35_PAD_WDOG_RST__IPU_FLASH_STROBE | ||
| 47 | 14 MX35_PAD_WDOG_RST__GPIO1_6 | ||
| 48 | 15 MX35_PAD_GPIO1_0__GPIO1_0 | ||
| 49 | 16 MX35_PAD_GPIO1_0__CCM_PMIC_RDY | ||
| 50 | 17 MX35_PAD_GPIO1_0__OWIRE_LINE | ||
| 51 | 18 MX35_PAD_GPIO1_0__SDMA_EXTDMA_0 | ||
| 52 | 19 MX35_PAD_GPIO1_1__GPIO1_1 | ||
| 53 | 20 MX35_PAD_GPIO1_1__PWM_PWMO | ||
| 54 | 21 MX35_PAD_GPIO1_1__CSPI1_SS2 | ||
| 55 | 22 MX35_PAD_GPIO1_1__SCC_TAMPER_DETECT | ||
| 56 | 23 MX35_PAD_GPIO1_1__SDMA_EXTDMA_1 | ||
| 57 | 24 MX35_PAD_GPIO2_0__GPIO2_0 | ||
| 58 | 25 MX35_PAD_GPIO2_0__USB_TOP_USBOTG_CLK | ||
| 59 | 26 MX35_PAD_GPIO3_0__GPIO3_0 | ||
| 60 | 27 MX35_PAD_GPIO3_0__USB_TOP_USBH2_CLK | ||
| 61 | 28 MX35_PAD_RESET_IN_B__CCM_RESET_IN_B | ||
| 62 | 29 MX35_PAD_POR_B__CCM_POR_B | ||
| 63 | 30 MX35_PAD_CLKO__CCM_CLKO | ||
| 64 | 31 MX35_PAD_CLKO__GPIO1_8 | ||
