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-rw-r--r--arch/powerpc/boot/dts/p2020rdb-pc.dtsi241
-rw-r--r--arch/powerpc/boot/dts/p2020rdb-pc_32b.dts96
-rw-r--r--arch/powerpc/boot/dts/p2020rdb-pc_36b.dts96
3 files changed, 433 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc.dtsi b/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
new file mode 100644
index 000000000000..c21d1c7d16cd
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc.dtsi
@@ -0,0 +1,241 @@
1/*
2 * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR DTB Image";
56 };
57
58 partition@80000 {
59 /* 3.5 MB for Linux Kernel Image */
60 reg = <0x00080000 0x00380000>;
61 label = "NOR Linux Kernel Image";
62 };
63
64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>;
67 label = "NOR JFFS2 Root File System";
68 };
69
70 partition@f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x00f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 read-only;
77 };
78 };
79
80 nand@1,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "fsl,p2020-fcm-nand",
84 "fsl,elbc-fcm-nand";
85 reg = <0x1 0x0 0x40000>;
86
87 partition@0 {
88 /* This location must not be altered */
89 /* 1MB for u-boot Bootloader Image */
90 reg = <0x0 0x00100000>;
91 label = "NAND U-Boot Image";
92 read-only;
93 };
94
95 partition@100000 {
96 /* 1MB for DTB Image */
97 reg = <0x00100000 0x00100000>;
98 label = "NAND DTB Image";
99 };
100
101 partition@200000 {
102 /* 4MB for Linux Kernel Image */
103 reg = <0x00200000 0x00400000>;
104 label = "NAND Linux Kernel Image";
105 };
106
107 partition@600000 {
108 /* 4MB for Compressed Root file System Image */
109 reg = <0x00600000 0x00400000>;
110 label = "NAND Compressed RFS Image";
111 };
112
113 partition@a00000 {
114 /* 7MB for JFFS2 based Root file System */
115 reg = <0x00a00000 0x00700000>;
116 label = "NAND JFFS2 Root File System";
117 };
118
119 partition@1100000 {
120 /* 15MB for JFFS2 based Root file System */
121 reg = <0x01100000 0x00f00000>;
122 label = "NAND Writable User area";
123 };
124 };
125
126 L2switch@2,0 {
127 #address-cells = <1>;
128 #size-cells = <1>;
129 compatible = "vitesse-7385";
130 reg = <0x2 0x0 0x20000>;
131 };
132
133 cpld@3,0 {
134 #address-cells = <1>;
135 #size-cells = <1>;
136 compatible = "cpld";
137 reg = <0x3 0x0 0x20000>;
138 read-only;
139 };
140};
141
142&soc {
143 i2c@3000 {
144 rtc@68 {
145 compatible = "pericom,pt7c4338";
146 reg = <0x68>;
147 };
148 };
149
150 spi@7000 {
151 flash@0 {
152 #address-cells = <1>;
153 #size-cells = <1>;
154 compatible = "spansion,m25p80";
155 reg = <0>;
156 spi-max-frequency = <40000000>;
157
158 partition@0 {
159 /* 512KB for u-boot Bootloader Image */
160 reg = <0x0 0x00080000>;
161 label = "SPI U-Boot Image";
162 read-only;
163 };
164
165 partition@80000 {
166 /* 512KB for DTB Image */
167 reg = <0x00080000 0x00080000>;
168 label = "SPI DTB Image";
169 };
170
171 partition@100000 {
172 /* 4MB for Linux Kernel Image */
173 reg = <0x00100000 0x00400000>;
174 label = "SPI Linux Kernel Image";
175 };
176
177 partition@500000 {
178 /* 4MB for Compressed RFS Image */
179 reg = <0x00500000 0x00400000>;
180 label = "SPI Compressed RFS Image";
181 };
182
183 partition@900000 {
184 /* 7MB for JFFS2 based RFS */
185 reg = <0x00900000 0x00700000>;
186 label = "SPI JFFS2 RFS";
187 };
188 };
189 };
190
191 usb@22000 {
192 phy_type = "ulpi";
193 };
194
195 mdio@24520 {
196 phy0: ethernet-phy@0 {
197 interrupts = <3 1 0 0>;
198 reg = <0x0>;
199 };
200 phy1: ethernet-phy@1 {
201 interrupts = <2 1 0 0>;
202 reg = <0x1>;
203 };
204 };
205
206 mdio@25520 {
207 tbi0: tbi-phy@11 {
208 reg = <0x11>;
209 device_type = "tbi-phy";
210 };
211 };
212
213 mdio@26520 {
214 status = "disabled";
215 };
216
217 ptp_clock@24e00 {
218 fsl,tclk-period = <5>;
219 fsl,tmr-prsc = <200>;
220 fsl,tmr-add = <0xCCCCCCCD>;
221 fsl,tmr-fiper1 = <0x3B9AC9FB>;
222 fsl,tmr-fiper2 = <0x0001869B>;
223 fsl,max-adj = <249999999>;
224 };
225
226 enet0: ethernet@24000 {
227 fixed-link = <1 1 1000 0 0>;
228 phy-connection-type = "rgmii-id";
229 };
230
231 enet1: ethernet@25000 {
232 tbi-handle = <&tbi0>;
233 phy-handle = <&phy0>;
234 phy-connection-type = "sgmii";
235 };
236
237 enet2: ethernet@26000 {
238 phy-handle = <&phy1>;
239 phy-connection-type = "rgmii-id";
240 };
241};
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts b/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts
new file mode 100644
index 000000000000..852e5b27485d
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts
@@ -0,0 +1,96 @@
1/*
2 * P2020 RDB-PC 32Bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p2020si-pre.dtsi"
36
37/ {
38 model = "fsl,P2020RDB";
39 compatible = "fsl,P2020RDB-PC";
40
41 memory {
42 device_type = "memory";
43 };
44
45 lbc: localbus@ffe05000 {
46 reg = <0 0xffe05000 0 0x1000>;
47
48 /* NOR and NAND Flashes */
49 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
50 0x1 0x0 0x0 0xff800000 0x00040000
51 0x2 0x0 0x0 0xffb00000 0x00020000
52 0x3 0x0 0x0 0xffa00000 0x00020000>;
53 };
54
55 soc: soc@ffe00000 {
56 ranges = <0x0 0x0 0xffe00000 0x100000>;
57 };
58
59 pci0: pcie@ffe08000 {
60 reg = <0 0xffe08000 0 0x1000>;
61 status = "disabled";
62 };
63
64 pci1: pcie@ffe09000 {
65 reg = <0 0xffe09000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
67 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
68 pcie@0 {
69 ranges = <0x2000000 0x0 0xe0000000
70 0x2000000 0x0 0xe0000000
71 0x0 0x20000000
72
73 0x1000000 0x0 0x0
74 0x1000000 0x0 0x0
75 0x0 0x100000>;
76 };
77 };
78
79 pci2: pcie@ffe0a000 {
80 reg = <0 0xffe0a000 0 0x1000>;
81 ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
82 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
83 pcie@0 {
84 ranges = <0x2000000 0x0 0xe0000000
85 0x2000000 0x0 0xe0000000
86 0x0 0x20000000
87
88 0x1000000 0x0 0x0
89 0x1000000 0x0 0x0
90 0x0 0x100000>;
91 };
92 };
93};
94
95/include/ "p2020rdb-pc.dtsi"
96/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
new file mode 100644
index 000000000000..b5a56ca51cf7
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts
@@ -0,0 +1,96 @@
1/*
2 * P2020 RDB-PC 36Bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p2020si-pre.dtsi"
36
37/ {
38 model = "fsl,P2020RDB";
39 compatible = "fsl,P2020RDB-PC";
40
41 memory {
42 device_type = "memory";
43 };
44
45 lbc: localbus@fffe05000 {
46 reg = <0xf 0xffe05000 0 0x1000>;
47
48 /* NOR and NAND Flashes */
49 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
50 0x1 0x0 0xf 0xff800000 0x00040000
51 0x2 0x0 0xf 0xffb00000 0x00020000
52 0x3 0x0 0xf 0xffa00000 0x00020000>;
53 };
54
55 soc: soc@fffe00000 {
56 ranges = <0x0 0xf 0xffe00000 0x100000>;
57 };
58
59 pci0: pcie@fffe08000 {
60 reg = <0xf 0xffe08000 0 0x1000>;
61 status = "disabled";
62 };
63
64 pci1: pcie@fffe09000 {
65 reg = <0xf 0xffe09000 0 0x1000>;
66 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
67 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
68 pcie@0 {
69 ranges = <0x2000000 0x0 0xe0000000
70 0x2000000 0x0 0xe0000000
71 0x0 0x20000000
72
73 0x1000000 0x0 0x0
74 0x1000000 0x0 0x0
75 0x0 0x100000>;
76 };
77 };
78
79 pci2: pcie@fffe0a000 {
80 reg = <0xf 0xffe0a000 0 0x1000>;
81 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
82 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
83 pcie@0 {
84 ranges = <0x2000000 0x0 0xe0000000
85 0x2000000 0x0 0xe0000000
86 0x0 0x20000000
87
88 0x1000000 0x0 0x0
89 0x1000000 0x0 0x0
90 0x0 0x100000>;
91 };
92 };
93};
94
95/include/ "p2020rdb-pc.dtsi"
96/include/ "fsl/p2020si-post.dtsi"
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-10 04:58:35 -0500