diff options
-rw-r--r-- | drivers/gpu/drm/i915/i915_sysfs.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index e3fa8cd419da..49554d9a6b71 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c | |||
@@ -313,7 +313,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, | |||
313 | struct drm_minor *minor = dev_to_drm_minor(kdev); | 313 | struct drm_minor *minor = dev_to_drm_minor(kdev); |
314 | struct drm_device *dev = minor->dev; | 314 | struct drm_device *dev = minor->dev; |
315 | struct drm_i915_private *dev_priv = dev->dev_private; | 315 | struct drm_i915_private *dev_priv = dev->dev_private; |
316 | u32 val, rp_state_cap, hw_max, hw_min, non_oc_max; | 316 | u32 val, hw_max, hw_min, non_oc_max; |
317 | ssize_t ret; | 317 | ssize_t ret; |
318 | 318 | ||
319 | ret = kstrtou32(buf, 0, &val); | 319 | ret = kstrtou32(buf, 0, &val); |
@@ -327,16 +327,14 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, | |||
327 | if (IS_VALLEYVIEW(dev_priv->dev)) { | 327 | if (IS_VALLEYVIEW(dev_priv->dev)) { |
328 | val = vlv_freq_opcode(dev_priv, val); | 328 | val = vlv_freq_opcode(dev_priv, val); |
329 | 329 | ||
330 | hw_max = valleyview_rps_max_freq(dev_priv); | 330 | non_oc_max = hw_max = dev_priv->rps.max_freq; |
331 | hw_min = valleyview_rps_min_freq(dev_priv); | 331 | hw_min = dev_priv->rps.min_freq; |
332 | non_oc_max = hw_max; | ||
333 | } else { | 332 | } else { |
334 | val /= GT_FREQUENCY_MULTIPLIER; | 333 | val /= GT_FREQUENCY_MULTIPLIER; |
335 | 334 | ||
336 | rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); | ||
337 | hw_max = dev_priv->rps.max_freq; | 335 | hw_max = dev_priv->rps.max_freq; |
338 | non_oc_max = (rp_state_cap & 0xff); | 336 | non_oc_max = dev_priv->rps.rp0_freq; |
339 | hw_min = ((rp_state_cap & 0xff0000) >> 16); | 337 | hw_min = dev_priv->rps.min_freq; |
340 | } | 338 | } |
341 | 339 | ||
342 | if (val < hw_min || val > hw_max || | 340 | if (val < hw_min || val > hw_max || |
@@ -394,7 +392,7 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, | |||
394 | struct drm_minor *minor = dev_to_drm_minor(kdev); | 392 | struct drm_minor *minor = dev_to_drm_minor(kdev); |
395 | struct drm_device *dev = minor->dev; | 393 | struct drm_device *dev = minor->dev; |
396 | struct drm_i915_private *dev_priv = dev->dev_private; | 394 | struct drm_i915_private *dev_priv = dev->dev_private; |
397 | u32 val, rp_state_cap, hw_max, hw_min; | 395 | u32 val, hw_max, hw_min; |
398 | ssize_t ret; | 396 | ssize_t ret; |
399 | 397 | ||
400 | ret = kstrtou32(buf, 0, &val); | 398 | ret = kstrtou32(buf, 0, &val); |
@@ -408,14 +406,13 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, | |||
408 | if (IS_VALLEYVIEW(dev)) { | 406 | if (IS_VALLEYVIEW(dev)) { |
409 | val = vlv_freq_opcode(dev_priv, val); | 407 | val = vlv_freq_opcode(dev_priv, val); |
410 | 408 | ||
411 | hw_max = valleyview_rps_max_freq(dev_priv); | 409 | hw_max = dev_priv->rps.max_freq; |
412 | hw_min = valleyview_rps_min_freq(dev_priv); | 410 | hw_min = dev_priv->rps.min_freq; |
413 | } else { | 411 | } else { |
414 | val /= GT_FREQUENCY_MULTIPLIER; | 412 | val /= GT_FREQUENCY_MULTIPLIER; |
415 | 413 | ||
416 | rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); | ||
417 | hw_max = dev_priv->rps.max_freq; | 414 | hw_max = dev_priv->rps.max_freq; |
418 | hw_min = ((rp_state_cap & 0xff0000) >> 16); | 415 | hw_min = dev_priv->rps.min_freq; |
419 | } | 416 | } |
420 | 417 | ||
421 | if (val < hw_min || val > hw_max || val > dev_priv->rps.max_freq_softlimit) { | 418 | if (val < hw_min || val > hw_max || val > dev_priv->rps.max_freq_softlimit) { |