diff options
-rw-r--r-- | arch/arm/boot/dts/am335x-boneblack.dts | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/am43x-epos-evm.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap-headsmp.S | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/timer.c | 2 |
6 files changed, 11 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index 6b71ad95a5cf..305975d3f531 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts | |||
@@ -26,7 +26,6 @@ | |||
26 | pinctrl-0 = <&emmc_pins>; | 26 | pinctrl-0 = <&emmc_pins>; |
27 | bus-width = <8>; | 27 | bus-width = <8>; |
28 | status = "okay"; | 28 | status = "okay"; |
29 | ti,vcc-aux-disable-is-sleep; | ||
30 | }; | 29 | }; |
31 | 30 | ||
32 | &am33xx_pinmux { | 31 | &am33xx_pinmux { |
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index d1f8707ff1df..d547009148da 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi | |||
@@ -67,11 +67,15 @@ | |||
67 | }; | 67 | }; |
68 | 68 | ||
69 | ocp { | 69 | ocp { |
70 | compatible = "simple-bus"; | 70 | compatible = "ti,am4372-l3-noc", "simple-bus"; |
71 | #address-cells = <1>; | 71 | #address-cells = <1>; |
72 | #size-cells = <1>; | 72 | #size-cells = <1>; |
73 | ranges; | 73 | ranges; |
74 | ti,hwmods = "l3_main"; | 74 | ti,hwmods = "l3_main"; |
75 | reg = <0x44000000 0x400000 | ||
76 | 0x44800000 0x400000>; | ||
77 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, | ||
78 | <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | ||
75 | 79 | ||
76 | prcm: prcm@44df0000 { | 80 | prcm: prcm@44df0000 { |
77 | compatible = "ti,am4-prcm"; | 81 | compatible = "ti,am4-prcm"; |
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index 167dbc8494de..2836328b90c8 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts | |||
@@ -341,7 +341,7 @@ | |||
341 | }; | 341 | }; |
342 | partition@9 { | 342 | partition@9 { |
343 | label = "NAND.file-system"; | 343 | label = "NAND.file-system"; |
344 | reg = <0x00800000 0x1F600000>; | 344 | reg = <0x00a00000 0x1f600000>; |
345 | }; | 345 | }; |
346 | }; | 346 | }; |
347 | }; | 347 | }; |
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 149b55099935..ab01f2d0e590 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi | |||
@@ -99,13 +99,13 @@ | |||
99 | * hierarchy. | 99 | * hierarchy. |
100 | */ | 100 | */ |
101 | ocp { | 101 | ocp { |
102 | compatible = "ti,omap4-l3-noc", "simple-bus"; | 102 | compatible = "ti,dra7-l3-noc", "simple-bus"; |
103 | #address-cells = <1>; | 103 | #address-cells = <1>; |
104 | #size-cells = <1>; | 104 | #size-cells = <1>; |
105 | ranges; | 105 | ranges; |
106 | ti,hwmods = "l3_main_1", "l3_main_2"; | 106 | ti,hwmods = "l3_main_1", "l3_main_2"; |
107 | reg = <0x44000000 0x2000>, | 107 | reg = <0x44000000 0x1000000>, |
108 | <0x44800000 0x3000>; | 108 | <0x45000000 0x1000>; |
109 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, | 109 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, |
110 | <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | 110 | <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; |
111 | 111 | ||
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S index 40c5d5f1451c..4993d4bfe9b2 100644 --- a/arch/arm/mach-omap2/omap-headsmp.S +++ b/arch/arm/mach-omap2/omap-headsmp.S | |||
@@ -31,10 +31,6 @@ | |||
31 | * register AuxCoreBoot0. | 31 | * register AuxCoreBoot0. |
32 | */ | 32 | */ |
33 | ENTRY(omap5_secondary_startup) | 33 | ENTRY(omap5_secondary_startup) |
34 | .arm | ||
35 | THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode. | ||
36 | THUMB( bx r9 ) @ If this is a Thumb-2 kernel, | ||
37 | THUMB( .thumb ) @ switch to Thumb now. | ||
38 | wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 | 34 | wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 |
39 | ldr r0, [r2] | 35 | ldr r0, [r2] |
40 | mov r0, r0, lsr #5 | 36 | mov r0, r0, lsr #5 |
@@ -43,7 +39,7 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 | |||
43 | cmp r0, r4 | 39 | cmp r0, r4 |
44 | bne wait | 40 | bne wait |
45 | b secondary_startup | 41 | b secondary_startup |
46 | END(omap5_secondary_startup) | 42 | ENDPROC(omap5_secondary_startup) |
47 | /* | 43 | /* |
48 | * OMAP4 specific entry point for secondary CPU to jump from ROM | 44 | * OMAP4 specific entry point for secondary CPU to jump from ROM |
49 | * code. This routine also provides a holding flag into which | 45 | * code. This routine also provides a holding flag into which |
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index b62de9f9d05c..842b81f31957 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c | |||
@@ -361,7 +361,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, | |||
361 | 361 | ||
362 | /* Clocksource code */ | 362 | /* Clocksource code */ |
363 | static struct omap_dm_timer clksrc; | 363 | static struct omap_dm_timer clksrc; |
364 | static bool use_gptimer_clksrc; | 364 | static bool use_gptimer_clksrc __initdata; |
365 | 365 | ||
366 | /* | 366 | /* |
367 | * clocksource | 367 | * clocksource |