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-rw-r--r--arch/arm/boot/dts/sh73a0-reference.dtsi24
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi93
-rw-r--r--arch/arm/mach-shmobile/Makefile3
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c2
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c2
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7740.c6
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c9
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c35
-rw-r--r--arch/arm/mach-shmobile/headsmp-sh73a0.S50
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h8
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c16
-rw-r--r--arch/arm/mach-shmobile/pm-r8a7740.c22
-rw-r--r--arch/arm/mach-shmobile/pm-sh73a0.c32
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7740.c95
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c18
-rw-r--r--arch/arm/mach-shmobile/setup-sh73a0.c62
-rw-r--r--arch/arm/mach-shmobile/sleep-sh7372.S12
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c66
18 files changed, 485 insertions, 70 deletions
diff --git a/arch/arm/boot/dts/sh73a0-reference.dtsi b/arch/arm/boot/dts/sh73a0-reference.dtsi
new file mode 100644
index 000000000000..d4bb0125b2b2
--- /dev/null
+++ b/arch/arm/boot/dts/sh73a0-reference.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device Tree Source for the SH73A0 SoC
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "sh73a0.dtsi"
12
13/ {
14 compatible = "renesas,sh73a0";
15
16 mmcif: mmcif@0x10010000 {
17 compatible = "renesas,sh-mmcif";
18 reg = <0xe6bd0000 0x100>;
19 interrupt-parent = <&gic>;
20 interrupts = <0 140 0x4
21 0 141 0x4>;
22 reg-io-width = <4>;
23 };
24};
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
new file mode 100644
index 000000000000..721f48668f98
--- /dev/null
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -0,0 +1,93 @@
1/*
2 * Device Tree Source for the SH73A0 SoC
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "renesas,sh73a0";
15
16 cpus {
17 cpu@0 {
18 compatible = "arm,cortex-a9";
19 };
20 cpu@1 {
21 compatible = "arm,cortex-a9";
22 };
23 };
24
25 gic: interrupt-controller@f0001000 {
26 compatible = "arm,cortex-a9-gic";
27 #interrupt-cells = <3>;
28 #address-cells = <1>;
29 interrupt-controller;
30 reg = <0xf0001000 0x1000>,
31 <0xf0000100 0x100>;
32 };
33
34 i2c0: i2c@0xe6820000 {
35 #address-cells = <1>;
36 #size-cells = <0>;
37 compatible = "renesas,rmobile-iic";
38 reg = <0xe6820000 0x425>;
39 interrupt-parent = <&gic>;
40 interrupts = <0 167 0x4
41 0 168 0x4
42 0 169 0x4
43 0 170 0x4>;
44 };
45
46 i2c1: i2c@0xe6822000 {
47 #address-cells = <1>;
48 #size-cells = <0>;
49 compatible = "renesas,rmobile-iic";
50 reg = <0xe6822000 0x425>;
51 interrupt-parent = <&gic>;
52 interrupts = <0 51 0x4
53 0 52 0x4
54 0 53 0x4
55 0 54 0x4>;
56 };
57
58 i2c2: i2c@0xe6824000 {
59 #address-cells = <1>;
60 #size-cells = <0>;
61 compatible = "renesas,rmobile-iic";
62 reg = <0xe6824000 0x425>;
63 interrupt-parent = <&gic>;
64 interrupts = <0 171 0x4
65 0 172 0x4
66 0 173 0x4
67 0 174 0x4>;
68 };
69
70 i2c3: i2c@0xe6826000 {
71 #address-cells = <1>;
72 #size-cells = <0>;
73 compatible = "renesas,rmobile-iic";
74 reg = <0xe6826000 0x425>;
75 interrupt-parent = <&gic>;
76 interrupts = <0 183 0x4
77 0 184 0x4
78 0 185 0x4
79 0 186 0x4>;
80 };
81
82 i2c4: i2c@0xe6828000 {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 compatible = "renesas,rmobile-iic";
86 reg = <0xe6828000 0x425>;
87 interrupt-parent = <&gic>;
88 interrupts = <0 187 0x4
89 0 188 0x4
90 0 189 0x4
91 0 190 0x4>;
92 };
93};
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 0b7147928aa3..700e6623aa86 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o
15# SMP objects 15# SMP objects
16smp-y := platsmp.o headsmp.o 16smp-y := platsmp.o headsmp.o
17smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o 17smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o
18smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o 18smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-sh73a0.o
19smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o 19smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o
20smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o 20smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o
21 21
@@ -37,6 +37,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o
37obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o 37obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o
38obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o 38obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o
39obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o 39obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
40obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
40 41
41# Board objects 42# Board objects
42obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o 43obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index e7912447ad50..65731370da81 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -1181,6 +1181,8 @@ static void __init eva_init(void)
1181 rmobile_add_device_to_domain("A4LC", &hdmi_lcdc_device); 1181 rmobile_add_device_to_domain("A4LC", &hdmi_lcdc_device);
1182 if (usb) 1182 if (usb)
1183 rmobile_add_device_to_domain("A3SP", usb); 1183 rmobile_add_device_to_domain("A3SP", usb);
1184
1185 r8a7740_pm_init();
1184} 1186}
1185 1187
1186static void __init eva_earlytimer_init(void) 1188static void __init eva_earlytimer_init(void)
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index ac9428530d7b..363c6edfa3cd 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -772,6 +772,8 @@ static void __init kzm_init(void)
772 772
773 sh73a0_add_standard_devices(); 773 sh73a0_add_standard_devices();
774 platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices)); 774 platform_add_devices(kzm_devices, ARRAY_SIZE(kzm_devices));
775
776 sh73a0_pm_init();
775} 777}
776 778
777static void kzm9g_restart(char mode, const char *cmd) 779static void kzm9g_restart(char mode, const char *cmd)
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index eac49d59782f..19ce885a3b43 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -581,10 +581,14 @@ static struct clk_lookup lookups[] = {
581 581
582 /* MSTP32 clocks */ 582 /* MSTP32 clocks */
583 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), 583 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]),
584 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP111]), 584 CLKDEV_DEV_ID("sh_tmu.3", &mstp_clks[MSTP111]),
585 CLKDEV_DEV_ID("sh_tmu.4", &mstp_clks[MSTP111]),
586 CLKDEV_DEV_ID("sh_tmu.5", &mstp_clks[MSTP111]),
585 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), 587 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]),
586 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), 588 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]),
587 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), 589 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]),
590 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]),
591 CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP125]),
588 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), 592 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]),
589 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]), 593 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]),
590 594
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 3ca6757b129a..45d21fe317f4 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -544,6 +544,7 @@ static struct clk_lookup lookups[] = {
544 544
545 /* MSTP32 clocks */ 545 /* MSTP32 clocks */
546 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */ 546 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
547 CLKDEV_DEV_ID("fff30000.i2c", &mstp_clks[MSTP001]), /* IIC2 */
547 CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */ 548 CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */
548 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */ 549 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
549 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ 550 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
@@ -556,6 +557,7 @@ static struct clk_lookup lookups[] = {
556 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */ 557 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
557 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */ 558 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
558 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ 559 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
560 CLKDEV_DEV_ID("fff20000.i2c", &mstp_clks[MSTP116]), /* IIC0 */
559 CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[MSTP113]), /* MERAM */ 561 CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[MSTP113]), /* MERAM */
560 CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */ 562 CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
561 CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */ 563 CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
@@ -577,18 +579,25 @@ static struct clk_lookup lookups[] = {
577 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ 579 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
578 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ 580 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
579 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ 581 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
582 CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]), /* IIC1 */
580 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */ 583 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
581 CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */ 584 CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */
582 CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP322]), /* USB0 */ 585 CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP322]), /* USB0 */
583 CLKDEV_DEV_ID("sh_flctl.0", &mstp_clks[MSTP315]), /* FLCTL */ 586 CLKDEV_DEV_ID("sh_flctl.0", &mstp_clks[MSTP315]), /* FLCTL */
584 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 587 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
588 CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */
585 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 589 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
590 CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */
586 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ 591 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
592 CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMC */
587 CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */ 593 CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */
588 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */ 594 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */
595 CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]), /* SDHI2 */
589 CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */ 596 CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
590 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */ 597 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
598 CLKDEV_DEV_ID("e6d20000.i2c", &mstp_clks[MSTP411]), /* IIC3 */
591 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */ 599 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */
600 CLKDEV_DEV_ID("e6d30000.i2c", &mstp_clks[MSTP410]), /* IIC4 */
592 CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */ 601 CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */
593 CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */ 602 CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
594 CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */ 603 CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 516ff7f3e434..afa5423a0f93 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -264,17 +264,17 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2,
264 SH_CLK_DIV4(&pll1_clk, _reg, _bit, _mask, _flags) 264 SH_CLK_DIV4(&pll1_clk, _reg, _bit, _mask, _flags)
265 265
266static struct clk div4_clks[DIV4_NR] = { 266static struct clk div4_clks[DIV4_NR] = {
267 [DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT), 267 [DIV4_I] = DIV4(FRQCRA, 20, 0xdff, CLK_ENABLE_ON_INIT),
268 [DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT), 268 [DIV4_ZG] = DIV4(FRQCRA, 16, 0xd7f, CLK_ENABLE_ON_INIT),
269 [DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT), 269 [DIV4_M3] = DIV4(FRQCRA, 12, 0x1dff, CLK_ENABLE_ON_INIT),
270 [DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT), 270 [DIV4_B] = DIV4(FRQCRA, 8, 0xdff, CLK_ENABLE_ON_INIT),
271 [DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0), 271 [DIV4_M1] = DIV4(FRQCRA, 4, 0x1dff, 0),
272 [DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0), 272 [DIV4_M2] = DIV4(FRQCRA, 0, 0x1dff, 0),
273 [DIV4_Z] = DIV4(FRQCRB, 24, 0xbff, 0), 273 [DIV4_Z] = DIV4(FRQCRB, 24, 0x97f, 0),
274 [DIV4_ZTR] = DIV4(FRQCRB, 20, 0xfff, 0), 274 [DIV4_ZTR] = DIV4(FRQCRB, 20, 0xdff, 0),
275 [DIV4_ZT] = DIV4(FRQCRB, 16, 0xfff, 0), 275 [DIV4_ZT] = DIV4(FRQCRB, 16, 0xdff, 0),
276 [DIV4_ZX] = DIV4(FRQCRB, 12, 0xfff, 0), 276 [DIV4_ZX] = DIV4(FRQCRB, 12, 0xdff, 0),
277 [DIV4_HP] = DIV4(FRQCRB, 4, 0xfff, 0), 277 [DIV4_HP] = DIV4(FRQCRB, 4, 0xdff, 0),
278}; 278};
279 279
280enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1, 280enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
@@ -525,6 +525,13 @@ static struct clk mstp_clks[MSTP_NR] = {
525 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 525 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
526}; 526};
527 527
528/* The lookups structure below includes duplicate entries for some clocks
529 * with alternate names.
530 * - The traditional name used when a device is initialised with platform data
531 * - The name used when a device is initialised using device tree
532 * The longer-term aim is to remove these duplicates, and indeed the
533 * lookups table entirely, by describing clocks using device tree.
534 */
528static struct clk_lookup lookups[] = { 535static struct clk_lookup lookups[] = {
529 /* main clocks */ 536 /* main clocks */
530 CLKDEV_CON_ID("r_clk", &r_clk), 537 CLKDEV_CON_ID("r_clk", &r_clk),
@@ -545,6 +552,7 @@ static struct clk_lookup lookups[] = {
545 552
546 /* MSTP32 clocks */ 553 /* MSTP32 clocks */
547 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ 554 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
555 CLKDEV_DEV_ID("e6824000.i2c", &mstp_clks[MSTP001]), /* I2C2 */
548 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */ 556 CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */
549 CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */ 557 CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */
550 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */ 558 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
@@ -553,6 +561,7 @@ static struct clk_lookup lookups[] = {
553 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ 561 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
554 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ 562 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
555 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ 563 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
564 CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */
556 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ 565 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
557 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ 566 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
558 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */ 567 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
@@ -569,17 +578,21 @@ static struct clk_lookup lookups[] = {
569 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */ 578 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
570 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ 579 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
571 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ 580 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
581 CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
572 CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */ 582 CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */
573 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 583 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
574 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 584 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
575 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 585 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
586 CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
576 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ 587 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
577 CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */ 588 CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
578 CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */ 589 CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
579 CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */ 590 CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
580 CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */ 591 CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
581 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ 592 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
593 CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */
582 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ 594 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
595 CLKDEV_DEV_ID("e6828000.i2c", &mstp_clks[MSTP410]), /* I2C4 */
583 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ 596 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
584}; 597};
585 598
diff --git a/arch/arm/mach-shmobile/headsmp-sh73a0.S b/arch/arm/mach-shmobile/headsmp-sh73a0.S
new file mode 100644
index 000000000000..bec4c0d9b713
--- /dev/null
+++ b/arch/arm/mach-shmobile/headsmp-sh73a0.S
@@ -0,0 +1,50 @@
1/*
2 * SMP support for SoC sh73a0
3 *
4 * Copyright (C) 2012 Bastian Hecht
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#include <linux/linkage.h>
23#include <linux/init.h>
24#include <asm/memory.h>
25
26 __CPUINIT
27/*
28 * Reset vector for secondary CPUs.
29 *
30 * First we turn on L1 cache coherency for our CPU. Then we jump to
31 * shmobile_invalidate_start that invalidates the cache and hands over control
32 * to the common ARM startup code.
33 * This function will be mapped to address 0 by the SBAR register.
34 * A normal branch is out of range here so we need a long jump. We jump to
35 * the physical address as the MMU is still turned off.
36 */
37 .align 12
38ENTRY(sh73a0_secondary_vector)
39 mrc p15, 0, r0, c0, c0, 5 @ read MIPDR
40 and r0, r0, #3 @ mask out cpu ID
41 lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits
42 mov r1, #0xf0000000 @ SCU base address
43 ldr r2, [r1, #8] @ SCU Power Status Register
44 mov r3, #3
45 bic r2, r2, r3, lsl r0 @ Clear bits of our CPU (Run Mode)
46 str r2, [r1, #8] @ write back
47
48 ldr pc, 1f
491: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
50ENDPROC(sh73a0_secondary_vector)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index a57439eec11a..64c0622ae7d6 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -23,6 +23,8 @@ extern void sh7372_map_io(void);
23extern void sh7372_earlytimer_init(void); 23extern void sh7372_earlytimer_init(void);
24extern void sh7372_add_early_devices(void); 24extern void sh7372_add_early_devices(void);
25extern void sh7372_add_standard_devices(void); 25extern void sh7372_add_standard_devices(void);
26extern void sh7372_add_early_devices_dt(void);
27extern void sh7372_add_standard_devices_dt(void);
26extern void sh7372_clock_init(void); 28extern void sh7372_clock_init(void);
27extern void sh7372_pinmux_init(void); 29extern void sh7372_pinmux_init(void);
28extern void sh7372_pm_init(void); 30extern void sh7372_pm_init(void);
@@ -32,12 +34,17 @@ extern struct clk sh7372_extal1_clk;
32extern struct clk sh7372_extal2_clk; 34extern struct clk sh7372_extal2_clk;
33 35
34extern void sh73a0_init_irq(void); 36extern void sh73a0_init_irq(void);
37extern void sh73a0_init_irq_dt(void);
35extern void sh73a0_map_io(void); 38extern void sh73a0_map_io(void);
36extern void sh73a0_earlytimer_init(void); 39extern void sh73a0_earlytimer_init(void);
37extern void sh73a0_add_early_devices(void); 40extern void sh73a0_add_early_devices(void);
41extern void sh73a0_add_early_devices_dt(void);
38extern void sh73a0_add_standard_devices(void); 42extern void sh73a0_add_standard_devices(void);
43extern void sh73a0_add_standard_devices_dt(void);
39extern void sh73a0_clock_init(void); 44extern void sh73a0_clock_init(void);
40extern void sh73a0_pinmux_init(void); 45extern void sh73a0_pinmux_init(void);
46extern void sh73a0_pm_init(void);
47extern void sh73a0_secondary_vector(void);
41extern struct clk sh73a0_extal1_clk; 48extern struct clk sh73a0_extal1_clk;
42extern struct clk sh73a0_extal2_clk; 49extern struct clk sh73a0_extal2_clk;
43extern struct clk sh73a0_extcki_clk; 50extern struct clk sh73a0_extcki_clk;
@@ -49,6 +56,7 @@ extern void r8a7740_add_early_devices(void);
49extern void r8a7740_add_standard_devices(void); 56extern void r8a7740_add_standard_devices(void);
50extern void r8a7740_clock_init(u8 md_ck); 57extern void r8a7740_clock_init(u8 md_ck);
51extern void r8a7740_pinmux_init(void); 58extern void r8a7740_pinmux_init(void);
59extern void r8a7740_pm_init(void);
52 60
53extern void r8a7779_init_irq(void); 61extern void r8a7779_init_irq(void);
54extern void r8a7779_map_io(void); 62extern void r8a7779_map_io(void);
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 978369973be4..91faba666d46 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -23,6 +23,7 @@
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/sh_intc.h> 25#include <linux/sh_intc.h>
26#include <linux/irqchip.h>
26#include <linux/irqchip/arm-gic.h> 27#include <linux/irqchip/arm-gic.h>
27#include <mach/intc.h> 28#include <mach/intc.h>
28#include <mach/irqs.h> 29#include <mach/irqs.h>
@@ -315,11 +316,6 @@ static int intca_gic_set_type(struct irq_data *data, unsigned int type)
315 return irq_cbp(irq_set_type, to_intca_reloc_irq(data), type); 316 return irq_cbp(irq_set_type, to_intca_reloc_irq(data), type);
316} 317}
317 318
318static int intca_gic_set_wake(struct irq_data *data, unsigned int on)
319{
320 return irq_cbp(irq_set_wake, to_intca_reloc_irq(data), on);
321}
322
323#ifdef CONFIG_SMP 319#ifdef CONFIG_SMP
324static int intca_gic_set_affinity(struct irq_data *data, 320static int intca_gic_set_affinity(struct irq_data *data,
325 const struct cpumask *cpumask, 321 const struct cpumask *cpumask,
@@ -339,7 +335,7 @@ struct irq_chip intca_gic_irq_chip = {
339 .irq_disable = intca_gic_disable, 335 .irq_disable = intca_gic_disable,
340 .irq_shutdown = intca_gic_disable, 336 .irq_shutdown = intca_gic_disable,
341 .irq_set_type = intca_gic_set_type, 337 .irq_set_type = intca_gic_set_type,
342 .irq_set_wake = intca_gic_set_wake, 338 .irq_set_wake = sh73a0_set_wake,
343#ifdef CONFIG_SMP 339#ifdef CONFIG_SMP
344 .irq_set_affinity = intca_gic_set_affinity, 340 .irq_set_affinity = intca_gic_set_affinity,
345#endif 341#endif
@@ -464,3 +460,11 @@ void __init sh73a0_init_irq(void)
464 sh73a0_pint1_cascade.handler = sh73a0_pint1_demux; 460 sh73a0_pint1_cascade.handler = sh73a0_pint1_demux;
465 setup_irq(gic_spi(34), &sh73a0_pint1_cascade); 461 setup_irq(gic_spi(34), &sh73a0_pint1_cascade);
466} 462}
463
464#ifdef CONFIG_OF
465void __init sh73a0_init_irq_dt(void)
466{
467 irqchip_init();
468 gic_arch_extn.irq_set_wake = sh73a0_set_wake;
469}
470#endif
diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c
index 21e5316d2d88..40b87aa1d448 100644
--- a/arch/arm/mach-shmobile/pm-r8a7740.c
+++ b/arch/arm/mach-shmobile/pm-r8a7740.c
@@ -9,7 +9,9 @@
9 * for more details. 9 * for more details.
10 */ 10 */
11#include <linux/console.h> 11#include <linux/console.h>
12#include <linux/suspend.h>
12#include <mach/pm-rmobile.h> 13#include <mach/pm-rmobile.h>
14#include <mach/common.h>
13 15
14#ifdef CONFIG_PM 16#ifdef CONFIG_PM
15static int r8a7740_pd_a4s_suspend(void) 17static int r8a7740_pd_a4s_suspend(void)
@@ -58,3 +60,23 @@ void __init r8a7740_init_pm_domains(void)
58} 60}
59 61
60#endif /* CONFIG_PM */ 62#endif /* CONFIG_PM */
63
64#ifdef CONFIG_SUSPEND
65static int r8a7740_enter_suspend(suspend_state_t suspend_state)
66{
67 cpu_do_idle();
68 return 0;
69}
70
71static void r8a7740_suspend_init(void)
72{
73 shmobile_suspend_ops.enter = r8a7740_enter_suspend;
74}
75#else
76static void r8a7740_suspend_init(void) {}
77#endif
78
79void __init r8a7740_pm_init(void)
80{
81 r8a7740_suspend_init();
82}
diff --git a/arch/arm/mach-shmobile/pm-sh73a0.c b/arch/arm/mach-shmobile/pm-sh73a0.c
new file mode 100644
index 000000000000..99086e98fbbc
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm-sh73a0.c
@@ -0,0 +1,32 @@
1/*
2 * sh73a0 Power management support
3 *
4 * Copyright (C) 2012 Bastian Hecht <hechtb+renesas@gmail.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/suspend.h>
12#include <mach/common.h>
13
14#ifdef CONFIG_SUSPEND
15static int sh73a0_enter_suspend(suspend_state_t suspend_state)
16{
17 cpu_do_idle();
18 return 0;
19}
20
21static void sh73a0_suspend_init(void)
22{
23 shmobile_suspend_ops.enter = sh73a0_enter_suspend;
24}
25#else
26static void sh73a0_suspend_init(void) {}
27#endif
28
29void __init sh73a0_pm_init(void)
30{
31 sh73a0_suspend_init();
32}
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 03c69f9979aa..847567d55487 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -27,7 +27,6 @@
27#include <linux/serial_sci.h> 27#include <linux/serial_sci.h>
28#include <linux/sh_dma.h> 28#include <linux/sh_dma.h>
29#include <linux/sh_timer.h> 29#include <linux/sh_timer.h>
30#include <linux/dma-mapping.h>
31#include <mach/dma-register.h> 30#include <mach/dma-register.h>
32#include <mach/r8a7740.h> 31#include <mach/r8a7740.h>
33#include <mach/pm-rmobile.h> 32#include <mach/pm-rmobile.h>
@@ -262,6 +261,97 @@ static struct platform_device cmt10_device = {
262 .num_resources = ARRAY_SIZE(cmt10_resources), 261 .num_resources = ARRAY_SIZE(cmt10_resources),
263}; 262};
264 263
264/* TMU */
265static struct sh_timer_config tmu00_platform_data = {
266 .name = "TMU00",
267 .channel_offset = 0x4,
268 .timer_bit = 0,
269 .clockevent_rating = 200,
270};
271
272static struct resource tmu00_resources[] = {
273 [0] = {
274 .name = "TMU00",
275 .start = 0xfff80008,
276 .end = 0xfff80014 - 1,
277 .flags = IORESOURCE_MEM,
278 },
279 [1] = {
280 .start = intcs_evt2irq(0xe80),
281 .flags = IORESOURCE_IRQ,
282 },
283};
284
285static struct platform_device tmu00_device = {
286 .name = "sh_tmu",
287 .id = 0,
288 .dev = {
289 .platform_data = &tmu00_platform_data,
290 },
291 .resource = tmu00_resources,
292 .num_resources = ARRAY_SIZE(tmu00_resources),
293};
294
295static struct sh_timer_config tmu01_platform_data = {
296 .name = "TMU01",
297 .channel_offset = 0x10,
298 .timer_bit = 1,
299 .clocksource_rating = 200,
300};
301
302static struct resource tmu01_resources[] = {
303 [0] = {
304 .name = "TMU01",
305 .start = 0xfff80014,
306 .end = 0xfff80020 - 1,
307 .flags = IORESOURCE_MEM,
308 },
309 [1] = {
310 .start = intcs_evt2irq(0xea0),
311 .flags = IORESOURCE_IRQ,
312 },
313};
314
315static struct platform_device tmu01_device = {
316 .name = "sh_tmu",
317 .id = 1,
318 .dev = {
319 .platform_data = &tmu01_platform_data,
320 },
321 .resource = tmu01_resources,
322 .num_resources = ARRAY_SIZE(tmu01_resources),
323};
324
325static struct sh_timer_config tmu02_platform_data = {
326 .name = "TMU02",
327 .channel_offset = 0x1C,
328 .timer_bit = 2,
329 .clocksource_rating = 200,
330};
331
332static struct resource tmu02_resources[] = {
333 [0] = {
334 .name = "TMU02",
335 .start = 0xfff80020,
336 .end = 0xfff8002C - 1,
337 .flags = IORESOURCE_MEM,
338 },
339 [1] = {
340 .start = intcs_evt2irq(0xec0),
341 .flags = IORESOURCE_IRQ,
342 },
343};
344
345static struct platform_device tmu02_device = {
346 .name = "sh_tmu",
347 .id = 2,
348 .dev = {
349 .platform_data = &tmu02_platform_data,
350 },
351 .resource = tmu02_resources,
352 .num_resources = ARRAY_SIZE(tmu02_resources),
353};
354
265static struct platform_device *r8a7740_early_devices[] __initdata = { 355static struct platform_device *r8a7740_early_devices[] __initdata = {
266 &scif0_device, 356 &scif0_device,
267 &scif1_device, 357 &scif1_device,
@@ -273,6 +363,9 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
273 &scif7_device, 363 &scif7_device,
274 &scifb_device, 364 &scifb_device,
275 &cmt10_device, 365 &cmt10_device,
366 &tmu00_device,
367 &tmu01_device,
368 &tmu02_device,
276}; 369};
277 370
278/* DMA */ 371/* DMA */
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index a181ced09e45..7e87ab3eb8d3 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -66,8 +66,7 @@ static struct plat_sci_port scif0_platform_data = {
66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
67 .scbrr_algo_id = SCBRR_ALGO_2, 67 .scbrr_algo_id = SCBRR_ALGO_2,
68 .type = PORT_SCIF, 68 .type = PORT_SCIF,
69 .irqs = { gic_spi(88), gic_spi(88), 69 .irqs = SCIx_IRQ_MUXED(gic_spi(88)),
70 gic_spi(88), gic_spi(88) },
71}; 70};
72 71
73static struct platform_device scif0_device = { 72static struct platform_device scif0_device = {
@@ -84,8 +83,7 @@ static struct plat_sci_port scif1_platform_data = {
84 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 83 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
85 .scbrr_algo_id = SCBRR_ALGO_2, 84 .scbrr_algo_id = SCBRR_ALGO_2,
86 .type = PORT_SCIF, 85 .type = PORT_SCIF,
87 .irqs = { gic_spi(89), gic_spi(89), 86 .irqs = SCIx_IRQ_MUXED(gic_spi(89)),
88 gic_spi(89), gic_spi(89) },
89}; 87};
90 88
91static struct platform_device scif1_device = { 89static struct platform_device scif1_device = {
@@ -102,8 +100,7 @@ static struct plat_sci_port scif2_platform_data = {
102 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 100 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
103 .scbrr_algo_id = SCBRR_ALGO_2, 101 .scbrr_algo_id = SCBRR_ALGO_2,
104 .type = PORT_SCIF, 102 .type = PORT_SCIF,
105 .irqs = { gic_spi(90), gic_spi(90), 103 .irqs = SCIx_IRQ_MUXED(gic_spi(90)),
106 gic_spi(90), gic_spi(90) },
107}; 104};
108 105
109static struct platform_device scif2_device = { 106static struct platform_device scif2_device = {
@@ -120,8 +117,7 @@ static struct plat_sci_port scif3_platform_data = {
120 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 117 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
121 .scbrr_algo_id = SCBRR_ALGO_2, 118 .scbrr_algo_id = SCBRR_ALGO_2,
122 .type = PORT_SCIF, 119 .type = PORT_SCIF,
123 .irqs = { gic_spi(91), gic_spi(91), 120 .irqs = SCIx_IRQ_MUXED(gic_spi(91)),
124 gic_spi(91), gic_spi(91) },
125}; 121};
126 122
127static struct platform_device scif3_device = { 123static struct platform_device scif3_device = {
@@ -138,8 +134,7 @@ static struct plat_sci_port scif4_platform_data = {
138 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 134 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
139 .scbrr_algo_id = SCBRR_ALGO_2, 135 .scbrr_algo_id = SCBRR_ALGO_2,
140 .type = PORT_SCIF, 136 .type = PORT_SCIF,
141 .irqs = { gic_spi(92), gic_spi(92), 137 .irqs = SCIx_IRQ_MUXED(gic_spi(92)),
142 gic_spi(92), gic_spi(92) },
143}; 138};
144 139
145static struct platform_device scif4_device = { 140static struct platform_device scif4_device = {
@@ -156,8 +151,7 @@ static struct plat_sci_port scif5_platform_data = {
156 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, 151 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
157 .scbrr_algo_id = SCBRR_ALGO_2, 152 .scbrr_algo_id = SCBRR_ALGO_2,
158 .type = PORT_SCIF, 153 .type = PORT_SCIF,
159 .irqs = { gic_spi(93), gic_spi(93), 154 .irqs = SCIx_IRQ_MUXED(gic_spi(93)),
160 gic_spi(93), gic_spi(93) },
161}; 155};
162 156
163static struct platform_device scif5_device = { 157static struct platform_device scif5_device = {
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index 8c2d6424f470..f7ecb0bc1bec 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -23,6 +23,7 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/of_platform.h>
26#include <linux/delay.h> 27#include <linux/delay.h>
27#include <linux/input.h> 28#include <linux/input.h>
28#include <linux/io.h> 29#include <linux/io.h>
@@ -754,7 +755,7 @@ static struct platform_device pmu_device = {
754 .resource = pmu_resources, 755 .resource = pmu_resources,
755}; 756};
756 757
757static struct platform_device *sh73a0_early_devices[] __initdata = { 758static struct platform_device *sh73a0_early_devices_dt[] __initdata = {
758 &scif0_device, 759 &scif0_device,
759 &scif1_device, 760 &scif1_device,
760 &scif2_device, 761 &scif2_device,
@@ -765,6 +766,9 @@ static struct platform_device *sh73a0_early_devices[] __initdata = {
765 &scif7_device, 766 &scif7_device,
766 &scif8_device, 767 &scif8_device,
767 &cmt10_device, 768 &cmt10_device,
769};
770
771static struct platform_device *sh73a0_early_devices[] __initdata = {
768 &tmu00_device, 772 &tmu00_device,
769 &tmu01_device, 773 &tmu01_device,
770}; 774};
@@ -787,6 +791,8 @@ void __init sh73a0_add_standard_devices(void)
787 /* Clear software reset bit on SY-DMAC module */ 791 /* Clear software reset bit on SY-DMAC module */
788 __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); 792 __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2);
789 793
794 platform_add_devices(sh73a0_early_devices_dt,
795 ARRAY_SIZE(sh73a0_early_devices_dt));
790 platform_add_devices(sh73a0_early_devices, 796 platform_add_devices(sh73a0_early_devices,
791 ARRAY_SIZE(sh73a0_early_devices)); 797 ARRAY_SIZE(sh73a0_early_devices));
792 platform_add_devices(sh73a0_late_devices, 798 platform_add_devices(sh73a0_late_devices,
@@ -805,9 +811,63 @@ void __init sh73a0_earlytimer_init(void)
805 811
806void __init sh73a0_add_early_devices(void) 812void __init sh73a0_add_early_devices(void)
807{ 813{
814 early_platform_add_devices(sh73a0_early_devices_dt,
815 ARRAY_SIZE(sh73a0_early_devices_dt));
808 early_platform_add_devices(sh73a0_early_devices, 816 early_platform_add_devices(sh73a0_early_devices,
809 ARRAY_SIZE(sh73a0_early_devices)); 817 ARRAY_SIZE(sh73a0_early_devices));
810 818
811 /* setup early console here as well */ 819 /* setup early console here as well */
812 shmobile_setup_console(); 820 shmobile_setup_console();
813} 821}
822
823#ifdef CONFIG_USE_OF
824
825/* Please note that the clock initialisation shcheme used in
826 * sh73a0_add_early_devices_dt() and sh73a0_add_standard_devices_dt()
827 * does not work with SMP as there is a yet to be resolved lock-up in
828 * workqueue initialisation.
829 *
830 * CONFIG_SMP should be disabled when using this code.
831 */
832
833void __init sh73a0_add_early_devices_dt(void)
834{
835 shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */
836
837 early_platform_add_devices(sh73a0_early_devices_dt,
838 ARRAY_SIZE(sh73a0_early_devices_dt));
839
840 /* setup early console here as well */
841 shmobile_setup_console();
842}
843
844static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = {
845 {},
846};
847
848void __init sh73a0_add_standard_devices_dt(void)
849{
850 /* clocks are setup late during boot in the case of DT */
851 sh73a0_clock_init();
852
853 platform_add_devices(sh73a0_early_devices_dt,
854 ARRAY_SIZE(sh73a0_early_devices_dt));
855 of_platform_populate(NULL, of_default_bus_match_table,
856 sh73a0_auxdata_lookup, NULL);
857}
858
859static const char *sh73a0_boards_compat_dt[] __initdata = {
860 "renesas,sh73a0",
861 NULL,
862};
863
864DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
865 .map_io = sh73a0_map_io,
866 .init_early = sh73a0_add_early_devices_dt,
867 .nr_irqs = NR_IRQS_LEGACY,
868 .init_irq = sh73a0_init_irq_dt,
869 .init_machine = sh73a0_add_standard_devices_dt,
870 .init_time = shmobile_timer_init,
871 .dt_compat = sh73a0_boards_compat_dt,
872MACHINE_END
873#endif /* CONFIG_USE_OF */
diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S
index 1d564674451d..a9df53b69ab8 100644
--- a/arch/arm/mach-shmobile/sleep-sh7372.S
+++ b/arch/arm/mach-shmobile/sleep-sh7372.S
@@ -59,17 +59,19 @@ sh7372_do_idle_sysc:
59 mcr p15, 0, r0, c1, c0, 0 59 mcr p15, 0, r0, c1, c0, 0
60 isb 60 isb
61 61
62 /*
63 * Clean and invalidate data cache again.
64 */
65 ldr r1, kernel_flush
66 blx r1
67
62 /* disable L2 cache in the aux control register */ 68 /* disable L2 cache in the aux control register */
63 mrc p15, 0, r10, c1, c0, 1 69 mrc p15, 0, r10, c1, c0, 1
64 bic r10, r10, #2 70 bic r10, r10, #2
65 mcr p15, 0, r10, c1, c0, 1 71 mcr p15, 0, r10, c1, c0, 1
72 isb
66 73
67 /* 74 /*
68 * Invalidate data cache again.
69 */
70 ldr r1, kernel_flush
71 blx r1
72 /*
73 * The kernel doesn't interwork: v7_flush_dcache_all in particluar will 75 * The kernel doesn't interwork: v7_flush_dcache_all in particluar will
74 * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled. 76 * always return in Thumb state when CONFIG_THUMB2_KERNEL is enabled.
75 * This sequence switches back to ARM. Note that .align may insert a 77 * This sequence switches back to ARM. Note that .align may insert a
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 5c5bcb595350..9812ea3255c9 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -25,6 +25,7 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/irqchip/arm-gic.h> 26#include <linux/irqchip/arm-gic.h>
27#include <mach/common.h> 27#include <mach/common.h>
28#include <asm/cacheflush.h>
28#include <asm/smp_plat.h> 29#include <asm/smp_plat.h>
29#include <mach/sh73a0.h> 30#include <mach/sh73a0.h>
30#include <asm/smp_scu.h> 31#include <asm/smp_scu.h>
@@ -36,14 +37,13 @@
36#define SBAR IOMEM(0xe6180020) 37#define SBAR IOMEM(0xe6180020)
37#define APARMBAREA IOMEM(0xe6f10020) 38#define APARMBAREA IOMEM(0xe6f10020)
38 39
40#define PSTR_SHUTDOWN_MODE 3
41
39static void __iomem *scu_base_addr(void) 42static void __iomem *scu_base_addr(void)
40{ 43{
41 return (void __iomem *)0xf0000000; 44 return (void __iomem *)0xf0000000;
42} 45}
43 46
44static DEFINE_SPINLOCK(scu_lock);
45static unsigned long tmp;
46
47#ifdef CONFIG_HAVE_ARM_TWD 47#ifdef CONFIG_HAVE_ARM_TWD
48static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); 48static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
49void __init sh73a0_register_twd(void) 49void __init sh73a0_register_twd(void)
@@ -52,20 +52,6 @@ void __init sh73a0_register_twd(void)
52} 52}
53#endif 53#endif
54 54
55static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
56{
57 void __iomem *scu_base = scu_base_addr();
58
59 spin_lock(&scu_lock);
60 tmp = __raw_readl(scu_base + 8);
61 tmp &= ~clr;
62 tmp |= set;
63 spin_unlock(&scu_lock);
64
65 /* disable cache coherency after releasing the lock */
66 __raw_writel(tmp, scu_base + 8);
67}
68
69static unsigned int __init sh73a0_get_core_count(void) 55static unsigned int __init sh73a0_get_core_count(void)
70{ 56{
71 void __iomem *scu_base = scu_base_addr(); 57 void __iomem *scu_base = scu_base_addr();
@@ -82,9 +68,6 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
82{ 68{
83 cpu = cpu_logical_map(cpu); 69 cpu = cpu_logical_map(cpu);
84 70
85 /* enable cache coherency */
86 modify_scu_cpu_psr(0, 3 << (cpu * 8));
87
88 if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3) 71 if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
89 __raw_writel(1 << cpu, WUPCR); /* wake up */ 72 __raw_writel(1 << cpu, WUPCR); /* wake up */
90 else 73 else
@@ -95,16 +78,14 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
95 78
96static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) 79static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
97{ 80{
98 int cpu = cpu_logical_map(0);
99
100 scu_enable(scu_base_addr()); 81 scu_enable(scu_base_addr());
101 82
102 /* Map the reset vector (in headsmp.S) */ 83 /* Map the reset vector (in headsmp-sh73a0.S) */
103 __raw_writel(0, APARMBAREA); /* 4k */ 84 __raw_writel(0, APARMBAREA); /* 4k */
104 __raw_writel(__pa(shmobile_secondary_vector), SBAR); 85 __raw_writel(__pa(sh73a0_secondary_vector), SBAR);
105 86
106 /* enable cache coherency on CPU0 */ 87 /* enable cache coherency on booting CPU */
107 modify_scu_cpu_psr(0, 3 << (cpu * 8)); 88 scu_power_mode(scu_base_addr(), SCU_PM_NORMAL);
108} 89}
109 90
110static void __init sh73a0_smp_init_cpus(void) 91static void __init sh73a0_smp_init_cpus(void)
@@ -114,16 +95,20 @@ static void __init sh73a0_smp_init_cpus(void)
114 shmobile_smp_init_cpus(ncores); 95 shmobile_smp_init_cpus(ncores);
115} 96}
116 97
117static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu) 98#ifdef CONFIG_HOTPLUG_CPU
99static int sh73a0_cpu_kill(unsigned int cpu)
118{ 100{
101
119 int k; 102 int k;
103 u32 pstr;
120 104
121 /* this function is running on another CPU than the offline target, 105 /*
122 * here we need wait for shutdown code in platform_cpu_die() to 106 * wait until the power status register confirms the shutdown of the
123 * finish before asking SoC-specific code to power off the CPU core. 107 * offline target
124 */ 108 */
125 for (k = 0; k < 1000; k++) { 109 for (k = 0; k < 1000; k++) {
126 if (shmobile_cpu_is_dead(cpu)) 110 pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3;
111 if (pstr == PSTR_SHUTDOWN_MODE)
127 return 1; 112 return 1;
128 113
129 mdelay(1); 114 mdelay(1);
@@ -132,6 +117,23 @@ static int __maybe_unused sh73a0_cpu_kill(unsigned int cpu)
132 return 0; 117 return 0;
133} 118}
134 119
120static void sh73a0_cpu_die(unsigned int cpu)
121{
122 /*
123 * The ARM MPcore does not issue a cache coherency request for the L1
124 * cache when powering off single CPUs. We must take care of this and
125 * further caches.
126 */
127 dsb();
128 flush_cache_all();
129
130 /* Set power off mode. This takes the CPU out of the MP cluster */
131 scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF);
132
133 /* Enter shutdown mode */
134 cpu_do_idle();
135}
136#endif /* CONFIG_HOTPLUG_CPU */
135 137
136struct smp_operations sh73a0_smp_ops __initdata = { 138struct smp_operations sh73a0_smp_ops __initdata = {
137 .smp_init_cpus = sh73a0_smp_init_cpus, 139 .smp_init_cpus = sh73a0_smp_init_cpus,
@@ -140,7 +142,7 @@ struct smp_operations sh73a0_smp_ops __initdata = {
140 .smp_boot_secondary = sh73a0_boot_secondary, 142 .smp_boot_secondary = sh73a0_boot_secondary,
141#ifdef CONFIG_HOTPLUG_CPU 143#ifdef CONFIG_HOTPLUG_CPU
142 .cpu_kill = sh73a0_cpu_kill, 144 .cpu_kill = sh73a0_cpu_kill,
143 .cpu_die = shmobile_cpu_die, 145 .cpu_die = sh73a0_cpu_die,
144 .cpu_disable = shmobile_cpu_disable, 146 .cpu_disable = shmobile_cpu_disable,
145#endif 147#endif
146}; 148};
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-17 04:12:39 -0400