diff options
| -rw-r--r-- | arch/x86/kernel/reboot_fixups_32.c | 8 | ||||
| -rw-r--r-- | include/asm-x86/geode.h | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c index 8b30b26ad069..1a07bbea7be3 100644 --- a/arch/x86/kernel/reboot_fixups_32.c +++ b/arch/x86/kernel/reboot_fixups_32.c | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
| 13 | #include <asm/reboot_fixups.h> | 13 | #include <asm/reboot_fixups.h> |
| 14 | #include <asm/msr.h> | 14 | #include <asm/msr.h> |
| 15 | #include <asm/geode.h> | ||
| 15 | 16 | ||
| 16 | static void cs5530a_warm_reset(struct pci_dev *dev) | 17 | static void cs5530a_warm_reset(struct pci_dev *dev) |
| 17 | { | 18 | { |
| @@ -24,11 +25,8 @@ static void cs5530a_warm_reset(struct pci_dev *dev) | |||
| 24 | 25 | ||
| 25 | static void cs5536_warm_reset(struct pci_dev *dev) | 26 | static void cs5536_warm_reset(struct pci_dev *dev) |
| 26 | { | 27 | { |
| 27 | /* | 28 | /* writing 1 to the LSB of this MSR causes a hard reset */ |
| 28 | * 6.6.2.12 Soft Reset (DIVIL_SOFT_RESET) | 29 | wrmsrl(MSR_DIVIL_SOFT_RESET, 1ULL); |
| 29 | * writing 1 to the LSB of this MSR causes a hard reset. | ||
| 30 | */ | ||
| 31 | wrmsrl(0x51400017, 1ULL); | ||
| 32 | udelay(50); /* shouldn't get here but be safe and spin a while */ | 30 | udelay(50); /* shouldn't get here but be safe and spin a while */ |
| 33 | } | 31 | } |
| 34 | 32 | ||
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h index d94898831bac..771af336734f 100644 --- a/include/asm-x86/geode.h +++ b/include/asm-x86/geode.h | |||
| @@ -38,6 +38,8 @@ extern int geode_get_dev_base(unsigned int dev); | |||
| 38 | #define MSR_LBAR_ACPI 0x5140000E | 38 | #define MSR_LBAR_ACPI 0x5140000E |
| 39 | #define MSR_LBAR_PMS 0x5140000F | 39 | #define MSR_LBAR_PMS 0x5140000F |
| 40 | 40 | ||
| 41 | #define MSR_DIVIL_SOFT_RESET 0x51400017 | ||
| 42 | |||
| 41 | #define MSR_PIC_YSEL_LOW 0x51400020 | 43 | #define MSR_PIC_YSEL_LOW 0x51400020 |
| 42 | #define MSR_PIC_YSEL_HIGH 0x51400021 | 44 | #define MSR_PIC_YSEL_HIGH 0x51400021 |
| 43 | #define MSR_PIC_ZSEL_LOW 0x51400022 | 45 | #define MSR_PIC_ZSEL_LOW 0x51400022 |
