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-rw-r--r--arch/powerpc/boot/dts/motionpro.dts309
1 files changed, 309 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
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+++ b/arch/powerpc/boot/dts/motionpro.dts
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1/*
2 * Motion-PRO board Device Tree Source
3 *
4 * Copyright (C) 2007 Semihalf
5 * Marian Balakowicz <m8@semihalf.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ {
20 model = "promess,motionpro";
21 compatible = "promess,motionpro";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,5200@0 {
30 device_type = "cpu";
31 reg = <0>;
32 d-cache-line-size = <20>;
33 i-cache-line-size = <20>;
34 d-cache-size = <4000>; // L1, 16K
35 i-cache-size = <4000>; // L1, 16K
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
39 };
40 };
41
42 memory {
43 device_type = "memory";
44 reg = <00000000 04000000>; // 64MB
45 };
46
47 soc5200@f0000000 {
48 model = "fsl,mpc5200b";
49 compatible = "fsl,mpc5200b";
50 revision = ""; // from bootloader
51 device_type = "soc";
52 ranges = <0 f0000000 0000c000>;
53 reg = <f0000000 00000100>;
54 bus-frequency = <0>; // from bootloader
55 system-frequency = <0>; // from bootloader
56
57 cdm@200 {
58 compatible = "mpc5200b-cdm","mpc5200-cdm";
59 reg = <200 38>;
60 };
61
62 mpc5200_pic: pic@500 {
63 // 5200 interrupts are encoded into two levels;
64 interrupt-controller;
65 #interrupt-cells = <3>;
66 compatible = "mpc5200b-pic","mpc5200-pic";
67 reg = <500 80>;
68 };
69
70 gpt@600 { // General Purpose Timer
71 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
72 reg = <600 10>;
73 interrupts = <1 9 0>;
74 interrupt-parent = <&mpc5200_pic>;
75 fsl,has-wdt;
76 };
77
78 gpt@610 { // General Purpose Timer
79 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
80 reg = <610 10>;
81 interrupts = <1 a 0>;
82 interrupt-parent = <&mpc5200_pic>;
83 };
84
85 gpt@620 { // General Purpose Timer
86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
87 reg = <620 10>;
88 interrupts = <1 b 0>;
89 interrupt-parent = <&mpc5200_pic>;
90 };
91
92 gpt@630 { // General Purpose Timer
93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
94 reg = <630 10>;
95 interrupts = <1 c 0>;
96 interrupt-parent = <&mpc5200_pic>;
97 };
98
99 gpt@640 { // General Purpose Timer
100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
101 reg = <640 10>;
102 interrupts = <1 d 0>;
103 interrupt-parent = <&mpc5200_pic>;
104 };
105
106 gpt@650 { // General Purpose Timer
107 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
108 reg = <650 10>;
109 interrupts = <1 e 0>;
110 interrupt-parent = <&mpc5200_pic>;
111 };
112
113 motionpro-led@660 { // Motion-PRO status LED
114 compatible = "promess,motionpro-led";
115 label = "motionpro-statusled";
116 reg = <660 10>;
117 interrupts = <1 f 0>;
118 interrupt-parent = <&mpc5200_pic>;
119 blink-delay = <64>; // 100 msec
120 };
121
122 motionpro-led@670 { // Motion-PRO ready LED
123 compatible = "promess,motionpro-led";
124 label = "motionpro-readyled";
125 reg = <670 10>;
126 interrupts = <1 10 0>;
127 interrupt-parent = <&mpc5200_pic>;
128 };
129
130 rtc@800 { // Real time clock
131 compatible = "mpc5200b-rtc","mpc5200-rtc";
132 reg = <800 100>;
133 interrupts = <1 5 0 1 6 0>;
134 interrupt-parent = <&mpc5200_pic>;
135 };
136
137 mscan@980 {
138 compatible = "mpc5200b-mscan","mpc5200-mscan";
139 interrupts = <2 12 0>;
140 interrupt-parent = <&mpc5200_pic>;
141 reg = <980 80>;
142 };
143
144 gpio@b00 {
145 compatible = "mpc5200b-gpio","mpc5200-gpio";
146 reg = <b00 40>;
147 interrupts = <1 7 0>;
148 interrupt-parent = <&mpc5200_pic>;
149 };
150
151 gpio-wkup@c00 {
152 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup";
153 reg = <c00 40>;
154 interrupts = <1 8 0 0 3 0>;
155 interrupt-parent = <&mpc5200_pic>;
156 };
157
158
159 spi@f00 {
160 compatible = "mpc5200b-spi","mpc5200-spi";
161 reg = <f00 20>;
162 interrupts = <2 d 0 2 e 0>;
163 interrupt-parent = <&mpc5200_pic>;
164 };
165
166 usb@1000 {
167 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
168 reg = <1000 ff>;
169 interrupts = <2 6 0>;
170 interrupt-parent = <&mpc5200_pic>;
171 };
172
173 dma-controller@1200 {
174 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm";
175 reg = <1200 80>;
176 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
177 3 4 0 3 5 0 3 6 0 3 7 0
178 3 8 0 3 9 0 3 a 0 3 b 0
179 3 c 0 3 d 0 3 e 0 3 f 0>;
180 interrupt-parent = <&mpc5200_pic>;
181 };
182
183 xlb@1f00 {
184 compatible = "mpc5200b-xlb","mpc5200-xlb";
185 reg = <1f00 100>;
186 };
187
188 serial@2000 { // PSC1
189 device_type = "serial";
190 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
191 port-number = <0>; // Logical port assignment
192 reg = <2000 100>;
193 interrupts = <2 1 0>;
194 interrupt-parent = <&mpc5200_pic>;
195 };
196
197 // PSC2 in spi master mode
198 spi@2200 { // PSC2
199 compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
200 cell-index = <1>;
201 reg = <2200 100>;
202 interrupts = <2 2 0>;
203 interrupt-parent = <&mpc5200_pic>;
204 };
205
206 // PSC5 in uart mode
207 serial@2800 { // PSC5
208 device_type = "serial";
209 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart";
210 port-number = <4>; // Logical port assignment
211 reg = <2800 100>;
212 interrupts = <2 c 0>;
213 interrupt-parent = <&mpc5200_pic>;
214 };
215
216 ethernet@3000 {
217 device_type = "network";
218 compatible = "mpc5200b-fec","mpc5200-fec";
219 reg = <3000 800>;
220 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
221 interrupts = <2 5 0>;
222 interrupt-parent = <&mpc5200_pic>;
223 };
224
225 ata@3a00 {
226 compatible = "mpc5200b-ata","mpc5200-ata";
227 reg = <3a00 100>;
228 interrupts = <2 7 0>;
229 interrupt-parent = <&mpc5200_pic>;
230 };
231
232 i2c@3d40 {
233 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
234 reg = <3d40 40>;
235 interrupts = <2 10 0>;
236 interrupt-parent = <&mpc5200_pic>;
237 fsl5200-clocking;
238 };
239
240 sram@8000 {
241 compatible = "mpc5200b-sram","mpc5200-sram";
242 reg = <8000 4000>;
243 };
244 };
245
246 lpb {
247 model = "fsl,lpb";
248 compatible = "fsl,lpb";
249 #address-cells = <2>;
250 #size-cells = <1>;
251 ranges = <1 0 50000000 00010000
252 2 0 50010000 00010000
253 3 0 50020000 00010000>;
254
255 // 8-bit DualPort SRAM on LocalPlus Bus CS1
256 kollmorgen@1,0 {
257 compatible = "promess,motionpro-kollmorgen";
258 reg = <1 0 10000>;
259 interrupts = <1 1 0>;
260 interrupt-parent = <&mpc5200_pic>;
261 };
262
263 // 8-bit board CPLD on LocalPlus Bus CS2
264 cpld@2,0 {
265 compatible = "promess,motionpro-cpld";
266 reg = <2 0 10000>;
267 };
268
269 // 8-bit custom Anybus Module on LocalPlus Bus CS3
270 anybus@3,0 {
271 compatible = "promess,motionpro-anybus";
272 reg = <3 0 10000>;
273 };
274 pro_module_general@3,0 {
275 compatible = "promess,pro_module_general";
276 reg = <3 0 3>;
277 };
278 pro_module_dio@3,800 {
279 compatible = "promess,pro_module_dio";
280 reg = <3 800 2>;
281 };
282 };
283
284 pci@f0000d00 {
285 #interrupt-cells = <1>;
286 #size-cells = <2>;
287 #address-cells = <3>;
288 device_type = "pci";
289 compatible = "mpc5200b-pci","mpc5200-pci";
290 reg = <f0000d00 100>;
291 interrupt-map-mask = <f800 0 0 7>;
292 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
293 c000 0 0 2 &mpc5200_pic 1 1 3
294 c000 0 0 3 &mpc5200_pic 1 2 3
295 c000 0 0 4 &mpc5200_pic 1 3 3
296
297 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
298 c800 0 0 2 &mpc5200_pic 1 2 3
299 c800 0 0 3 &mpc5200_pic 1 3 3
300 c800 0 0 4 &mpc5200_pic 0 0 3>;
301 clock-frequency = <0>; // From boot loader
302 interrupts = <2 8 0 2 9 0 2 a 0>;
303 interrupt-parent = <&mpc5200_pic>;
304 bus-range = <0 0>;
305 ranges = <42000000 0 80000000 80000000 0 20000000
306 02000000 0 a0000000 a0000000 0 10000000
307 01000000 0 00000000 b0000000 0 01000000>;
308 };
309};