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-rw-r--r--arch/arm/mach-omap2/clock.c3
-rw-r--r--arch/arm/mach-omap2/cm.h7
-rw-r--r--arch/arm/mach-omap2/cm2xxx.c6
-rw-r--r--arch/arm/mach-omap2/cm2xxx.h4
-rw-r--r--arch/arm/mach-omap2/cm33xx.c9
-rw-r--r--arch/arm/mach-omap2/cm33xx.h6
-rw-r--r--arch/arm/mach-omap2/cm3xxx.c4
-rw-r--r--arch/arm/mach-omap2/cm3xxx.h2
-rw-r--r--arch/arm/mach-omap2/cm_common.c11
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c8
-rw-r--r--arch/arm/mach-omap2/cminst44xx.h1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c16
12 files changed, 43 insertions, 34 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 500530d1364a..ff2eb669bc08 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -171,7 +171,8 @@ static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
171 _wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit), 171 _wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit),
172 idlest_val, __clk_get_name(clk->hw.clk)); 172 idlest_val, __clk_get_name(clk->hw.clk));
173 } else { 173 } else {
174 cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit); 174 omap_cm_wait_module_ready(0, prcm_mod, idlest_reg_id,
175 idlest_bit);
175 }; 176 };
176} 177}
177 178
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 93473f9a551c..695c34dd37ca 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -49,13 +49,14 @@ extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
49struct cm_ll_data { 49struct cm_ll_data {
50 int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst, 50 int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
51 u8 *idlest_reg_id); 51 u8 *idlest_reg_id);
52 int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift); 52 int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
53 u8 idlest_shift);
53}; 54};
54 55
55extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, 56extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
56 u8 *idlest_reg_id); 57 u8 *idlest_reg_id);
57extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift); 58int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
58 59 u8 idlest_shift);
59extern int cm_register(struct cm_ll_data *cld); 60extern int cm_register(struct cm_ll_data *cld);
60extern int cm_unregister(struct cm_ll_data *cld); 61extern int cm_unregister(struct cm_ll_data *cld);
61 62
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 8be6ea50c092..f913efb6e9ba 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -150,7 +150,7 @@ static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit)
150 v |= m; 150 v |= m;
151 omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); 151 omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
152 152
153 omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit); 153 omap2xxx_cm_wait_module_ready(0, PLL_MOD, 1, status_bit);
154 154
155 /* 155 /*
156 * REVISIT: Should we return an error code if 156 * REVISIT: Should we return an error code if
@@ -238,6 +238,7 @@ int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
238 238
239/** 239/**
240 * omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby 240 * omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby
241 * @part: PRCM partition, ignored for OMAP2
241 * @prcm_mod: PRCM module offset 242 * @prcm_mod: PRCM module offset
242 * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) 243 * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
243 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check 244 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
@@ -246,7 +247,8 @@ int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
246 * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon 247 * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
247 * success or -EBUSY if the module doesn't enable in time. 248 * success or -EBUSY if the module doesn't enable in time.
248 */ 249 */
249int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) 250int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
251 u8 idlest_shift)
250{ 252{
251 int ena = 0, i = 0; 253 int ena = 0, i = 0;
252 u8 cm_idlest_reg; 254 u8 cm_idlest_reg;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 891d81c3c8f4..2526a8fd3d10 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -58,8 +58,8 @@ extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
58extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); 58extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
59 59
60extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); 60extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
61extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, 61int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
62 u8 idlest_shift); 62 u8 idlest_shift);
63extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, 63extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
64 s16 *prcm_inst, u8 *idlest_reg_id); 64 s16 *prcm_inst, u8 *idlest_reg_id);
65extern int omap2xxx_cm_fclks_active(void); 65extern int omap2xxx_cm_fclks_active(void);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index e02988fd237f..e022a8d57060 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -226,15 +226,18 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
226 226
227/** 227/**
228 * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state 228 * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
229 * @part: PRCM partition, ignored for AM33xx
229 * @inst: CM instance register offset (*_INST macro) 230 * @inst: CM instance register offset (*_INST macro)
230 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) 231 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
232 * @bit_shift: bit shift for the register, ignored for AM33xx
231 * 233 *
232 * Wait for the module IDLEST to be functional. If the idle state is in any 234 * Wait for the module IDLEST to be functional. If the idle state is in any
233 * the non functional state (trans, idle or disabled), module and thus the 235 * the non functional state (trans, idle or disabled), module and thus the
234 * sysconfig cannot be accessed and will probably lead to an "imprecise 236 * sysconfig cannot be accessed and will probably lead to an "imprecise
235 * external abort" 237 * external abort"
236 */ 238 */
237int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs) 239static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
240 u8 bit_shift)
238{ 241{
239 int i = 0; 242 int i = 0;
240 243
@@ -359,7 +362,9 @@ struct clkdm_ops am33xx_clkdm_operations = {
359 .clkdm_clk_disable = am33xx_clkdm_clk_disable, 362 .clkdm_clk_disable = am33xx_clkdm_clk_disable,
360}; 363};
361 364
362static struct cm_ll_data am33xx_cm_ll_data; 365static struct cm_ll_data am33xx_cm_ll_data = {
366 .wait_module_ready = &am33xx_cm_wait_module_ready,
367};
363 368
364int __init am33xx_cm_init(void) 369int __init am33xx_cm_init(void)
365{ 370{
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 1d3cde732648..fbbedf2c9bec 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -387,7 +387,6 @@ extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
387 u16 clkctrl_offs); 387 u16 clkctrl_offs);
388extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs, 388extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
389 u16 clkctrl_offs); 389 u16 clkctrl_offs);
390int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs);
391#else 390#else
392static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs) 391static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
393{ 392{
@@ -401,11 +400,6 @@ static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
401 u16 clkctrl_offs) 400 u16 clkctrl_offs)
402{ 401{
403} 402}
404
405static inline int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
406{
407 return 0;
408}
409#endif 403#endif
410 404
411#endif /* ASSEMBLER */ 405#endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 129a4e7f6ef5..6a3c01e16274 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -79,6 +79,7 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
79 79
80/** 80/**
81 * omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby 81 * omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby
82 * @part: PRCM partition, ignored for OMAP3
82 * @prcm_mod: PRCM module offset 83 * @prcm_mod: PRCM module offset
83 * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) 84 * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
84 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check 85 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
@@ -87,7 +88,8 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
87 * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon 88 * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
88 * success or -EBUSY if the module doesn't enable in time. 89 * success or -EBUSY if the module doesn't enable in time.
89 */ 90 */
90int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) 91static int omap3xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
92 u8 idlest_shift)
91{ 93{
92 int ena = 0, i = 0; 94 int ena = 0, i = 0;
93 u8 cm_idlest_reg; 95 u8 cm_idlest_reg;
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 7a16b5598127..55faf0e149a2 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -74,8 +74,6 @@ extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
74extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); 74extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
75 75
76extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); 76extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
77extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
78 u8 idlest_shift);
79 77
80extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, 78extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
81 s16 *prcm_inst, u8 *idlest_reg_id); 79 s16 *prcm_inst, u8 *idlest_reg_id);
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 8f6c4710877e..dd191837ac13 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -72,9 +72,10 @@ int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
72} 72}
73 73
74/** 74/**
75 * cm_wait_module_ready - wait for a module to leave idle or standby 75 * omap_cm_wait_module_ready - wait for a module to leave idle or standby
76 * @part: PRCM partition
76 * @prcm_mod: PRCM module offset 77 * @prcm_mod: PRCM module offset
77 * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) 78 * @idlest_reg: CM_IDLESTx register
78 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check 79 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
79 * 80 *
80 * Wait for the PRCM to indicate that the module identified by 81 * Wait for the PRCM to indicate that the module identified by
@@ -83,7 +84,8 @@ int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
83 * no per-SoC wait_module_ready() function pointer has been registered 84 * no per-SoC wait_module_ready() function pointer has been registered
84 * or if the idlest register is unknown on the SoC. 85 * or if the idlest register is unknown on the SoC.
85 */ 86 */
86int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) 87int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
88 u8 idlest_shift)
87{ 89{
88 if (!cm_ll_data->wait_module_ready) { 90 if (!cm_ll_data->wait_module_ready) {
89 WARN_ONCE(1, "cm: %s: no low-level function defined\n", 91 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
@@ -91,7 +93,8 @@ int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
91 return -EINVAL; 93 return -EINVAL;
92 } 94 }
93 95
94 return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift); 96 return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
97 idlest_shift);
95} 98}
96 99
97/** 100/**
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 695e71e802a5..c4f42de7f718 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -266,13 +266,15 @@ void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
266 * @part: PRCM partition ID that the CM_CLKCTRL register exists in 266 * @part: PRCM partition ID that the CM_CLKCTRL register exists in
267 * @inst: CM instance register offset (*_INST macro) 267 * @inst: CM instance register offset (*_INST macro)
268 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) 268 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
269 * @bit_shift: bit shift for the register, ignored for OMAP4+
269 * 270 *
270 * Wait for the module IDLEST to be functional. If the idle state is in any 271 * Wait for the module IDLEST to be functional. If the idle state is in any
271 * the non functional state (trans, idle or disabled), module and thus the 272 * the non functional state (trans, idle or disabled), module and thus the
272 * sysconfig cannot be accessed and will probably lead to an "imprecise 273 * sysconfig cannot be accessed and will probably lead to an "imprecise
273 * external abort" 274 * external abort"
274 */ 275 */
275int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs) 276static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
277 u8 bit_shift)
276{ 278{
277 int i = 0; 279 int i = 0;
278 280
@@ -506,7 +508,9 @@ struct clkdm_ops am43xx_clkdm_operations = {
506 .clkdm_clk_disable = omap4_clkdm_clk_disable, 508 .clkdm_clk_disable = omap4_clkdm_clk_disable,
507}; 509};
508 510
509static struct cm_ll_data omap4xxx_cm_ll_data; 511static struct cm_ll_data omap4xxx_cm_ll_data = {
512 .wait_module_ready = &omap4_cminst_wait_module_ready,
513};
510 514
511int __init omap4_cm_init(void) 515int __init omap4_cm_init(void)
512{ 516{
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index cc3c9133a304..fad0a97c033b 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -16,7 +16,6 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
16void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs); 16void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
17void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs); 17void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
18void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs); 18void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
19int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs);
20int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs); 19int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs);
21extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, 20extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
22 u16 clkctrl_offs); 21 u16 clkctrl_offs);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 2dca1a896943..1f7dd7dca7bb 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2946,9 +2946,9 @@ static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2946 2946
2947 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ 2947 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2948 2948
2949 return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs, 2949 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2950 oh->prcm.omap2.idlest_reg_id, 2950 oh->prcm.omap2.idlest_reg_id,
2951 oh->prcm.omap2.idlest_idle_bit); 2951 oh->prcm.omap2.idlest_idle_bit);
2952} 2952}
2953 2953
2954/** 2954/**
@@ -2973,9 +2973,9 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2973 2973
2974 /* XXX check module SIDLEMODE, hardreset status */ 2974 /* XXX check module SIDLEMODE, hardreset status */
2975 2975
2976 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, 2976 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2977 oh->clkdm->cm_inst, 2977 oh->clkdm->cm_inst,
2978 oh->prcm.omap4.clkctrl_offs); 2978 oh->prcm.omap4.clkctrl_offs, 0);
2979} 2979}
2980 2980
2981/** 2981/**
@@ -3000,8 +3000,8 @@ static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
3000 3000
3001 /* XXX check module SIDLEMODE, hardreset status */ 3001 /* XXX check module SIDLEMODE, hardreset status */
3002 3002
3003 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst, 3003 return omap_cm_wait_module_ready(0, oh->clkdm->cm_inst,
3004 oh->prcm.omap4.clkctrl_offs); 3004 oh->prcm.omap4.clkctrl_offs, 0);
3005} 3005}
3006 3006
3007/** 3007/**