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-rw-r--r--Documentation/devicetree/bindings/phy/samsung-phy.txt2
-rw-r--r--drivers/phy/Kconfig12
-rw-r--r--drivers/phy/phy-exynos4x12-usb2.c17
-rw-r--r--drivers/phy/phy-samsung-usb2.c6
-rw-r--r--drivers/phy/phy-samsung-usb2.h2
5 files changed, 31 insertions, 8 deletions
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index 2049261d8c31..6099a5c94283 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -26,6 +26,7 @@ Samsung S5P/EXYNOS SoC series USB PHY
26 26
27Required properties: 27Required properties:
28- compatible : should be one of the listed compatibles: 28- compatible : should be one of the listed compatibles:
29 - "samsung,exynos3250-usb2-phy"
29 - "samsung,exynos4210-usb2-phy" 30 - "samsung,exynos4210-usb2-phy"
30 - "samsung,exynos4x12-usb2-phy" 31 - "samsung,exynos4x12-usb2-phy"
31 - "samsung,exynos5250-usb2-phy" 32 - "samsung,exynos5250-usb2-phy"
@@ -46,6 +47,7 @@ and Exynos 4212) it is as follows:
46 1 - USB host ("host"), 47 1 - USB host ("host"),
47 2 - HSIC0 ("hsic0"), 48 2 - HSIC0 ("hsic0"),
48 3 - HSIC1 ("hsic1"), 49 3 - HSIC1 ("hsic1"),
50Exynos3250 has only USB device phy available as phy 0.
49 51
50Exynos 4210 and Exynos 4212 use mode switching and require that mode switch 52Exynos 4210 and Exynos 4212 use mode switching and require that mode switch
51register is supplied. 53register is supplied.
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 30c82fcbb492..7c49c4c61727 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -151,14 +151,14 @@ config PHY_EXYNOS4210_USB2
151 phys are available - device, host, HSIC0 and HSIC1. 151 phys are available - device, host, HSIC0 and HSIC1.
152 152
153config PHY_EXYNOS4X12_USB2 153config PHY_EXYNOS4X12_USB2
154 bool "Support for Exynos 4x12" 154 bool "Support for Exynos 3250/4x12"
155 depends on PHY_SAMSUNG_USB2 155 depends on PHY_SAMSUNG_USB2
156 depends on (SOC_EXYNOS4212 || SOC_EXYNOS4412) 156 depends on (SOC_EXYNOS3250 || SOC_EXYNOS4212 || SOC_EXYNOS4412)
157 help 157 help
158 Enable USB PHY support for Exynos 4x12. This option requires that 158 Enable USB PHY support for Exynos 3250/4x12. This option requires
159 Samsung USB 2.0 PHY driver is enabled and means that support for this 159 that Samsung USB 2.0 PHY driver is enabled and means that support for
160 particular SoC is compiled in the driver. In case of Exynos 4x12 four 160 this particular SoC is compiled in the driver. In case of Exynos 4x12
161 phys are available - device, host, HSIC0 and HSIC1. 161 four phys are available - device, host, HSIC0 and HSIC1.
162 162
163config PHY_EXYNOS5250_USB2 163config PHY_EXYNOS5250_USB2
164 bool "Support for Exynos 5250" 164 bool "Support for Exynos 5250"
diff --git a/drivers/phy/phy-exynos4x12-usb2.c b/drivers/phy/phy-exynos4x12-usb2.c
index 63134d8bda08..0b9de88579b1 100644
--- a/drivers/phy/phy-exynos4x12-usb2.c
+++ b/drivers/phy/phy-exynos4x12-usb2.c
@@ -67,6 +67,8 @@
67#define EXYNOS_4x12_UPHYCLK_PHYFSEL_24MHZ (0x5 << 0) 67#define EXYNOS_4x12_UPHYCLK_PHYFSEL_24MHZ (0x5 << 0)
68#define EXYNOS_4x12_UPHYCLK_PHYFSEL_50MHZ (0x7 << 0) 68#define EXYNOS_4x12_UPHYCLK_PHYFSEL_50MHZ (0x7 << 0)
69 69
70#define EXYNOS_3250_UPHYCLK_REFCLKSEL (0x2 << 8)
71
70#define EXYNOS_4x12_UPHYCLK_PHY0_ID_PULLUP BIT(3) 72#define EXYNOS_4x12_UPHYCLK_PHY0_ID_PULLUP BIT(3)
71#define EXYNOS_4x12_UPHYCLK_PHY0_COMMON_ON BIT(4) 73#define EXYNOS_4x12_UPHYCLK_PHY0_COMMON_ON BIT(4)
72#define EXYNOS_4x12_UPHYCLK_PHY1_COMMON_ON BIT(7) 74#define EXYNOS_4x12_UPHYCLK_PHY1_COMMON_ON BIT(7)
@@ -197,6 +199,10 @@ static void exynos4x12_setup_clk(struct samsung_usb2_phy_instance *inst)
197 199
198 clk = readl(drv->reg_phy + EXYNOS_4x12_UPHYCLK); 200 clk = readl(drv->reg_phy + EXYNOS_4x12_UPHYCLK);
199 clk &= ~EXYNOS_4x12_UPHYCLK_PHYFSEL_MASK; 201 clk &= ~EXYNOS_4x12_UPHYCLK_PHYFSEL_MASK;
202
203 if (drv->cfg->has_refclk_sel)
204 clk = EXYNOS_3250_UPHYCLK_REFCLKSEL;
205
200 clk |= drv->ref_reg_val << EXYNOS_4x12_UPHYCLK_PHYFSEL_OFFSET; 206 clk |= drv->ref_reg_val << EXYNOS_4x12_UPHYCLK_PHYFSEL_OFFSET;
201 clk |= EXYNOS_4x12_UPHYCLK_PHY1_COMMON_ON; 207 clk |= EXYNOS_4x12_UPHYCLK_PHY1_COMMON_ON;
202 writel(clk, drv->reg_phy + EXYNOS_4x12_UPHYCLK); 208 writel(clk, drv->reg_phy + EXYNOS_4x12_UPHYCLK);
@@ -278,7 +284,7 @@ static int exynos4x12_power_on(struct samsung_usb2_phy_instance *inst)
278 exynos4x12_power_on_int(&drv->instances[EXYNOS4x12_DEVICE]); 284 exynos4x12_power_on_int(&drv->instances[EXYNOS4x12_DEVICE]);
279 } 285 }
280 286
281 if (inst->cfg->id == EXYNOS4x12_DEVICE) 287 if (inst->cfg->id == EXYNOS4x12_DEVICE && drv->cfg->has_mode_switch)
282 regmap_update_bits(drv->reg_sys, EXYNOS_4x12_MODE_SWITCH_OFFSET, 288 regmap_update_bits(drv->reg_sys, EXYNOS_4x12_MODE_SWITCH_OFFSET,
283 EXYNOS_4x12_MODE_SWITCH_MASK, 289 EXYNOS_4x12_MODE_SWITCH_MASK,
284 EXYNOS_4x12_MODE_SWITCH_DEVICE); 290 EXYNOS_4x12_MODE_SWITCH_DEVICE);
@@ -310,7 +316,7 @@ static int exynos4x12_power_off(struct samsung_usb2_phy_instance *inst)
310 if (inst->ext_cnt-- > 1) 316 if (inst->ext_cnt-- > 1)
311 return 0; 317 return 0;
312 318
313 if (inst->cfg->id == EXYNOS4x12_DEVICE) 319 if (inst->cfg->id == EXYNOS4x12_DEVICE && drv->cfg->has_mode_switch)
314 regmap_update_bits(drv->reg_sys, EXYNOS_4x12_MODE_SWITCH_OFFSET, 320 regmap_update_bits(drv->reg_sys, EXYNOS_4x12_MODE_SWITCH_OFFSET,
315 EXYNOS_4x12_MODE_SWITCH_MASK, 321 EXYNOS_4x12_MODE_SWITCH_MASK,
316 EXYNOS_4x12_MODE_SWITCH_HOST); 322 EXYNOS_4x12_MODE_SWITCH_HOST);
@@ -358,6 +364,13 @@ static const struct samsung_usb2_common_phy exynos4x12_phys[] = {
358 {}, 364 {},
359}; 365};
360 366
367const struct samsung_usb2_phy_config exynos3250_usb2_phy_config = {
368 .has_refclk_sel = 1,
369 .num_phys = 1,
370 .phys = exynos4x12_phys,
371 .rate_to_clk = exynos4x12_rate_to_clk,
372};
373
361const struct samsung_usb2_phy_config exynos4x12_usb2_phy_config = { 374const struct samsung_usb2_phy_config exynos4x12_usb2_phy_config = {
362 .has_mode_switch = 1, 375 .has_mode_switch = 1,
363 .num_phys = EXYNOS4x12_NUM_PHYS, 376 .num_phys = EXYNOS4x12_NUM_PHYS,
diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-samsung-usb2.c
index 1e69a32c221d..16aae7a285f0 100644
--- a/drivers/phy/phy-samsung-usb2.c
+++ b/drivers/phy/phy-samsung-usb2.c
@@ -87,6 +87,12 @@ static struct phy *samsung_usb2_phy_xlate(struct device *dev,
87} 87}
88 88
89static const struct of_device_id samsung_usb2_phy_of_match[] = { 89static const struct of_device_id samsung_usb2_phy_of_match[] = {
90#ifdef CONFIG_PHY_EXYNOS4X12_USB2
91 {
92 .compatible = "samsung,exynos3250-usb2-phy",
93 .data = &exynos3250_usb2_phy_config,
94 },
95#endif
90#ifdef CONFIG_PHY_EXYNOS4210_USB2 96#ifdef CONFIG_PHY_EXYNOS4210_USB2
91 { 97 {
92 .compatible = "samsung,exynos4210-usb2-phy", 98 .compatible = "samsung,exynos4210-usb2-phy",
diff --git a/drivers/phy/phy-samsung-usb2.h b/drivers/phy/phy-samsung-usb2.h
index 918847843a95..b03da0ef39ac 100644
--- a/drivers/phy/phy-samsung-usb2.h
+++ b/drivers/phy/phy-samsung-usb2.h
@@ -60,8 +60,10 @@ struct samsung_usb2_phy_config {
60 int (*rate_to_clk)(unsigned long, u32 *); 60 int (*rate_to_clk)(unsigned long, u32 *);
61 unsigned int num_phys; 61 unsigned int num_phys;
62 bool has_mode_switch; 62 bool has_mode_switch;
63 bool has_refclk_sel;
63}; 64};
64 65
66extern const struct samsung_usb2_phy_config exynos3250_usb2_phy_config;
65extern const struct samsung_usb2_phy_config exynos4210_usb2_phy_config; 67extern const struct samsung_usb2_phy_config exynos4210_usb2_phy_config;
66extern const struct samsung_usb2_phy_config exynos4x12_usb2_phy_config; 68extern const struct samsung_usb2_phy_config exynos4x12_usb2_phy_config;
67extern const struct samsung_usb2_phy_config exynos5250_usb2_phy_config; 69extern const struct samsung_usb2_phy_config exynos5250_usb2_phy_config;